void sdrrderr(char *count) { int addr; char *c; int _count; int i, j, p; unsigned char prev_data[DFII_NPHASES*DFII_PIX_DATA_SIZE]; unsigned char errs[DFII_NPHASES*DFII_PIX_DATA_SIZE]; if(*count == 0) { printf("sdrrderr <count>\n"); return; } _count = strtoul(count, &c, 0); if(*c != 0) { printf("incorrect count\n"); return; } for(i=0;i<DFII_NPHASES*DFII_PIX_DATA_SIZE;i++) errs[i] = 0; for(addr=0;addr<16;addr++) { sdram_dfii_pird_address_write(addr*8); sdram_dfii_pird_baddress_write(0); command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); for(p=0;p<DFII_NPHASES;p++) for(i=0;i<DFII_PIX_DATA_SIZE;i++) prev_data[p*DFII_PIX_DATA_SIZE+i] = MMPTR(sdram_dfii_pix_rddata_addr[p]+4*i); for(j=0;j<_count;j++) { command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); for(p=0;p<DFII_NPHASES;p++) for(i=0;i<DFII_PIX_DATA_SIZE;i++) { unsigned char new_data; new_data = MMPTR(sdram_dfii_pix_rddata_addr[p]+4*i); errs[p*DFII_PIX_DATA_SIZE+i] |= prev_data[p*DFII_PIX_DATA_SIZE+i] ^ new_data; prev_data[p*DFII_PIX_DATA_SIZE+i] = new_data; } } } for(i=0;i<DFII_NPHASES*DFII_PIX_DATA_SIZE;i++) printf("%02x", errs[i]); printf("\n"); for(p=0;p<DFII_NPHASES;p++) for(i=0;i<DFII_PIX_DATA_SIZE;i++) printf("%2x", DFII_PIX_DATA_SIZE/2 - 1 - (i % (DFII_PIX_DATA_SIZE/2))); printf("\n"); }
void ddrrd(char *startaddr) { char *c; unsigned int addr; int i; if(*startaddr == 0) { printf("ddrrd <address>\n"); return; } addr = strtoul(startaddr, &c, 0); if(*c != 0) { printf("incorrect address\n"); return; } dfii_pi0_address_write(addr); dfii_pi0_baddress_write(0); command_p0(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); for(i=0;i<8;i++) printf("%02x", MMPTR(0xe0000834+4*i)); for(i=0;i<8;i++) printf("%02x", MMPTR(0xe0000884+4*i)); printf("\n"); }
void sdrrd(char *startaddr, char *dq) { char *c; unsigned int addr; int _dq; if(*startaddr == 0) { printf("sdrrd <address>\n"); return; } addr = strtoul(startaddr, &c, 0); if(*c != 0) { printf("incorrect address\n"); return; } if(*dq == 0) _dq = -1; else { _dq = strtoul(dq, &c, 0); if(*c != 0) { printf("incorrect DQ\n"); return; } } sdram_dfii_pird_address_write(addr); sdram_dfii_pird_baddress_write(0); command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); sdrrdbuf(_dq); }
int ttasepfl_mutex_lock(ttasepfl_mutex_t *impl, ttasepfl_context_t *me) { volatile uint8_t *l = &(impl->spin_lock); uint32_t delay; while (1) { PREFETCHW(l); while ((*l) != UNLOCKED) { PREFETCHW(l); } if (l_tas_uint8(&(impl->spin_lock)) == UNLOCKED) { #if COND_VAR int ret = REAL(pthread_mutex_lock)(&impl->posix_lock); assert(ret == 0); #endif return 0; } else { // backoff delay = my_random(&(ttas_seeds[0]), &(ttas_seeds[1]), &(ttas_seeds[2])) % (me->limit); me->limit = MAX_DELAY > 2 * (me->limit) ? 2 * (me->limit) : MAX_DELAY; cdelay(delay); } } }
static void init_sequence(void) { int i; /* Bring CKE high */ dfii_pi0_address_write(0x0000); dfii_pi0_baddress_write(0); dfii_control_write(DFII_CONTROL_CKE); /* Precharge All */ dfii_pi0_address_write(0x0400); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); /* Load Extended Mode Register */ dfii_pi0_baddress_write(1); dfii_pi0_address_write(0x0000); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); dfii_pi0_baddress_write(0); /* Load Mode Register */ dfii_pi0_address_write(0x0132); /* Reset DLL, CL=3, BL=4 */ command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); cdelay(200); /* Precharge All */ dfii_pi0_address_write(0x0400); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); /* 2x Auto Refresh */ for(i=0;i<2;i++) { dfii_pi0_address_write(0); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS); cdelay(4); } /* Load Mode Register */ dfii_pi0_address_write(0x0032); /* CL=3, BL=4 */ command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); cdelay(200); }
void ddrrow(char *_row) { char *c; unsigned int row; if(*_row == 0) { dfii_pi0_address_write(0x0000); dfii_pi0_baddress_write(0); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); cdelay(15); printf("Precharged\n"); } else { row = strtoul(_row, &c, 0); if(*c != 0) { printf("incorrect row\n"); return; } dfii_pi0_address_write(row); dfii_pi0_baddress_write(0); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CS); cdelay(15); printf("Activated row %d\n", row); } }
void ttas_lock(ttas_lock_t * the_lock, uint32_t* limit) { uint32_t delay; volatile ttas_lock_data_t* l = &(the_lock->lock); while (1){ while ((*l)==1) {} if (CAS_U8(l,UNLOCKED,LOCKED)==UNLOCKED) { return; } else { //backoff delay = my_random(&(ttas_seeds[0]),&(ttas_seeds[1]),&(ttas_seeds[2]))%(*limit); *limit = MAX_DELAY > 2*(*limit) ? 2*(*limit) : MAX_DELAY; cdelay(delay); } } }
void write_acquire(rw_ttas* lock, uint32_t* limit) { uint32_t delay; while (1) { while (lock->lock_data!=0) { } if (CAS_U16(&lock->lock_data,0,W_MASK)==0) { return; } else { delay = my_random(&(rw_seeds[0]),&(rw_seeds[1]),&(rw_seeds[2]))%(*limit); *limit = MAX_DELAY > 2*(*limit) ? 2*(*limit) : MAX_DELAY; cdelay(delay); } } }
void read_acquire(rw_ttas* lock, uint32_t* limit) { uint32_t delay; while (1) { rw_data_t aux; while ((aux=lock->lock_data)>MAX_RW) { } //uint16_t aux = (uint16_t) lock->lock_data; if (CAS_U16(&lock->lock_data,aux,aux+1)==aux) { return; } else { delay = my_random(&(rw_seeds[0]),&(rw_seeds[1]),&(rw_seeds[2]))%(*limit); *limit = MAX_DELAY > 2*(*limit) ? 2*(*limit) : MAX_DELAY; cdelay(delay); } } }
static void read_delays(void) { unsigned int prv; unsigned char prs[DFII_NPHASES*DFII_PIX_DATA_SIZE]; int p, i, j; int working; int delay, delay_min, delay_max; printf("Read delays: "); /* Generate pseudo-random sequence */ prv = 42; for(i=0;i<DFII_NPHASES*DFII_PIX_DATA_SIZE;i++) { prv = 1664525*prv + 1013904223; prs[i] = prv; } /* Activate */ sdram_dfii_pi0_address_write(0); sdram_dfii_pi0_baddress_write(0); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CS); cdelay(15); /* Write test pattern */ for(p=0;p<DFII_NPHASES;p++) for(i=0;i<DFII_PIX_DATA_SIZE;i++) MMPTR(sdram_dfii_pix_wrdata_addr[p]+4*i) = prs[DFII_PIX_DATA_SIZE*p+i]; sdram_dfii_piwr_address_write(0); sdram_dfii_piwr_baddress_write(0); command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA); /* Calibrate each DQ in turn */ sdram_dfii_pird_address_write(0); sdram_dfii_pird_baddress_write(0); for(i=0;i<DFII_PIX_DATA_SIZE/2;i++) { ddrphy_dly_sel_write(1 << (DFII_PIX_DATA_SIZE/2-i-1)); delay = 0; /* Find smallest working delay */ ddrphy_rdly_dq_rst_write(1); while(1) { command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); working = 1; for(p=0;p<DFII_NPHASES;p++) { if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*i) != prs[DFII_PIX_DATA_SIZE*p+i]) working = 0; if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(i+DFII_PIX_DATA_SIZE/2)) != prs[DFII_PIX_DATA_SIZE*p+i+DFII_PIX_DATA_SIZE/2]) working = 0; } if(working) break; delay++; if(delay >= ERR_DDRPHY_DELAY) break; ddrphy_rdly_dq_inc_write(1); } delay_min = delay; /* Get a bit further into the working zone */ delay++; ddrphy_rdly_dq_inc_write(1); /* Find largest working delay */ while(1) { command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA); cdelay(15); working = 1; for(p=0;p<DFII_NPHASES;p++) { if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*i) != prs[DFII_PIX_DATA_SIZE*p+i]) working = 0; if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(i+DFII_PIX_DATA_SIZE/2)) != prs[DFII_PIX_DATA_SIZE*p+i+DFII_PIX_DATA_SIZE/2]) working = 0; } if(!working) break; delay++; if(delay >= ERR_DDRPHY_DELAY) break; ddrphy_rdly_dq_inc_write(1); } delay_max = delay; printf("%d:%02d-%02d ", DFII_PIX_DATA_SIZE/2-i-1, delay_min, delay_max); /* Set delay to the middle */ ddrphy_rdly_dq_rst_write(1); for(j=0;j<(delay_min+delay_max)/2;j++) ddrphy_rdly_dq_inc_write(1); } /* Precharge */ sdram_dfii_pi0_address_write(0); sdram_dfii_pi0_baddress_write(0); command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); cdelay(15); printf("completed\n"); }
static int write_level(int *delay, int *high_skew) { int i; int dq_address; unsigned char dq; int ok; printf("Write leveling: "); sdrwlon(); cdelay(100); for(i=0;i<DFII_PIX_DATA_SIZE/2;i++) { dq_address = sdram_dfii_pix_rddata_addr[0]+4*(DFII_PIX_DATA_SIZE/2-1-i); ddrphy_dly_sel_write(1 << i); ddrphy_wdly_dq_rst_write(1); ddrphy_wdly_dqs_rst_write(1); delay[i] = 0; ddrphy_wlevel_strobe_write(1); cdelay(10); dq = MMPTR(dq_address); if(dq != 0) { /* * Assume this DQ group has between 1 and 2 bit times of skew. * Bring DQS into the CK=0 zone before continuing leveling. */ high_skew[i] = 1; while(dq != 0) { delay[i]++; if(delay[i] >= ERR_DDRPHY_DELAY) break; ddrphy_wdly_dq_inc_write(1); ddrphy_wdly_dqs_inc_write(1); ddrphy_wlevel_strobe_write(1); cdelay(10); dq = MMPTR(dq_address); } } else high_skew[i] = 0; while(dq == 0) { delay[i]++; if(delay[i] >= ERR_DDRPHY_DELAY) break; ddrphy_wdly_dq_inc_write(1); ddrphy_wdly_dqs_inc_write(1); ddrphy_wlevel_strobe_write(1); cdelay(10); dq = MMPTR(dq_address); } } sdrwloff(); ok = 1; for(i=DFII_PIX_DATA_SIZE/2-1;i>=0;i--) { printf("%2d%c ", delay[i], high_skew[i] ? '*' : ' '); if(delay[i] >= ERR_DDRPHY_DELAY) ok = 0; } if(ok) printf("completed\n"); else printf("failed\n"); return ok; }