void set_module_apc(unsigned int module, E_MASK_DOM domain_num , APC_ATTR permission_control)
{
volatile unsigned int* base = 0;
unsigned int clr_bit = 0x3 << ((module % MOD_NO_IN_1_DEVAPC) * 2);
unsigned int set_bit = permission_control << ((module % MOD_NO_IN_1_DEVAPC) * 2);
clear_vio_status(module);
unmask_module_irq(module);
if(domain_num == E_DOMAIN_0)
{
base = (unsigned int*) ((size_t)DEVAPC_D0_APC_0 + (module/16) *4);
}
else if(domain_num == E_DOMAIN_1)
{
base = (unsigned int*) ((size_t)DEVAPC_D1_APC_0 + (module/16) *4);
}
else if(domain_num == E_DOMAIN_2)
{
base = (unsigned int*) ((size_t)DEVAPC_D2_APC_0 + (module/16) *4);
}
else if(domain_num == E_DOMAIN_3)
{
base = (unsigned int*) ((size_t)DEVAPC_D3_APC_0 + (module/16) *4);
}
writel(readl(base) & ~clr_bit, base);
writel(readl(base) | set_bit, base);
}
/*
* start_devapc: start device apc for MD
*/
static int start_devapc(void)
{
int i = 0;
init_devpac();
for (i = 0; i < (sizeof(devapc_devices) / sizeof(devapc_devices[0])); i++) {
if (TRUE == devapc_devices[i].forbidden) {
clear_vio_status(i);
unmask_module_irq(i);
set_module_apc(i, E_DOMAIN_1, E_L3);
}
}
return 0;
}
static irqreturn_t devapc_violation_irq(int irq, void *dev_id)
{
unsigned int dbg0 = 0, dbg1 = 0;
unsigned int master_id;
unsigned int domain_id;
unsigned int r_w_violation;
int i;
dbg0 = readl(DEVAPC0_VIO_DBG0);
dbg1 = readl(DEVAPC0_VIO_DBG1);
master_id = dbg0 & VIO_DBG_MSTID;
domain_id = dbg0 & VIO_DBG_DMNID;
r_w_violation = dbg0 & VIO_DBG_RW;
pr_err("[DEVAPC] Device Access Permission Violation (Device APC, DAPC)\n");
if (1 == r_w_violation) {
pr_err("[DEVAPC] Process:%s PID:%i Vio Addr:0x%x , Master ID:0x%x , Dom ID:0x%x, W\n",
current->comm,current->pid, dbg1, master_id, domain_id);
} else {
pr_err("[DEVAPC] Process:%s PID:%i Vio Addr:0x%x , Master ID:0x%x , Dom ID:0x%x, r\n",
current->comm,current->pid, dbg1, master_id, domain_id);
}
pr_err("[DEVAPC] VIO_STA 0:0x%x, 1:0x%x, 2:0x%x, 3:0x%x\n",
readl(DEVAPC0_D0_VIO_STA_0 ), readl(DEVAPC0_D0_VIO_STA_1 ), readl(DEVAPC0_D0_VIO_STA_2 ),
readl(DEVAPC0_D0_VIO_STA_3 ));
for (i = 0; i < (sizeof(devapc_devices) / sizeof(devapc_devices[0])); i++) {
clear_vio_status(i);
}
mt_reg_sync_writel(VIO_DBG_CLR , DEVAPC0_VIO_DBG0);
dbg0 = readl(DEVAPC0_VIO_DBG0);
dbg1 = readl(DEVAPC0_VIO_DBG1);
if ((dbg0 != 0) || (dbg1 != 0)) {
pr_err("[DEVAPC] Multi-violation!\n");
pr_err("[DEVAPC] DBG0 = %x, DBG1 = %x\n", dbg0, dbg1);
}
return IRQ_HANDLED;
}
