Ejemplo n.º 1
0
static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
{
    SH7750State *s = opaque;
    uint32_t ret = 0;

    switch (MM_REGION_TYPE(addr)) {
    case MM_ICACHE_ADDR:
    case MM_ICACHE_DATA:
        /* do nothing */
	break;
    case MM_ITLB_ADDR:
        ret = cpu_sh4_read_mmaped_itlb_addr(s->cpu, addr);
        break;
    case MM_ITLB_DATA:
        ret = cpu_sh4_read_mmaped_itlb_data(s->cpu, addr);
        break;
    case MM_OCACHE_ADDR:
    case MM_OCACHE_DATA:
        /* do nothing */
	break;
    case MM_UTLB_ADDR:
        ret = cpu_sh4_read_mmaped_utlb_addr(s->cpu, addr);
        break;
    case MM_UTLB_DATA:
        ret = cpu_sh4_read_mmaped_utlb_data(s->cpu, addr);
        break;
    default:
        abort();
    }

    return ret;
}
Ejemplo n.º 2
0
Archivo: sh7750.c Proyecto: 8tab/qemu
static uint64_t sh7750_mmct_read(void *opaque, hwaddr addr,
                                 unsigned size)
{
    SH7750State *s = opaque;
    uint32_t ret = 0;

    if (size != 4) {
        return invalid_read(opaque, addr);
    }

    switch (MM_REGION_TYPE(addr)) {
    case MM_ICACHE_ADDR:
    case MM_ICACHE_DATA:
        /* do nothing */
	break;
    case MM_ITLB_ADDR:
        ret = cpu_sh4_read_mmaped_itlb_addr(&s->cpu->env, addr);
        break;
    case MM_ITLB_DATA:
        ret = cpu_sh4_read_mmaped_itlb_data(&s->cpu->env, addr);
        break;
    case MM_OCACHE_ADDR:
    case MM_OCACHE_DATA:
        /* do nothing */
	break;
    case MM_UTLB_ADDR:
        ret = cpu_sh4_read_mmaped_utlb_addr(&s->cpu->env, addr);
        break;
    case MM_UTLB_DATA:
        ret = cpu_sh4_read_mmaped_utlb_data(&s->cpu->env, addr);
        break;
    default:
        abort();
    }

    return ret;
}