// Calcule la taille de la SRAM en fonction de l'en-tête
static u32 calc_ram_size(u8 ram_byte) {
// Table des tailles de RAM
const u16 size_table[4] = {0, 2 << 10, 8 << 10, 32 << 10};
if (ram_byte < 4)
return size_table[ram_byte];
dbg_warning("Invalid RAM size byte");
return 0;
}
// Calcule la taille de la ROM en fonction de l'en-tête
static u32 calc_rom_size(u8 rom_byte) {
// Note: X << 10 = X Kilooctets, X << 20 = X Megaoctets
if (rom_byte < 8) // Voir 0148 - ROM Size (pandocs)
return (32 << 10) << rom_byte;
// Codes spéciaux (voir pandocs)
else if (rom_byte >= 0x52 && rom_byte <= 0x54)
return (1 << 20) + ((128 << 10) << (rom_byte - 0x52));
dbg_warning("Invalid ROM size byte");
return 0;
}
void mbc_init(u32 loaded_size) {
u8 cart_type = mem_rom[0x147];
// Si la taille n'est pas celle définie dans l'en-tête, il y a probablement une erreur
rom_size = calc_rom_size(mem_rom[0x148]);
if (rom_size != loaded_size)
dbg_error("Invalid ROM size. Please check that it is not corrupt.");
rom_size = min(rom_size, loaded_size); // Pour ne pas dépasser...
// Taille de la RAM
ram_size = calc_ram_size(mem_rom[0x149]);
memset(ram_data, 0, ram_size);
// Initialisation; la bank 0 est toujours mappée à 0000 - 3FFF
// rom_bank concerne uniquement les accès à 4000 - 7FFF
params.rom_bank = 1; // 4000-7FFF
params.ram_bank = 0;
params.bank_mode = 0; // ROM bank select
params.ram_enable = 0; // RAM désactivée
// MBC selon le types de carte: voir pandocs
switch (cart_type) {
case 0x00: // ROM only
case 0x08: // ROM + RAM
case 0x09: // ROM + RAM + BATTERY
mbc_read = direct_read;
mbc_write = null_write;
params.ram_enable = 1; // RAM toujours activée si pas de MBC
dbg_info("No mapper");
break;
case 0x01: // MBC1
case 0x02: // MBC1 + RAM
case 0x03: // MBC1 + RAM + BATTERY
mbc_read = mbc1_read;
mbc_write = mbc1_write;
dbg_info("MBC1 mapper");
break;
case 0x05: // MBC2
case 0x06: // MBC2 + BATTERY
mbc_read = mbc1_read;
mbc_write = mbc2_write;
dbg_info("MBC2 mapper");
break;
case 0x0f: // MBC3 + TIMER + BATTERY
case 0x10: // MBC3 + TIMER + RAM + BATTERY
case 0x11: // MBC3
case 0x12: // MBC3 + RAM
case 0x13: // MBC3 + RAM + BATTERY
mbc_read = mbc1_read;
mbc_write = mbc3_write;
dbg_info("MBC3 mapper");
break;
default:
dbg_warning("Unknown cartridge type %02x. Will be emulated as MBC3", cart_type);
mbc_read = mbc1_read;
mbc_write = mbc3_write;
break;
}
}
static void* dbgs(void* arg) {
EXPECT_EQ(0, sem_wait(&dbg_lock));
uint saved_lvl = fbi_get_debug();
fbi_set_debug(UINT_MAX);
long unsigned exp_tid = (long unsigned) pthread_self();
long unsigned tid = 0;
#define TID_SCAN_STR "%20lu%*[^\n]"
dbg_critical("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_error("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_warning("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_notify("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_info("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_debug("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_spew("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_low("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_medium("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
dbg_high("Test dbg");
EXPECT_EQ(1, fscanf(redir, TID_SCAN_STR, &tid));
EXPECT_EQ(exp_tid, tid);
fbi_set_debug(saved_lvl);
EXPECT_EQ(0, sem_post(&dbg_lock));
return nullptr;
}
