int de_fcc_init(unsigned int sel, unsigned int chno, unsigned int reg_base)
{
unsigned int fcc_base;
void *memory;
fcc_base = reg_base + (sel+1)*0x00100000 + FCC_OFST; //FIXME display path offset should be defined
__inf("sel %d, fcc_base[%d]=0x%x\n", sel, chno, fcc_base);
memory = disp_sys_malloc(sizeof(__fcc_reg_t));
if(NULL == memory) {
__wrn("malloc vep fcc[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__fcc_reg_t));
return -1;
}
fcc_para_block[sel][chno].off = fcc_base;
fcc_para_block[sel][chno].val = memory;
fcc_para_block[sel][chno].size = 0x48;
fcc_para_block[sel][chno].dirty = 1;
fcc_csc_block[sel][chno].off = fcc_base + 0x50;
fcc_csc_block[sel][chno].val = memory + 0x50;
fcc_csc_block[sel][chno].size = 0x40;
fcc_csc_block[sel][chno].dirty = 1;
de_fcc_set_reg_base(sel, chno, memory);
return 0;
}
static void LCD_panel_init(u32 sel)
{
disp_panel_para *panel_info = disp_sys_malloc(sizeof(disp_panel_para));
u32 bright = 0;
bsp_disp_get_panel_info(sel, panel_info);
bright = bsp_disp_lcd_get_bright(sel);
sunxi_lcd_dsi_clk_enable(sel);
sunxi_lcd_delay_ms(5);
sunxi_lcd_dsi_dcs_write_0para(sel,DSI_DCS_SOFT_RESET);
sunxi_lcd_delay_ms(5);
sunxi_lcd_dsi_gen_write_1para(sel,0xb0,0x00);
sunxi_lcd_dsi_gen_write_5para(sel,0xb3,0x04,0x08,0x00,0x22,0x00);
sunxi_lcd_dsi_gen_write_1para(sel,0xb4,0x0c);
sunxi_lcd_dsi_gen_write_2para(sel,0xb6,0x3a,0xd3);
sunxi_lcd_dsi_dcs_write_1para(sel,0x51,bright);
sunxi_lcd_dsi_dcs_write_1para(sel,0x53,0x2c);
sunxi_lcd_dsi_dcs_write_1para(sel,DSI_DCS_SET_PIXEL_FORMAT,0x77);
sunxi_lcd_dsi_dcs_write_4para(sel,DSI_DCS_SET_COLUMN_ADDRESS,0x00,0x00,0x04,0xaf);
sunxi_lcd_dsi_dcs_write_4para(sel,DSI_DCS_SET_PAGE_ADDRESS,0x00,0x00,0x07,0x7f);
sunxi_lcd_dsi_dcs_write_0para(sel,DSI_DCS_EXIT_SLEEP_MODE);
disp_sys_free(panel_info);
return;
}
static s32 vdevice_clk_config(struct disp_device *vdevice)
{
struct disp_vdevice_private_data *vdevicep = disp_vdevice_get_priv(vdevice);
disp_panel_para *para;
struct lcd_clk_info clk_info;
unsigned long pll_rate, lcd_rate, dclk_rate;//hz
unsigned long pll_rate_set, lcd_rate_set, dclk_rate_set;//hz
if(!vdevice || !vdevicep) {
DE_WRN("null hdl!\n");
return DIS_FAIL;
}
memset(&clk_info, 0, sizeof(struct lcd_clk_info));
para = (disp_panel_para*)disp_sys_malloc(sizeof(disp_panel_para));
dclk_rate = vdevicep->video_info->pixel_clk * (vdevicep->video_info->pixel_repeat + 1);
para->lcd_if = vdevicep->intf.intf;
para->lcd_dclk_freq = dclk_rate;
disp_al_lcd_get_clk_info(vdevice->disp, &clk_info, para);
disp_sys_free((void*)para);
clk_info.tcon_div = 8;//fixme
lcd_rate = dclk_rate * clk_info.tcon_div;
pll_rate = lcd_rate * clk_info.lcd_div;
disp_sys_clk_set_rate(vdevicep->clk_parent, pll_rate);
pll_rate_set = disp_sys_clk_get_rate(vdevicep->clk_parent);
lcd_rate_set = pll_rate_set / clk_info.lcd_div;
disp_sys_clk_set_rate(vdevicep->clk, lcd_rate_set);
lcd_rate_set = disp_sys_clk_get_rate(vdevicep->clk);
dclk_rate_set = lcd_rate_set / clk_info.tcon_div;
if(dclk_rate_set != dclk_rate)
DE_WRN("pclk=%ld, cur=%ld\n", dclk_rate, dclk_rate_set);
return 0;
}
static void LCD_panel_init2(u32 sel)
{
disp_panel_para *panel_info = disp_sys_malloc(sizeof(disp_panel_para));
u8 para[9];
bsp_disp_get_panel_info(sel, panel_info);
sunxi_lcd_dsi_dcs_write_0para(sel,DSI_DCS_SET_DISPLAY_ON);
sunxi_lcd_dsi_gen_write_5para(sel,0xb3,0x14,0x08,0x00,0x22,0x00);
sunxi_lcd_dsi_gen_write_1para(sel,0xd6,0x01);
para[0] = 0x31;
para[1] = 0xf7;
para[2] = 0x80;
para[3] = 0x00;
para[4] = panel_info->lcd_vbp-1;
para[5] = 0x00;
para[6] = 0x08;
para[7] = 0x00;
para[8] = 0x00;
sunxi_lcd_dsi_gen_write(sel, 0xc2, para, 9);
disp_sys_free(panel_info);
return;
}
static void LCD_panel_exit(u32 sel)
{
disp_panel_para *info = disp_sys_malloc(sizeof(disp_panel_para));
bsp_disp_get_panel_info(sel, info);
disp_sys_free(info);
return ;
}
int de_lti_init(unsigned int sel, unsigned int chno, unsigned int reg_base)
{
unsigned int base;
void *memory;
base = reg_base + (sel+1)*0x00100000 + LTI_OFST; //FIXME display path offset should be defined
__inf("sel %d, lti_base[%d]=0x%x\n", sel, chno, base);
memory = disp_sys_malloc(sizeof(__lti_reg_t));
if(NULL == memory) {
__wrn("malloc lti[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__lti_reg_t));
return -1;
}
lti_block[sel][chno].off = base;
lti_block[sel][chno].val = memory;
lti_block[sel][chno].size = 0x40;
lti_block[sel][chno].dirty = 0;
de_lti_set_reg_base(sel, chno, (unsigned int)memory);
return 0;
}
int de_peak_init(unsigned int sel, unsigned int chno, unsigned int reg_base)
{
unsigned int base;
void *memory;
base = reg_base + (sel+1)*0x00100000 + PEAK_OFST; //FIXME: chno is not considered
__inf("sel %d, peak_base[%d]=0x%x\n", sel, chno, base);
memory = disp_sys_malloc(sizeof(__peak_reg_t));
if(NULL == memory) {
__wrn("malloc peak[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__peak_reg_t));
return -1;
}
peak_block[sel][chno].off = base;
peak_block[sel][chno].val = memory;
peak_block[sel][chno].size = 0x30;
peak_block[sel][chno].dirty = 0;
de_peak_set_reg_base(sel, chno, (unsigned int)memory);
return 0;
}
struct disp_device* disp_vdevice_register(disp_vdevice_init_data *data)
{
struct disp_device *vdevice;
struct disp_vdevice_private_data *vdevicep;
vdevice = (struct disp_device *)disp_sys_malloc(sizeof(struct disp_device));
if(NULL == vdevice) {
DE_WRN("malloc memory fail!\n");
return NULL;
}
vdevicep = (struct disp_vdevice_private_data *)disp_sys_malloc(sizeof(struct disp_vdevice_private_data));
if(NULL == vdevicep) {
DE_WRN("malloc memory fail!\n");
disp_sys_free(vdevice);
return NULL;
}
#if defined(__LINUX_PLAT__)
mutex_init(&vdevicep->mlock);
#endif
memset(vdevice, 0, sizeof(struct disp_device));
memcpy(&vdevice->name, data->name, 32);
vdevice->disp = data->disp;
vdevice->fix_timing = data->fix_timing;
vdevice->type = data->type;
memcpy(&vdevicep->func, &data->func, sizeof(disp_device_func));
vdevicep->irq_no = gdisp.init_para.irq_no[DISP_MOD_LCD0 + vdevice->disp];
switch(vdevice->disp) {
case 0:
vdevicep->clk = DE_LCD_CLK0;
break;
case 1:
vdevicep->clk = DE_LCD_CLK1;//TCON clk
break;
default:
vdevicep->clk = DE_LCD_CLK0;
}
vdevicep->clk_parent = DE_LCD_CLK_SRC;
vdevice->set_manager = disp_device_set_manager;
vdevice->unset_manager = disp_device_unset_manager;
vdevice->get_resolution = disp_device_get_resolution;
vdevice->get_timings = disp_device_get_timings;
vdevice->is_interlace = disp_device_is_interlace;
vdevice->init = disp_vdevice_init;
vdevice->exit = disp_vdevice_exit;
vdevice->enable = disp_vdevice_enable;
vdevice->sw_enable = disp_vdevice_sw_enable;
vdevice->disable = disp_vdevice_disable;
vdevice->is_enabled = disp_vdevice_is_enabled;
vdevice->set_mode = disp_vdevice_set_mode;
vdevice->get_mode = disp_vdevice_get_mode;
vdevice->check_support_mode = disp_vdevice_check_support_mode;
vdevice->get_input_csc = disp_vdevice_get_input_csc;
vdevice->get_input_color_range = disp_vdevice_get_input_color_range;
vdevice->suspend = disp_vdevice_suspend;
vdevice->resume = disp_vdevice_resume;
vdevice->detect = disp_vdevice_detect;
vdevice->priv_data = (void*)vdevicep;
vdevice->init(vdevice);
disp_device_register(vdevice);
if(gdisp.init_para.start_process)
gdisp.init_para.start_process();
return vdevice;
}
s32 disp_init_smbl(disp_bsp_init_para * para)
{
u32 num_smbls;
u32 disp;
struct disp_smbl *smbl;
struct disp_smbl_private_data *smblp;
DE_INF("disp_init_smbl\n");
#if defined(__LINUX_PLAT__)
spin_lock_init(&smbl_data_lock);
#endif
num_smbls = bsp_disp_feat_get_num_screens();
smbls = (struct disp_smbl *)disp_sys_malloc(sizeof(struct disp_smbl) * num_smbls);
if(NULL == smbls) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
smbl_private = (struct disp_smbl_private_data *)disp_sys_malloc(sizeof(struct disp_smbl_private_data) * num_smbls);
if(NULL == smbl_private) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
for(disp=0; disp<num_smbls; disp++) {
smbl = &smbls[disp];
smblp = &smbl_private[disp];
#if defined(__LINUX_PLAT__)
mutex_init(&smblp->mlock);
#endif
switch(disp) {
case 0:
smbl->name = "smbl0";
smbl->disp = 0;
break;
case 1:
smbl->name = "smbl1";
smbl->disp = 1;
break;
case 2:
smbl->name = "smbl2";
smbl->disp = 2;
break;
}
smblp->shadow_protect = para->shadow_protect;
smbl->enable = disp_smbl_enable;
smbl->disable = disp_smbl_disable;
smbl->is_enabled = disp_smbl_is_enabled;
smbl->init = disp_smbl_init;
smbl->exit = disp_smbl_exit;
smbl->apply = disp_smbl_apply;
smbl->update_regs = disp_smbl_update_regs;
smbl->sync = disp_smbl_sync;
smbl->set_manager = disp_smbl_set_manager;
smbl->unset_manager = disp_smbl_unset_manager;
smbl->set_window = disp_smbl_set_window;
smbl->get_window = disp_smbl_get_window;
smbl->init(smbl);
}
return 0;
}
int de_smbl_init(unsigned int sel, unsigned int reg_base)
{
unsigned int base;
void *memory;
unsigned int lcdgamma;
int value = 1;
char primary_key[20];
char sub_key[20];
int ret;
base = reg_base + (sel+1)*0x00100000 + SMBL_OFST;
smbl_hw_base[sel] = base;
__inf("sel %d, smbl_base=0x%x\n", sel, base);
memory = disp_sys_malloc(sizeof(__smbl_reg_t));
if(NULL == memory) {
__wrn("malloc smbl[%d] memory fail! size=0x%x\n", sel, sizeof(__smbl_reg_t));
return -1;
}
smbl_enable_block[sel].off = base;
smbl_enable_block[sel].val = memory;
smbl_enable_block[sel].size = 0x4;
smbl_enable_block[sel].dirty = 0;
smbl_ctrl_block[sel].off = base + 0x4;
smbl_ctrl_block[sel].val = memory + 0x4;
smbl_ctrl_block[sel].size = 0x38;
smbl_ctrl_block[sel].dirty = 0;
smbl_hist_block[sel].off = base + 0x60;
smbl_hist_block[sel].val = memory + 0x60;
smbl_hist_block[sel].size = 0x20;
smbl_hist_block[sel].dirty = 0;
smbl_csc_block[sel].off = base + 0xc0;
smbl_csc_block[sel].val = memory + 0xc0;
smbl_csc_block[sel].size = 0x30;
smbl_csc_block[sel].dirty = 0;
smbl_filter_block[sel].off = base + 0xf0;
smbl_filter_block[sel].val = memory + 0xf0;
smbl_filter_block[sel].size = 0x110;
smbl_filter_block[sel].dirty = 0;
smbl_lut_block[sel].off = base + 0x200;
smbl_lut_block[sel].val = memory + 0x200;
smbl_lut_block[sel].size = 0x200;
smbl_lut_block[sel].dirty = 0;
de_smbl_set_reg_base(sel, (unsigned int)memory);
g_smbl_status[sel] = disp_sys_malloc(sizeof(__smbl_status_t));
if(NULL == g_smbl_status[sel]) {
__wrn("malloc g_smbl_status[%d] memory fail! size=0x%x\n", sel, sizeof(__smbl_status_t));
return -1;
}
g_smbl_status[sel]->IsEnable = 0;
g_smbl_status[sel]->Runtime = 0;
g_smbl_status[sel]->dimming = 256;
sprintf(primary_key, "lcd%d_para", sel);
ret = disp_sys_script_get_item(primary_key, "lcdgamma4iep", &value, 1);
if(ret != 1) {
lcdgamma = 6; //default gamma = 2.2;
} else {
//DE_INF("lcdgamma4iep for lcd%d = %d.\n", sel, value);
if(value > 30 || value < 10) {
//DE_WRN("lcdgamma4iep for lcd%d too small or too large. default value 22 will be set. please set it between 10 and 30 to make it valid.\n",sel);
lcdgamma = 6;//default gamma = 2.2;
} else {
lcdgamma = (value - 10)/2;
}
}
pttab[sel] = (unsigned int *)pwrsv_lgc_tab[128*lcdgamma];
ret = disp_sys_script_get_item(primary_key, "smartbl_low_limit", &value, 1);
if(ret != 1) {
//DE_INF("smartbl_low_limit for lcd%d not exist.\n", sel);
} else {
//DE_INF("smartbl_low_limit for lcd%d = %d.\n", sel, value);
if(value > 255 || value < 20) {
//DE_INF("smartbl_low_limit for lcd%d too small or too large. default value 85 will be set. please set it between 20 and 255 to make it valid.\n",sel);
} else {
PWRSAVE_PROC_THRES = value;
}
}
sprintf(sub_key, "lcd%d_backlight", sel);
ret = disp_sys_script_get_item("disp_init", sub_key, &value, 1);
if(1 == ret)
g_smbl_status[sel]->backlight = value;
return 0;
}
s32 disp_init_tv(disp_bsp_init_para * para) //call by disp_display
{
s32 val;
s32 type;
type = disp_sys_script_get_item("tv_para", "tv_used", &val, 1);
if(1 == type)
g_tv_used = val;
if(g_tv_used ) {
__u32 num_screens;
__u32 disp;
struct disp_device* p_tv;
struct disp_device_private_data* p_tvp;
DE_WRN("[boot]disp_init_tv\n");
#if defined(__LINUX_PLAT__)
spin_lock_init(&g_tv_data_lock);
#endif
DE_WRN("[DISP_TV] disp_init_tv enter g_tv_used\n");
num_screens = bsp_disp_feat_get_num_screens();
g_ptv_devices = (struct disp_device *)disp_sys_malloc(sizeof(struct disp_device) * num_screens);
if(NULL == g_ptv_devices) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
g_ptv_private = (struct disp_device_private_data *)disp_sys_malloc(sizeof(struct disp_device_private_data) * num_screens);
if(NULL == g_ptv_private) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
for(disp=0; disp<num_screens; disp++) {
p_tv = &g_ptv_devices[disp];
p_tvp = &g_ptv_private[disp];
if(!bsp_disp_feat_is_supported_output_types(disp, DISP_OUTPUT_TYPE_TV)) { //modify 1
DE_WRN("screen %d do not support TV TYPE!\n", disp);
continue;
}
p_tv->disp = disp;
sprintf(p_tv->name, "tv%d", disp);
p_tv->type = DISP_OUTPUT_TYPE_TV;
p_tvp->tv_mode = DISP_TV_MOD_PAL; //modifyed
p_tvp->irq_no = para->irq_no[DISP_MOD_LCD0 + disp]; //modify
p_tvp->clk = "tcon1";
p_tvp->clk_parent = "pll_video0";
p_tv->set_manager = disp_device_set_manager;
p_tv->unset_manager = disp_device_unset_manager;
p_tv->get_resolution = disp_device_get_resolution;
p_tv->get_timings = disp_device_get_timings;
p_tv->init = disp_tv_init;
p_tv->exit = disp_tv_exit;
p_tv->set_tv_func = disp_tv_set_func;
p_tv->enable = disp_tv_enable;
p_tv->disable = disp_tv_disable;
p_tv->is_enabled = disp_tv_is_enabled;
p_tv->set_mode = disp_tv_set_mode;
p_tv->get_mode = disp_tv_get_mode;
p_tv->check_support_mode = disp_tv_check_support_mode;
p_tv->get_input_csc = disp_tv_get_input_csc;
p_tv->detect = disp_tv_detect;
p_tv->suspend = disp_tv_suspend;
p_tv->resume = disp_tv_resume;
p_tv->init(p_tv);
if(bsp_disp_feat_is_supported_output_types(disp, DISP_OUTPUT_TYPE_TV))
disp_device_register(p_tv);
DE_WRN("[BOOOT_DISP_TV] disp tv device_registered\n");
}
}
return 0;
}
s32 disp_init_hdmi(disp_bsp_init_para * para)
{
s32 ret;
s32 value;
//get sysconfig hdmi_used
ret = disp_sys_script_get_item("hdmi_para", "hdmi_used", &value, 1);
if(ret == 1)
hdmi_used = value;
if(hdmi_used) {
u32 num_screens;
u32 disp;
struct disp_device* hdmi;
struct disp_device_private_data* hdmip;
DE_INF("disp_init_hdmi\n");
#if defined(__LINUX_PLAT__)
spin_lock_init(&hdmi_data_lock);
#endif
num_screens = bsp_disp_feat_get_num_screens();
hdmis = (struct disp_device *)disp_sys_malloc(sizeof(struct disp_device) * num_screens);
if(NULL == hdmis) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
hdmi_private = (struct disp_device_private_data *)disp_sys_malloc(sizeof(struct disp_device_private_data) * num_screens);
if(NULL == hdmi_private) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
for(disp=0; disp<num_screens; disp++) {
hdmi = &hdmis[disp];
hdmip = &hdmi_private[disp];
if(!bsp_disp_feat_is_supported_output_types(disp, DISP_OUTPUT_TYPE_HDMI)) {
continue;
}
hdmi->disp = disp;
sprintf(hdmi->name, "hdmi%d", disp);
hdmi->type = DISP_OUTPUT_TYPE_HDMI;
hdmip->mode = DISP_TV_MOD_720P_50HZ;
hdmip->irq_no = para->irq_no[DISP_MOD_LCD0 + disp];
switch(disp) {
case 0:
hdmip->clk = DE_LCD_CLK0;
break;
case 1:
hdmip->clk = DE_LCD_CLK1;//TCON clk
break;
default:
hdmip->clk = DE_LCD_CLK0;
}
hdmip->clk_parent = DE_HDMI_CLK_SRC;
hdmi->set_manager = disp_device_set_manager;
hdmi->unset_manager = disp_device_unset_manager;
hdmi->get_resolution = disp_device_get_resolution;
hdmi->get_timings = disp_device_get_timings;
hdmi->is_interlace = disp_device_is_interlace;
hdmi->init = disp_hdmi_init;
hdmi->exit = disp_hdmi_exit;
hdmi->set_func = disp_hdmi_set_func;
hdmi->enable = disp_hdmi_enable;
hdmi->disable = disp_hdmi_disable;
hdmi->is_enabled = disp_hdmi_is_enabled;
hdmi->set_mode = disp_hdmi_set_mode;
hdmi->get_mode = disp_hdmi_get_mode;
hdmi->check_support_mode = disp_hdmi_check_support_mode;
hdmi->get_input_csc = disp_hdmi_get_input_csc;
hdmi->get_input_color_range = disp_hdmi_get_input_color_range;
hdmi->suspend = disp_hdmi_suspend;
hdmi->resume = disp_hdmi_resume;
hdmi->detect = disp_hdmi_detect;
if(bsp_disp_feat_is_supported_output_types(disp, DISP_OUTPUT_TYPE_HDMI)) {
hdmi->init(hdmi);
disp_device_register(hdmi);
}
}
}
return 0;
}
int de_fce_init(unsigned int sel, unsigned int chno, unsigned int reg_base)
{
unsigned int base;
void *memory;
base = reg_base + (sel+1)*0x00100000 + FCE_OFST; //FIXME display path offset should be defined
fce_hw_base[sel][chno] = base;
__inf("sel %d, fce_base[%d]=0x%x\n", sel, chno, base);
memory = disp_sys_malloc(sizeof(__fce_reg_t));
if(NULL == memory) {
__wrn("malloc fce[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__fce_reg_t));
return -1;
}
fce_para_block[sel][chno].off = base;
fce_para_block[sel][chno].val = memory;
fce_para_block[sel][chno].size = 0x34;
fce_para_block[sel][chno].dirty = 0;
fce_celut_block[sel][chno].off = base + 0x100;
fce_celut_block[sel][chno].val = memory + 0x100;
fce_celut_block[sel][chno].size = 0x100;
fce_celut_block[sel][chno].dirty = 0;
fce_hist_block[sel][chno].off = base + 0x200;
fce_hist_block[sel][chno].val = memory + 0x200;
fce_hist_block[sel][chno].size = 0x400;
fce_hist_block[sel][chno].dirty = 0;
de_fce_set_reg_base(sel, chno, (unsigned int)memory);
//hist
g_hist_status[sel][chno] = disp_sys_malloc(sizeof(__hist_status_t)); //FIXME where to FREE?
if(NULL == g_hist_status[sel][chno]) {
__wrn("malloc g_hist_status[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__hist_status_t));
return -1;
}
__inf("g_hist_status[%d][%d]=0x%x\n", sel, chno, (unsigned int)g_hist_status[sel][chno]);
g_hist_status[sel][chno]->Runtime = 0;
g_hist_status[sel][chno]->IsEnable = 0;
g_hist_status[sel][chno]->TwoHistReady = 0;
g_hist[sel][chno] = disp_sys_malloc(1024); //FIXME where to FREE?
if(NULL == g_hist[sel][chno]) {
__wrn("malloc hist[%d][%d] memory fail! size=0x%x\n", sel, chno, 1024);
return -1;
}
g_hist_p[sel][chno] = disp_sys_malloc(1024); //FIXME where to FREE?
if(NULL == g_hist_p[sel][chno]) {
__wrn("malloc hist_p[%d][%d] memory fail! size=0x%x\n", sel, chno, 1024);
return -1;
}
//ce
g_ce_status[sel][chno] = disp_sys_malloc(sizeof(__ce_status_t)); //FIXME where to FREE?
if(NULL == g_ce_status[sel][chno]) {
__wrn("malloc g_ce_status[%d][%d] memory fail! size=0x%x\n", sel, chno, sizeof(__ce_status_t));
return -1;
}
g_ce_status[sel][chno]->IsEnable = 0;
g_celut[sel][chno] = disp_sys_malloc(256); //FIXME where to FREE?
if(NULL == g_celut[sel][chno]) {
__wrn("malloc celut[%d][%d] memory fail! size=0x%x\n", sel, chno, 256);
return -1;
}
return 0;
}
s32 disp_init_enhance(disp_bsp_init_para * para)
{
u32 num_enhances;
u32 disp;
struct disp_enhance *enhance;
struct disp_enhance_private_data *enhancep;
DE_INF("disp_init_enhance\n");
#if defined(__LINUX_PLAT__)
spin_lock_init(&enhance_data_lock);
#endif
num_enhances = bsp_disp_feat_get_num_screens();//bsp_disp_feat_get_num_smart_backlights();
enhances = (struct disp_enhance *)disp_sys_malloc(sizeof(struct disp_enhance) * num_enhances);
if(NULL == enhances) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
enhance_private = (struct disp_enhance_private_data *)disp_sys_malloc(sizeof(struct disp_enhance_private_data) * num_enhances);
if(NULL == enhance_private) {
DE_WRN("malloc memory fail!\n");
return DIS_FAIL;
}
for(disp=0; disp<num_enhances; disp++) {
enhance = &enhances[disp];
enhancep = &enhance_private[disp];
switch(disp) {
case 0:
enhance->name = "enhance0";
enhance->disp = 0;
break;
case 1:
enhance->name = "enhance1";
enhance->disp = 1;
break;
case 2:
enhance->name = "enhance2";
enhance->disp = 2;
break;
}
enhancep->shadow_protect = para->shadow_protect;
enhance->enable = disp_enhance_enable;
enhance->disable = disp_enhance_disable;
enhance->is_enabled = disp_enhance_is_enabled;
enhance->init = disp_enhance_init;
enhance->exit = disp_enhance_exit;
enhance->apply = disp_enhance_apply;
enhance->update_regs = disp_enhance_update_regs;
enhance->force_apply = disp_enhance_force_apply;
enhance->sync = disp_enhance_sync;
enhance->set_manager = disp_enhance_set_manager;
enhance->unset_manager = disp_enhance_unset_manager;
//enhance->set_para = disp_enhance_set_para;
#if 0
enhance->set_bright = disp_enhance_set_bright;
enhance->set_saturation = disp_enhance_set_saturation;
enhance->set_hue = disp_enhance_set_hue;
//enhance->set_contrast = disp_enhance_set_contrast;
enhance->set_mode = disp_enhance_set_mode;
enhance->set_window = disp_enhance_set_window;
#endif
enhance->init(enhance);
}
return 0;
}
