void
dumpregs(Ureg* ureg)
{
vlong mca, mct;
dumpregs2(ureg);
/*
* Processor control registers.
* If machine check exception, time stamp counter, page size extensions
* or enhanced virtual 8086 mode extensions are supported, there is a
* CR4. If there is a CR4 and machine check extensions, read the machine
* check address and machine check type registers if RDMSR supported.
*/
iprint(" CR0 %8.8lux CR2 %8.8lux CR3 %8.8lux",
getcr0(), getcr2(), getcr3());
if(m->cpuiddx & 0x9A){
iprint(" CR4 %8.8lux", getcr4());
if((m->cpuiddx & 0xA0) == 0xA0){
rdmsr(0x00, &mca);
rdmsr(0x01, &mct);
iprint("\n MCA %8.8llux MCT %8.8llux", mca, mct);
}
}
iprint("\n ur %#p up %#p\n", ureg, up);
}
void
dumpregs(Ureg* ureg)
{
dumpregs2(ureg);
/*
* Processor control registers.
* If machine check exception, time stamp counter, page size extensions
* or enhanced virtual 8086 mode extensions are supported, there is a
* CR4. If there is a CR4 and machine check extensions, read the machine
* check address and machine check type registers if RDMSR supported.
*/
iprint(" CR0 %8.8lux CR2 %8.8lux CR3 %8.8lux",
getcr0(), getcr2(), getcr3());
if(m->cpuiddx & (Mce|Tsc|Pse|Vmex)){
iprint(" CR4 %8.8lux\n", getcr4());
if(ureg->trap == 18)
dumpmcregs();
}
iprint("\n ur %#p up %#p\n", ureg, up);
}
