/*
* SoC implementation
*
* Perform System Agent Initialization during Ramstage phase.
*/
void soc_systemagent_init(struct device *dev)
{
/* Enable Power Aware Interrupt Routing */
enable_power_aware_intr();
/* Enable BIOS Reset CPL */
enable_bios_reset_cpl();
}
/*
* Punit Initialization code. This all isn't documented, but
* this is the recipe.
*/
static bool punit_init(void)
{
uint32_t reg;
uint32_t data;
struct stopwatch sw;
/* Thermal throttle activation offset */
configure_thermal_target();
/*
* Software Core Disable Mask (P_CR_CORE_DISABLE_MASK_0_0_0_MCHBAR).
* Enable all cores here.
*/
MCHBAR32(CORE_DISABLE_MASK) = 0x0;
/* P-Unit bring up */
reg = MCHBAR32(BIOS_RESET_CPL);
if (reg == 0xffffffff) {
/* P-unit not found */
printk(BIOS_DEBUG, "Punit MMIO not available\n");
return false;
}
/* Set Punit interrupt pin IPIN offset 3D */
pci_write_config8(SA_DEV_PUNIT, PCI_INTERRUPT_PIN, 0x2);
/* Set PUINT IRQ to 24 and INTPIN LOCK */
MCHBAR32(PUNIT_THERMAL_DEVICE_IRQ) =
PUINT_THERMAL_DEVICE_IRQ_VEC_NUMBER |
PUINT_THERMAL_DEVICE_IRQ_LOCK;
if (!CONFIG(SOC_INTEL_GLK)) {
data = MCHBAR32(0x7818);
data &= 0xFFFFE01F;
data |= 0x20 | 0x200;
MCHBAR32(0x7818) = data;
}
/* Stage0 BIOS Reset Complete (RST_CPL) */
enable_bios_reset_cpl();
/*
* Poll for bit 8 to check if PCODE has completed its action
* in reponse to BIOS Reset complete.
* We wait here till 1 ms for the bit to get set.
*/
stopwatch_init_msecs_expire(&sw, 1);
while (!(MCHBAR32(BIOS_RESET_CPL) & PCODE_INIT_DONE)) {
if (stopwatch_expired(&sw)) {
printk(BIOS_DEBUG, "PCODE Init Done Failure\n");
return false;
}
udelay(100);
}
return true;
}
