static int is_idle(struct fd_bo *bo)
{
return fd_bo_cpu_prep(bo, NULL,
DRM_FREEDRENO_PREP_READ |
DRM_FREEDRENO_PREP_WRITE |
DRM_FREEDRENO_PREP_NOSYNC) == 0;
}
static void *
fd_resource_transfer_map(struct pipe_context *pctx,
struct pipe_resource *prsc,
unsigned level, unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **pptrans)
{
struct fd_context *ctx = fd_context(pctx);
struct fd_resource *rsc = fd_resource(prsc);
struct pipe_transfer *ptrans = util_slab_alloc(&ctx->transfer_pool);
enum pipe_format format = prsc->format;
uint32_t op = 0;
char *buf;
if (!ptrans)
return NULL;
/* util_slab_alloc() doesn't zero: */
memset(ptrans, 0, sizeof(*ptrans));
pipe_resource_reference(&ptrans->resource, prsc);
ptrans->level = level;
ptrans->usage = usage;
ptrans->box = *box;
ptrans->stride = rsc->pitch * rsc->cpp;
ptrans->layer_stride = ptrans->stride;
/* some state trackers (at least XA) don't do this.. */
if (!(usage & PIPE_TRANSFER_FLUSH_EXPLICIT))
fd_resource_transfer_flush_region(pctx, ptrans, box);
buf = fd_bo_map(rsc->bo);
if (!buf) {
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
if (usage & PIPE_TRANSFER_READ)
op |= DRM_FREEDRENO_PREP_READ;
if (usage & PIPE_TRANSFER_WRITE)
op |= DRM_FREEDRENO_PREP_WRITE;
if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED))
fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op);
*pptrans = ptrans;
return buf +
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp;
}
static void *
fd_resource_transfer_map(struct pipe_context *pctx,
struct pipe_resource *prsc,
unsigned level, unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **pptrans)
{
struct fd_context *ctx = fd_context(pctx);
struct fd_resource *rsc = fd_resource(prsc);
struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
struct fd_transfer *trans;
struct pipe_transfer *ptrans;
enum pipe_format format = prsc->format;
uint32_t op = 0;
uint32_t offset;
char *buf;
int ret = 0;
DBG("prsc=%p, level=%u, usage=%x, box=%dx%d+%d,%d", prsc, level, usage,
box->width, box->height, box->x, box->y);
ptrans = util_slab_alloc(&ctx->transfer_pool);
if (!ptrans)
return NULL;
/* util_slab_alloc() doesn't zero: */
trans = fd_transfer(ptrans);
memset(trans, 0, sizeof(*trans));
pipe_resource_reference(&ptrans->resource, prsc);
ptrans->level = level;
ptrans->usage = usage;
ptrans->box = *box;
ptrans->stride = util_format_get_nblocksx(format, slice->pitch) * rsc->cpp;
ptrans->layer_stride = rsc->layer_first ? rsc->layer_size : slice->size0;
if (usage & PIPE_TRANSFER_READ)
op |= DRM_FREEDRENO_PREP_READ;
if (usage & PIPE_TRANSFER_WRITE)
op |= DRM_FREEDRENO_PREP_WRITE;
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
realloc_bo(rsc, fd_bo_size(rsc->bo));
if (rsc->stencil)
realloc_bo(rsc->stencil, fd_bo_size(rsc->stencil->bo));
fd_invalidate_resource(ctx, prsc);
} else if ((usage & PIPE_TRANSFER_WRITE) &&
prsc->target == PIPE_BUFFER &&
!util_ranges_intersect(&rsc->valid_buffer_range,
box->x, box->x + box->width)) {
/* We are trying to write to a previously uninitialized range. No need
* to wait.
*/
} else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
/* If the GPU is writing to the resource, or if it is reading from the
* resource and we're trying to write to it, flush the renders.
*/
if (((ptrans->usage & PIPE_TRANSFER_WRITE) &&
pending(rsc, FD_PENDING_READ | FD_PENDING_WRITE)) ||
pending(rsc, FD_PENDING_WRITE))
fd_context_render(pctx);
/* The GPU keeps track of how the various bo's are being used, and
* will wait if necessary for the proper operation to have
* completed.
*/
ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op);
if (ret)
goto fail;
}
buf = fd_bo_map(rsc->bo);
if (!buf)
goto fail;
offset = slice->offset +
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp +
fd_resource_layer_offset(rsc, slice, box->z);
if (prsc->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT ||
prsc->format == PIPE_FORMAT_X32_S8X24_UINT) {
assert(trans->base.box.depth == 1);
trans->base.stride = trans->base.box.width * rsc->cpp * 2;
trans->staging = malloc(trans->base.stride * trans->base.box.height);
if (!trans->staging)
goto fail;
/* if we're not discarding the whole range (or resource), we must copy
* the real data in.
*/
if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
PIPE_TRANSFER_DISCARD_RANGE))) {
struct fd_resource_slice *sslice =
fd_resource_slice(rsc->stencil, level);
void *sbuf = fd_bo_map(rsc->stencil->bo);
if (!sbuf)
goto fail;
float *depth = (float *)(buf + slice->offset +
fd_resource_layer_offset(rsc, slice, box->z) +
box->y * slice->pitch * 4 + box->x * 4);
uint8_t *stencil = sbuf + sslice->offset +
fd_resource_layer_offset(rsc->stencil, sslice, box->z) +
box->y * sslice->pitch + box->x;
if (format != PIPE_FORMAT_X32_S8X24_UINT)
util_format_z32_float_s8x24_uint_pack_z_float(
trans->staging, trans->base.stride,
depth, slice->pitch * 4,
box->width, box->height);
util_format_z32_float_s8x24_uint_pack_s_8uint(
trans->staging, trans->base.stride,
stencil, sslice->pitch,
box->width, box->height);
}
buf = trans->staging;
offset = 0;
} else if (rsc->internal_format != format &&
util_format_description(format)->layout == UTIL_FORMAT_LAYOUT_RGTC) {
assert(trans->base.box.depth == 1);
trans->base.stride = util_format_get_stride(
format, trans->base.box.width);
trans->staging = malloc(
util_format_get_2d_size(format, trans->base.stride,
trans->base.box.height));
if (!trans->staging)
goto fail;
/* if we're not discarding the whole range (or resource), we must copy
* the real data in.
*/
if (!(usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
PIPE_TRANSFER_DISCARD_RANGE))) {
uint8_t *rgba8 = (uint8_t *)buf + slice->offset +
fd_resource_layer_offset(rsc, slice, box->z) +
box->y * slice->pitch * rsc->cpp + box->x * rsc->cpp;
switch (format) {
case PIPE_FORMAT_RGTC1_UNORM:
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_UNORM:
case PIPE_FORMAT_LATC1_SNORM:
util_format_rgtc1_unorm_pack_rgba_8unorm(
trans->staging, trans->base.stride,
rgba8, slice->pitch * rsc->cpp,
box->width, box->height);
break;
case PIPE_FORMAT_RGTC2_UNORM:
case PIPE_FORMAT_RGTC2_SNORM:
case PIPE_FORMAT_LATC2_UNORM:
case PIPE_FORMAT_LATC2_SNORM:
util_format_rgtc2_unorm_pack_rgba_8unorm(
trans->staging, trans->base.stride,
rgba8, slice->pitch * rsc->cpp,
box->width, box->height);
break;
default:
assert(!"Unexpected format");
break;
}
}
buf = trans->staging;
offset = 0;
}
*pptrans = ptrans;
return buf + offset;
fail:
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
static void *
fd_resource_transfer_map(struct pipe_context *pctx,
struct pipe_resource *prsc,
unsigned level, unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **pptrans)
{
struct fd_context *ctx = fd_context(pctx);
struct fd_resource *rsc = fd_resource(prsc);
struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
struct pipe_transfer *ptrans;
enum pipe_format format = prsc->format;
uint32_t op = 0;
char *buf;
int ret = 0;
ptrans = util_slab_alloc(&ctx->transfer_pool);
if (!ptrans)
return NULL;
/* util_slab_alloc() doesn't zero: */
memset(ptrans, 0, sizeof(*ptrans));
pipe_resource_reference(&ptrans->resource, prsc);
ptrans->level = level;
ptrans->usage = usage;
ptrans->box = *box;
ptrans->stride = slice->pitch * rsc->cpp;
ptrans->layer_stride = slice->size0;
if (usage & PIPE_TRANSFER_READ)
op |= DRM_FREEDRENO_PREP_READ;
if (usage & PIPE_TRANSFER_WRITE)
op |= DRM_FREEDRENO_PREP_WRITE;
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)
op |= DRM_FREEDRENO_PREP_NOSYNC;
/* some state trackers (at least XA) don't do this.. */
if (!(usage & (PIPE_TRANSFER_FLUSH_EXPLICIT | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)))
fd_resource_transfer_flush_region(pctx, ptrans, box);
if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op);
if ((ret == -EBUSY) && (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))
realloc_bo(rsc, fd_bo_size(rsc->bo));
else if (ret)
goto fail;
}
buf = fd_bo_map(rsc->bo);
if (!buf) {
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
*pptrans = ptrans;
return buf + slice->offset +
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp +
box->z * slice->size0;
fail:
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
static void *
fd_resource_transfer_map(struct pipe_context *pctx,
struct pipe_resource *prsc,
unsigned level, unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **pptrans)
{
struct fd_context *ctx = fd_context(pctx);
struct fd_resource *rsc = fd_resource(prsc);
struct fd_resource_slice *slice = fd_resource_slice(rsc, level);
struct pipe_transfer *ptrans;
enum pipe_format format = prsc->format;
uint32_t op = 0;
uint32_t offset;
char *buf;
int ret = 0;
DBG("prsc=%p, level=%u, usage=%x", prsc, level, usage);
ptrans = util_slab_alloc(&ctx->transfer_pool);
if (!ptrans)
return NULL;
/* util_slab_alloc() doesn't zero: */
memset(ptrans, 0, sizeof(*ptrans));
pipe_resource_reference(&ptrans->resource, prsc);
ptrans->level = level;
ptrans->usage = usage;
ptrans->box = *box;
ptrans->stride = slice->pitch * rsc->cpp;
ptrans->layer_stride = slice->size0;
if (usage & PIPE_TRANSFER_READ)
op |= DRM_FREEDRENO_PREP_READ;
if (usage & PIPE_TRANSFER_WRITE)
op |= DRM_FREEDRENO_PREP_WRITE;
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
realloc_bo(rsc, fd_bo_size(rsc->bo));
fd_invalidate_resource(ctx, prsc);
} else if ((usage & PIPE_TRANSFER_WRITE) &&
prsc->target == PIPE_BUFFER &&
!util_ranges_intersect(&rsc->valid_buffer_range,
box->x, box->x + box->width)) {
/* We are trying to write to a previously uninitialized range. No need
* to wait.
*/
} else if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
/* If the GPU is writing to the resource, or if it is reading from the
* resource and we're trying to write to it, flush the renders.
*/
if (rsc->dirty ||
((ptrans->usage & PIPE_TRANSFER_WRITE) && rsc->reading))
fd_context_render(pctx);
/* The GPU keeps track of how the various bo's are being used, and
* will wait if necessary for the proper operation to have
* completed.
*/
ret = fd_bo_cpu_prep(rsc->bo, ctx->screen->pipe, op);
if (ret)
goto fail;
}
buf = fd_bo_map(rsc->bo);
if (!buf) {
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
*pptrans = ptrans;
if (rsc->layer_first) {
offset = slice->offset +
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp +
box->z * rsc->layer_size;
} else {
offset = slice->offset +
box->y / util_format_get_blockheight(format) * ptrans->stride +
box->x / util_format_get_blockwidth(format) * rsc->cpp +
box->z * slice->size0;
}
return buf + offset;
fail:
fd_resource_transfer_unmap(pctx, ptrans);
return NULL;
}
int main(int argc, char *argv[])
{
struct fd_device *dev;
struct fd_pipe *pipe;
struct fd_ringbuffer *ring;
struct fd_bo *bo;
uint32_t i = 0;
uint32_t *ptr;
int fd, ret;
fd = drmOpen("msm", NULL);
if (fd < 0) {
printf("failed to initialize DRM\n");
return fd;
}
dev = fd_device_new(fd);
if (!dev) {
printf("failed to initialize freedreno device\n");
return -1;
}
pipe = fd_pipe_new(dev, FD_PIPE_3D);
if (!pipe) {
printf("failed to initialize freedreno pipe\n");
return -1;
}
ring = fd_ringbuffer_new(pipe, 4096);
if (!ring) {
printf("failed to initialize freedreno ring\n");
return -1;
}
bo = fd_bo_new(dev, 4096, 0);
#define BASE REG_A3XX_GRAS_CL_VPORT_XOFFSET
#define SIZE 6
OUT_PKT0(ring, REG_AXXX_CP_SCRATCH_REG4, 1);
OUT_RING(ring, 0x123);
OUT_PKT0(ring, BASE, SIZE);
for (i = 0; i < SIZE; i++)
OUT_RING(ring, i);
/* this adds the value of CP_SCRATCH_REG4 to 0x111 and writes
* to REG_BASE+2
*/
OUT_PKT3(ring, CP_SET_CONSTANT, 3);
OUT_RING(ring, 0x80000000 | CP_REG(BASE + 2));
OUT_RING(ring, REG_AXXX_CP_SCRATCH_REG4);
OUT_RING(ring, 0x111);
/* read back all the regs: */
for (i = 0; i < SIZE; i++) {
OUT_PKT3(ring, CP_REG_TO_MEM, 2);
OUT_RING(ring, BASE + i);
OUT_RELOCW(ring, bo, i * 4, 0, 0);
}
fd_ringbuffer_flush(ring);
/* and read back the values: */
fd_bo_cpu_prep(bo, pipe, DRM_FREEDRENO_PREP_READ);
ptr = fd_bo_map(bo);
for (i = 0; i < SIZE; i++) {
printf("%02x: %08x\n", i, ptr[i]);
}
fd_bo_cpu_fini(bo);
return 0;
}