void net_init(void) {
/* Load network configuration file */
net_read_config();
/* Register events for network handler*/
EV_NET_SEND = esim_register_event_with_name(net_event_handler,
net_domain_index, "net_send");
EV_NET_OUTPUT_BUFFER = esim_register_event_with_name(
net_event_handler, net_domain_index, "net_output_buffer");
EV_NET_INPUT_BUFFER = esim_register_event_with_name(
net_event_handler, net_domain_index, "net_input_buffer");
EV_NET_RECEIVE = esim_register_event_with_name(
net_event_handler, net_domain_index, "net_receive");
/* Report file */
if (*net_report_file_name) {
net_report_file = file_open_for_write(net_report_file_name);
if (!net_report_file)
fatal("%s: cannot write on network report file", net_report_file_name);
}
/* Visualization File */
if (*net_visual_file_name) {
net_visual_file = file_open_for_write(net_visual_file_name);
if (!net_visual_file)
fatal("%s: cannot write on network visualization file",
net_visual_file_name);
}
}
void frm_spatial_report_config_read(struct config_t *config)
{
char *section;
char *file_name;
/*Nothing if section or config is not present */
section = frm_spatial_report_section_name;
if (!config_section_exists(config, section))
{
/*no spatial profiling */
return;
}
/* Spatial reports are active */
frm_spatial_report_active = 1;
/* Interval */
config_var_enforce(config, section, "Interval");
spatial_profiling_interval = config_read_int(config, section,
"Interval", spatial_profiling_interval);
/* File name */
config_var_enforce(config, section, "File");
file_name = config_read_string(config, section, "File", NULL);
if (!file_name || !*file_name)
fatal("%s: %s: invalid or missing value for 'File'",
frm_spatial_report_section_name, section);
spatial_report_filename = str_set(NULL, file_name);
spatial_report_file = file_open_for_write(spatial_report_filename);
if (!spatial_report_file)
fatal("%s: could not open spatial report file",
spatial_report_filename);
}
/* Initialize GPU kernel */
void si_emu_init()
{
/* Register architecture */
si_emu_arch = arch_list_register("SouthernIslands", "si");
si_emu_arch->sim_kind = si_emu_sim_kind;
/* Open report file */
if (*si_emu_report_file_name)
{
si_emu_report_file = file_open_for_write(si_emu_report_file_name);
if (!si_emu_report_file)
fatal("%s: cannot open report for Southern Islands emulator",
si_emu_report_file_name);
}
/* Initialize */
si_emu = xcalloc(1, sizeof(struct si_emu_t));
si_emu->timer = m2s_timer_create("Southern Islands GPU Timer");
si_emu->global_mem = mem_create();
si_emu->global_mem->safe = 0;
/* CB0 and CB1 are going to map to the beginning of the virtual address space */
si_emu->global_mem_top = GLOBAL_MEMORY_START;
/* Initialize disassembler (decoding tables...) */
si_disasm_init();
/* Initialize ISA (instruction execution tables...) */
si_isa_init();
/* Initialize OpenCL objects */
si_emu->opencl_repo = si_opencl_repo_create();
si_emu->opencl_platform = si_opencl_platform_create();
si_emu->opencl_device = si_opencl_device_create();
}
void evg_spatial_report_config_read(struct config_t *config) {
char *section;
/* Nothing if section or config is not present */
section = evg_spatial_report_section_name;
if (!config_section_exists(config, section)) {
/*no spatial profiling */
return;
}
/* Spatial reports are active */
evg_spatial_report_active = 1;
/* Interval */
config_var_enforce(config, section, "Interval");
spatial_profiling_interval =
config_read_int(config, section, "Interval", spatial_profiling_interval);
spatial_report_file = file_open_for_write(spatial_report_filename);
if (!spatial_report_file)
fatal("%s: could not open spatial report file", spatial_report_filename);
// FILE *f = spatial_report_file ;
/*fprintf(f,"CU,CFInst,MemAcc,TEXInstn,ALUInstn,Cycles\n");*/
}
struct mem_system_snapshot_t *mem_system_snapshot_create(void)
{
struct mem_system_snapshot_t *snapshot;
snapshot = xcalloc(1, sizeof(struct mem_system_snapshot_t));
snapshot->last_snapshot = 0;
snapshot->mem_snapshot_region_size = 1;
snapshot->snapshot_blocks_in_bits = 0;
int x = mem_snapshot_block_size;
if ((x == 0) || ((x & (x - 1)) != 0))
{
fatal("%s: choose the memory snapshot block size as a "
"power of two value\n",__FUNCTION__);
}
while (x >> 1)
{
x = x >> 1;
snapshot->snapshot_blocks_in_bits++;
snapshot->mem_snapshot_region_size <<= 1;
}
/* Create a temp file for load access */
snprintf(snapshot->load_file_name, sizeof snapshot->load_file_name,
"mem_snapshot_load_accesses");
snapshot->snapshot_load = file_open_for_write(snapshot->load_file_name);
if (!snapshot->snapshot_load)
fatal("Mem_snapshot_load: cannot write on snapshot file");
/* Create a temp file for store accesses */
snprintf(snapshot->store_file_name, sizeof snapshot->store_file_name,
"mem_snapshot_store_accesses");
snapshot->snapshot_store = file_open_for_write(snapshot->store_file_name);
if (!snapshot->snapshot_store)
fatal("Mem_snapshot_store: cannot write on snapshot file");
snapshot->mem_regions_loads = list_create();
snapshot->mem_regions_stores = list_create();
return snapshot;
}
struct mod_mshr_record_t* mod_mshr_record_create(struct mod_t *mod)
{
struct mod_mshr_record_t *mshr_record;
mshr_record = xcalloc(1, sizeof(struct mod_mshr_record_t));
/* Create a temp file for load access */
snprintf(mshr_record->access_record_file_name, sizeof mshr_record->access_record_file_name,
"mod_%s_mshr_access",mod->name);
mshr_record->access_record_file = file_open_for_write(
mshr_record->access_record_file_name);
if (!mshr_record->access_record_file)
fatal("%s:Module mshr recorder: cannot write on snapshot file",__FUNCTION__);
return mshr_record;
}
void dram_system_init(void)
{
dram_system_read_config();
/* Register events */
EV_DRAM_COMMAND_RECEIVE = esim_register_event(dram_event_handler, dram_domain_index);
EV_DRAM_COMMAND_COMPLETE = esim_register_event(dram_event_handler, dram_domain_index);
if (*dram_report_file_name)
{
dram_report_file = file_open_for_write(dram_report_file_name);
if (!dram_report_file)
fatal("%s: cannot write on DRAM report file", dram_report_file_name);
}
}
void X86CpuDestroy(X86Cpu *self) {
int i;
FILE *f;
/* Dump report */
f = file_open_for_write(x86_cpu_report_file_name);
if (f) {
X86CpuDumpReport(self, f);
fclose(f);
}
/* Uop trace list */
X86CpuEmptyTraceList(self);
linked_list_free(self->uop_trace_list);
/* Free cores */
for (i = 0; i < x86_cpu_num_cores; i++) delete (self->cores[i]);
free(self->cores);
}
void frm_emu_init(void)
{
/* Classes */
CLASS_REGISTER(FrmEmu);
/* Open report file */
if (*frm_emu_report_file_name)
{
frm_emu_report_file = file_open_for_write(frm_emu_report_file_name);
if (!frm_emu_report_file)
fatal("%s: cannot open report for Fermi emulator",
frm_emu_report_file_name);
}
/* Create emulator */
frm_emu = new(FrmEmu);
/* Initialize disassembler (decoding tables...) */
frm_disasm_init();
/* Initialize ISA (instruction execution tables...) */
frm_isa_init();
}
void evg_gpu_dump_report(void)
{
struct evg_compute_unit_t *compute_unit;
struct mod_t *local_mod;
int compute_unit_id;
FILE *f;
double inst_per_cycle;
double cf_inst_per_cycle;
double alu_inst_per_cycle;
double tex_inst_per_cycle;
long long coalesced_reads;
long long coalesced_writes;
char vliw_occupancy[MAX_STRING_SIZE];
/* Open file */
f = file_open_for_write(evg_gpu_report_file_name);
if (!f)
return;
/* Dump GPU configuration */
fprintf(f, ";\n; GPU Configuration\n;\n\n");
evg_config_dump(f);
/* Report for device */
fprintf(f, ";\n; Simulation Statistics\n;\n\n");
inst_per_cycle = asTiming(evg_gpu)->cycle ? (double) asEmu(evg_emu)->instructions
/ asTiming(evg_gpu)->cycle : 0.0;
fprintf(f, "[ Device ]\n\n");
fprintf(f, "NDRangeCount = %d\n", evg_emu->ndrange_count);
fprintf(f, "Instructions = %lld\n", asEmu(evg_emu)->instructions);
fprintf(f, "Cycles = %lld\n", asTiming(evg_gpu)->cycle);
fprintf(f, "InstructionsPerCycle = %.4g\n", inst_per_cycle);
fprintf(f, "\n\n");
/* Report for compute units */
EVG_GPU_FOREACH_COMPUTE_UNIT(compute_unit_id)
{
compute_unit = evg_gpu->compute_units[compute_unit_id];
local_mod = compute_unit->local_memory;
inst_per_cycle = compute_unit->cycle ? (double) compute_unit->inst_count
/ compute_unit->cycle : 0.0;
cf_inst_per_cycle = compute_unit->cycle ? (double) compute_unit->cf_engine.inst_count
/ compute_unit->cycle : 0.0;
alu_inst_per_cycle = compute_unit->alu_engine.cycle ? (double) compute_unit->alu_engine.inst_count
/ compute_unit->alu_engine.cycle : 0.0;
tex_inst_per_cycle = compute_unit->tex_engine.cycle ? (double) compute_unit->tex_engine.inst_count
/ compute_unit->tex_engine.cycle : 0.0;
coalesced_reads = local_mod->reads - local_mod->effective_reads;
coalesced_writes = local_mod->writes - local_mod->effective_writes;
snprintf(vliw_occupancy, MAX_STRING_SIZE, "%lld %lld %lld %lld %lld",
compute_unit->alu_engine.vliw_slots[0],
compute_unit->alu_engine.vliw_slots[1],
compute_unit->alu_engine.vliw_slots[2],
compute_unit->alu_engine.vliw_slots[3],
compute_unit->alu_engine.vliw_slots[4]);
fprintf(f, "[ ComputeUnit %d ]\n\n", compute_unit_id);
fprintf(f, "WorkGroupCount = %lld\n", compute_unit->mapped_work_groups);
fprintf(f, "Instructions = %lld\n", compute_unit->inst_count);
fprintf(f, "Cycles = %lld\n", compute_unit->cycle);
fprintf(f, "InstructionsPerCycle = %.4g\n", inst_per_cycle);
fprintf(f, "\n");
fprintf(f, "CFEngine.Instructions = %lld\n", compute_unit->cf_engine.inst_count);
fprintf(f, "CFEngine.InstructionsPerCycle = %.4g\n", cf_inst_per_cycle);
fprintf(f, "CFEngine.ALUClauseTriggers = %lld\n", compute_unit->cf_engine.alu_clause_trigger_count);
fprintf(f, "CFEngine.TEXClauseTriggers = %lld\n", compute_unit->cf_engine.tex_clause_trigger_count);
fprintf(f, "CFEngine.GlobalMemWrites = %lld\n", compute_unit->cf_engine.global_mem_write_count);
fprintf(f, "\n");
fprintf(f, "ALUEngine.WavefrontCount = %lld\n", compute_unit->alu_engine.wavefront_count);
fprintf(f, "ALUEngine.Instructions = %lld\n", compute_unit->alu_engine.inst_count);
fprintf(f, "ALUEngine.InstructionSlots = %lld\n", compute_unit->alu_engine.inst_slot_count);
fprintf(f, "ALUEngine.LocalMemorySlots = %lld\n", compute_unit->alu_engine.local_mem_slot_count);
fprintf(f, "ALUEngine.VLIWOccupancy = %s\n", vliw_occupancy);
fprintf(f, "ALUEngine.Cycles = %lld\n", compute_unit->alu_engine.cycle);
fprintf(f, "ALUEngine.InstructionsPerCycle = %.4g\n", alu_inst_per_cycle);
fprintf(f, "\n");
fprintf(f, "TEXEngine.WavefrontCount = %lld\n", compute_unit->tex_engine.wavefront_count);
fprintf(f, "TEXEngine.Instructions = %lld\n", compute_unit->tex_engine.inst_count);
fprintf(f, "TEXEngine.Cycles = %lld\n", compute_unit->tex_engine.cycle);
fprintf(f, "TEXEngine.InstructionsPerCycle = %.4g\n", tex_inst_per_cycle);
fprintf(f, "\n");
fprintf(f, "LocalMemory.Accesses = %lld\n", local_mod->reads + local_mod->writes);
fprintf(f, "LocalMemory.Reads = %lld\n", local_mod->reads);
fprintf(f, "LocalMemory.EffectiveReads = %lld\n", local_mod->effective_reads);
fprintf(f, "LocalMemory.CoalescedReads = %lld\n", coalesced_reads);
fprintf(f, "LocalMemory.Writes = %lld\n", local_mod->writes);
fprintf(f, "LocalMemory.EffectiveWrites = %lld\n", local_mod->effective_writes);
fprintf(f, "LocalMemory.CoalescedWrites = %lld\n", coalesced_writes);
fprintf(f, "\n\n");
}
}
void si_gpu_dump_report(void)
{
struct si_compute_unit_t *compute_unit;
struct mod_t *local_mod;
int compute_unit_id;
FILE *f;
double inst_per_cycle;
long long coalesced_reads;
long long coalesced_writes;
/* Open file */
f = file_open_for_write(si_gpu_report_file_name);
if (!f)
return;
/* Dump GPU configuration */
fprintf(f, ";\n; GPU Configuration\n;\n\n");
si_config_dump(f);
/* Report for device */
fprintf(f, ";\n; Simulation Statistics\n;\n\n");
inst_per_cycle = si_gpu->cycle ? (double) si_emu->inst_count / si_gpu->cycle : 0.0;
fprintf(f, "[ Device ]\n\n");
fprintf(f, "NDRangeCount = %d\n", si_emu->ndrange_count);
fprintf(f, "Instructions = %lld\n", si_emu->inst_count);
fprintf(f, "Scalar ALU Instructions = %lld\n", si_emu->scalar_alu_inst_count);
fprintf(f, "Scalar Mem Instructions = %lld\n", si_emu->scalar_mem_inst_count);
fprintf(f, "Vector ALU Instructions = %lld\n", si_emu->vector_alu_inst_count);
fprintf(f, "Vector Mem Instructions = %lld\n", si_emu->vector_mem_inst_count);
fprintf(f, "Cycles = %lld\n", si_gpu->cycle);
fprintf(f, "InstructionsPerCycle = %.4g\n", inst_per_cycle);
fprintf(f, "\n\n");
/* Report for compute units */
SI_GPU_FOREACH_COMPUTE_UNIT(compute_unit_id)
{
compute_unit = si_gpu->compute_units[compute_unit_id];
local_mod = compute_unit->local_memory;
inst_per_cycle = compute_unit->cycle ? (double) compute_unit->inst_count
/ compute_unit->cycle : 0.0;
coalesced_reads = local_mod->reads - local_mod->effective_reads;
coalesced_writes = local_mod->writes - local_mod->effective_writes;
fprintf(f, "[ ComputeUnit %d ]\n\n", compute_unit_id);
fprintf(f, "WorkGroupCount = %lld\n", compute_unit->mapped_work_groups);
fprintf(f, "Instructions = %lld\n", compute_unit->inst_count);
fprintf(f, "Scalar ALU Instructions = %lld\n", compute_unit->scalar_alu_inst_count);
fprintf(f, "Scalar Mem Instructions = %lld\n", compute_unit->scalar_mem_inst_count);
fprintf(f, "Vector ALU Instructions = %lld\n", compute_unit->vector_alu_inst_count);
fprintf(f, "Vector Mem Instructions = %lld\n", compute_unit->vector_mem_inst_count);
fprintf(f, "Cycles = %lld\n", compute_unit->cycle);
fprintf(f, "InstructionsPerCycle = %.4g\n", inst_per_cycle);
fprintf(f, "\n");
fprintf(f, "LocalMemory.Accesses = %lld\n", local_mod->reads + local_mod->writes);
fprintf(f, "LocalMemory.Reads = %lld\n", local_mod->reads);
fprintf(f, "LocalMemory.EffectiveReads = %lld\n", local_mod->effective_reads);
fprintf(f, "LocalMemory.CoalescedReads = %lld\n", coalesced_reads);
fprintf(f, "LocalMemory.Writes = %lld\n", local_mod->writes);
fprintf(f, "LocalMemory.EffectiveWrites = %lld\n", local_mod->effective_writes);
fprintf(f, "LocalMemory.CoalescedWrites = %lld\n", coalesced_writes);
fprintf(f, "\n\n");
}
}
static void x86_cpu_dump_report(void)
{
FILE *f;
int core, thread;
long long now;
/* Open file */
f = file_open_for_write(x86_cpu_report_file_name);
if (!f)
return;
/* Get CPU timer value */
now = m2s_timer_get_value(x86_emu->timer);
/* Dump CPU configuration */
fprintf(f, ";\n; CPU Configuration\n;\n\n");
x86_cpu_config_dump(f);
/* Report for the complete processor */
fprintf(f, ";\n; Simulation Statistics\n;\n\n");
fprintf(f, "; Global statistics\n");
fprintf(f, "[ Global ]\n\n");
fprintf(f, "Cycles = %lld\n", x86_cpu->cycle);
fprintf(f, "Time = %.2f\n", (double) now / 1000000);
fprintf(f, "CyclesPerSecond = %.0f\n", now ? (double) x86_cpu->cycle / now * 1000000 : 0.0);
fprintf(f, "MemoryUsed = %lu\n", (long) mem_mapped_space);
fprintf(f, "MemoryUsedMax = %lu\n", (long) mem_max_mapped_space);
fprintf(f, "\n");
/* Dispatch stage */
fprintf(f, "; Dispatch stage\n");
x86_cpu_dump_uop_report(f, x86_cpu->num_dispatched_uinst_array, "Dispatch", x86_cpu_dispatch_width);
/* Issue stage */
fprintf(f, "; Issue stage\n");
x86_cpu_dump_uop_report(f, x86_cpu->num_issued_uinst_array, "Issue", x86_cpu_issue_width);
/* Commit stage */
fprintf(f, "; Commit stage\n");
x86_cpu_dump_uop_report(f, x86_cpu->num_committed_uinst_array, "Commit", x86_cpu_commit_width);
/* Committed branches */
fprintf(f, "; Committed branches\n");
fprintf(f, "; Branches - Number of committed control uops\n");
fprintf(f, "; Squashed - Number of mispredicted uops squashed from the ROB\n");
fprintf(f, "; Mispred - Number of mispredicted branches in the correct path\n");
fprintf(f, "; PredAcc - Prediction accuracy\n");
fprintf(f, "Commit.Branches = %lld\n", x86_cpu->num_branch_uinst);
fprintf(f, "Commit.Squashed = %lld\n", x86_cpu->num_squashed_uinst);
fprintf(f, "Commit.Mispred = %lld\n", x86_cpu->num_mispred_branch_uinst);
fprintf(f, "Commit.PredAcc = %.4g\n", x86_cpu->num_branch_uinst ?
(double) (x86_cpu->num_branch_uinst - x86_cpu->num_mispred_branch_uinst) / x86_cpu->num_branch_uinst : 0.0);
fprintf(f, "\n");
/* Report for each core */
X86_CORE_FOR_EACH
{
/* Core */
fprintf(f, "\n; Statistics for core %d\n", core);
fprintf(f, "[ c%d ]\n\n", core);
/* Functional units */
fprintf(f, "; Functional unit pool\n");
fprintf(f, "; Accesses - Number of uops issued to a f.u.\n");
fprintf(f, "; Denied - Number of requests denied due to busy f.u.\n");
fprintf(f, "; WaitingTime - Average number of waiting cycles to reserve f.u.\n");
DUMP_FU_STAT(IntAdd, x86_fu_intadd);
DUMP_FU_STAT(IntMult, x86_fu_intmult);
DUMP_FU_STAT(IntDiv, x86_fu_intdiv);
DUMP_FU_STAT(Effaddr, x86_fu_effaddr);
DUMP_FU_STAT(Logic, x86_fu_logic);
DUMP_FU_STAT(FPSimple, x86_fu_fpsimple);
DUMP_FU_STAT(FPAdd, x86_fu_fpadd);
DUMP_FU_STAT(FPMult, x86_fu_fpmult);
DUMP_FU_STAT(FPDiv, x86_fu_fpdiv);
DUMP_FU_STAT(FPComplex, x86_fu_fpcomplex);
fprintf(f, "\n");
/* Dispatch slots */
if (x86_cpu_dispatch_kind == x86_cpu_dispatch_kind_timeslice)
{
fprintf(f, "; Dispatch slots usage (sum = cycles * dispatch width)\n");
fprintf(f, "; used - dispatch slot was used by a non-spec uop\n");
fprintf(f, "; spec - used by a mispeculated uop\n");
fprintf(f, "; ctx - no context allocated to thread\n");
fprintf(f, "; uopq,rob,iq,lsq,rename - no space in structure\n");
DUMP_DISPATCH_STAT(used);
DUMP_DISPATCH_STAT(spec);
DUMP_DISPATCH_STAT(uop_queue);
DUMP_DISPATCH_STAT(rob);
DUMP_DISPATCH_STAT(iq);
DUMP_DISPATCH_STAT(lsq);
DUMP_DISPATCH_STAT(rename);
DUMP_DISPATCH_STAT(ctx);
fprintf(f, "\n");
}
/* Dispatch stage */
fprintf(f, "; Dispatch stage\n");
x86_cpu_dump_uop_report(f, X86_CORE.num_dispatched_uinst_array, "Dispatch", x86_cpu_dispatch_width);
/* Issue stage */
fprintf(f, "; Issue stage\n");
x86_cpu_dump_uop_report(f, X86_CORE.num_issued_uinst_array, "Issue", x86_cpu_issue_width);
/* Commit stage */
fprintf(f, "; Commit stage\n");
x86_cpu_dump_uop_report(f, X86_CORE.num_committed_uinst_array, "Commit", x86_cpu_commit_width);
/* Committed branches */
fprintf(f, "; Committed branches\n");
fprintf(f, "Commit.Branches = %lld\n", X86_CORE.num_branch_uinst);
fprintf(f, "Commit.Squashed = %lld\n", X86_CORE.num_squashed_uinst);
fprintf(f, "Commit.Mispred = %lld\n", X86_CORE.num_mispred_branch_uinst);
fprintf(f, "Commit.PredAcc = %.4g\n", X86_CORE.num_branch_uinst ?
(double) (X86_CORE.num_branch_uinst - X86_CORE.num_mispred_branch_uinst) / X86_CORE.num_branch_uinst : 0.0);
fprintf(f, "\n");
/* Occupancy stats */
fprintf(f, "; Structure statistics (reorder buffer, instruction queue,\n");
fprintf(f, "; load-store queue, and integer/floating-point register file)\n");
fprintf(f, "; Size - Available size\n");
fprintf(f, "; Occupancy - Average number of occupied entries\n");
fprintf(f, "; Full - Number of cycles when the structure was full\n");
fprintf(f, "; Reads, Writes - Accesses to the structure\n");
if (x86_rob_kind == x86_rob_kind_shared)
DUMP_CORE_STRUCT_STATS(ROB, rob);
if (x86_iq_kind == x86_iq_kind_shared)
{
DUMP_CORE_STRUCT_STATS(IQ, iq);
fprintf(f, "IQ.WakeupAccesses = %lld\n", X86_CORE.iq_wakeup_accesses);
}
if (x86_lsq_kind == x86_lsq_kind_shared)
DUMP_CORE_STRUCT_STATS(LSQ, lsq);
if (x86_reg_file_kind == x86_reg_file_kind_shared)
{
DUMP_CORE_STRUCT_STATS(RF_Int, reg_file_int);
DUMP_CORE_STRUCT_STATS(RF_Fp, reg_file_fp);
}
fprintf(f, "\n");
/* Report for each thread */
X86_THREAD_FOR_EACH
{
fprintf(f, "\n; Statistics for core %d - thread %d\n", core, thread);
fprintf(f, "[ c%dt%d ]\n\n", core, thread);
/* Dispatch stage */
fprintf(f, "; Dispatch stage\n");
x86_cpu_dump_uop_report(f, X86_THREAD.num_dispatched_uinst_array, "Dispatch", x86_cpu_dispatch_width);
/* Issue stage */
fprintf(f, "; Issue stage\n");
x86_cpu_dump_uop_report(f, X86_THREAD.num_issued_uinst_array, "Issue", x86_cpu_issue_width);
/* Commit stage */
fprintf(f, "; Commit stage\n");
x86_cpu_dump_uop_report(f, X86_THREAD.num_committed_uinst_array, "Commit", x86_cpu_commit_width);
/* Committed branches */
fprintf(f, "; Committed branches\n");
fprintf(f, "Commit.Branches = %lld\n", X86_THREAD.num_branch_uinst);
fprintf(f, "Commit.Squashed = %lld\n", X86_THREAD.num_squashed_uinst);
fprintf(f, "Commit.Mispred = %lld\n", X86_THREAD.num_mispred_branch_uinst);
fprintf(f, "Commit.PredAcc = %.4g\n", X86_THREAD.num_branch_uinst ?
(double) (X86_THREAD.num_branch_uinst - X86_THREAD.num_mispred_branch_uinst) / X86_THREAD.num_branch_uinst : 0.0);
fprintf(f, "\n");
/* Occupancy stats */
fprintf(f, "; Structure statistics (reorder buffer, instruction queue, load-store queue,\n");
fprintf(f, "; integer/floating-point register file, and renaming table)\n");
if (x86_rob_kind == x86_rob_kind_private)
DUMP_THREAD_STRUCT_STATS(ROB, rob);
if (x86_iq_kind == x86_iq_kind_private)
{
DUMP_THREAD_STRUCT_STATS(IQ, iq);
fprintf(f, "IQ.WakeupAccesses = %lld\n", X86_THREAD.iq_wakeup_accesses);
}
if (x86_lsq_kind == x86_lsq_kind_private)
DUMP_THREAD_STRUCT_STATS(LSQ, lsq);
if (x86_reg_file_kind == x86_reg_file_kind_private)
{
DUMP_THREAD_STRUCT_STATS(RF_Int, reg_file_int);
DUMP_THREAD_STRUCT_STATS(RF_Fp, reg_file_fp);
}
fprintf(f, "RAT.IntReads = %lld\n", X86_THREAD.rat_int_reads);
fprintf(f, "RAT.IntWrites = %lld\n", X86_THREAD.rat_int_writes);
fprintf(f, "RAT.FpReads = %lld\n", X86_THREAD.rat_fp_reads);
fprintf(f, "RAT.FpWrites = %lld\n", X86_THREAD.rat_fp_writes);
fprintf(f, "BTB.Reads = %lld\n", X86_THREAD.btb_reads);
fprintf(f, "BTB.Writes = %lld\n", X86_THREAD.btb_writes);
fprintf(f, "\n");
/* Trace cache stats */
if (X86_THREAD.trace_cache)
x86_trace_cache_dump_report(X86_THREAD.trace_cache, f);
}
}
/* Close */
fclose(f);
}
