int exynos5430_cfg_clk_isp(struct platform_device *pdev)
{
/* CMU_ISP */
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_isp_400_user", "aclk_isp_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_isp_dis_400_user", "aclk_isp_dis_400");
/* ISP */
fimc_is_set_rate_dt(pdev, "dout_aclk_isp_c_200", 207 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_aclk_isp_d_200", 207 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_isp", 83 * 1000000);
/* DIS */
fimc_is_set_rate_dt(pdev, "dout_pclk_isp_dis", 207 * 1000000);
/* ISP QE CLK GATE */
fimc_is_enable_dt(pdev, "gate_bts_3dnr");
fimc_is_enable_dt(pdev, "gate_bts_dis1");
fimc_is_enable_dt(pdev, "gate_bts_dis0");
fimc_is_enable_dt(pdev, "gate_bts_scalerc");
fimc_is_enable_dt(pdev, "gate_bts_drc");
fimc_is_disable_dt(pdev, "gate_bts_3dnr");
fimc_is_disable_dt(pdev, "gate_bts_dis1");
fimc_is_disable_dt(pdev, "gate_bts_dis0");
fimc_is_disable_dt(pdev, "gate_bts_scalerc");
fimc_is_disable_dt(pdev, "gate_bts_drc");
return 0;
}
int exynos5422_fimc_is_sensor_iclk_cfg(struct platform_device *pdev,
u32 scenario,
u32 channel)
{
int ret = 0;
pr_info("clk_cfg:(ch%d),scenario(%d)\n", channel, scenario);
switch (channel) {
case 0:
/* MIPI-CSIS0 */
fimc_is_set_parent_dt(pdev, "mout_gscl_wrap_a", "mout_mpll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_gscl_wrap_a", (532 * 1000000));
fimc_is_get_rate_dt(pdev, "dout_gscl_wrap_a");
break;
case 1:
/* FL1_550_CAM */
fimc_is_set_parent_dt(pdev, "mout_aclk_fl1_550_cam", "mout_mpll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_fl1_550_cam", (76 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_fl1_550_cam_sw", "dout_aclk_fl1_550_cam");
fimc_is_set_parent_dt(pdev, "mout_aclk_fl1_550_cam_user", "mout_aclk_fl1_550_cam_sw");
fimc_is_set_rate_dt(pdev, "dout2_cam_blk_550", (38 * 1000000));
/* MIPI-CSIS1 */
fimc_is_set_parent_dt(pdev, "mout_gscl_wrap_b", "mout_mpll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_gscl_wrap_b", (76 * 1000000));
fimc_is_get_rate_dt(pdev, "dout_gscl_wrap_b");
break;
default:
pr_err("channel is invalid(%d)\n", channel);
break;
}
return ret;
}
int exynos5422_cfg_clk_cam(struct platform_device *pdev)
{
pr_info("%s\n", __func__);
/* CMU TOP */
/* 333_432_GSCL */
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_gscl", "mout_ipll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_333_432_gscl", (432 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_gscl_sw", "dout_aclk_333_432_gscl");
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_gscl_user", "mout_aclk_333_432_gscl_sw");
/* 432_CAM */
fimc_is_set_parent_dt(pdev, "mout_aclk_432_cam", "mout_ipll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_432_cam", (432 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_432_cam_sw", "dout_aclk_432_cam");
fimc_is_set_parent_dt(pdev, "mout_aclk_432_cam_user", "mout_aclk_432_cam_sw");
/* 550_CAM */
fimc_is_set_parent_dt(pdev, "mout_aclk_550_cam", "mout_mpll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_550_cam", (532 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_550_cam_sw", "dout_aclk_550_cam");
fimc_is_set_parent_dt(pdev, "mout_aclk_550_cam_user", "mout_aclk_550_cam_sw");
/* CMU CAM */
/* CLKDIV2_GSCL_BLK_333 */
fimc_is_set_rate_dt(pdev, "dout2_gscl_blk_333", (217 * 1000000));
/* CLKDIV2_CAM_BLK_432 */
fimc_is_set_rate_dt(pdev, "dout2_cam_blk_432", (217 * 1000000));
return 0;
}
static int pn547_clk_initialize(struct pn547_dev *pn547_dev)
{
#if defined(CONFIG_SOC_EXYNOS5422)
pn547_dev->clk = clk_get(&pn547_dev->client->dev, "sclk_isp_sensor1");
if (IS_ERR(pn547_dev->clk)) {
pr_err("%s : clk not found\n", __func__);
return -EPERM;
}
#elif defined(CONFIG_SOC_EXYNOS5430)
if (pn547_dev->clk_use_check == CLK_USE_CAM1) {
u32 frequency;
int ret;
ret = fimc_is_set_parent_dt(pn547_dev->pdev, "mout_sclk_isp_sensor1", "oscclk");
if (ret) {
pr_err("%s, fimc_is_set_parent_dt:%d\n", __func__, ret);
return -EPERM;
}
ret = fimc_is_set_rate_dt(pn547_dev->pdev, "dout_sclk_isp_sensor1_a", 24 * 1000000);
if (ret) {
pr_err("%s, fimc_is_set_rate_dt A:%d\n", __func__, ret);
return -EPERM;
}
ret = fimc_is_set_rate_dt(pn547_dev->pdev, "dout_sclk_isp_sensor1_b", 24 * 1000000);
if (ret) {
pr_err("%s, fimc_is_set_rate_dt B:%d\n", __func__, ret);
return -EPERM;
}
frequency = fimc_is_get_rate_dt(pn547_dev->pdev, "sclk_isp_sensor1");
pr_info("%s(mclk : %d)\n", __func__, frequency);
}
#endif
return 0;
}
int exynos5430_fimc_is_sensor_mclk_on(struct platform_device *pdev,
u32 scenario,
u32 channel)
{
u32 frequency;
char mux_name[30];
char div_a_name[30];
char div_b_name[30];
char sclk_name[30];
pr_debug("%s\n", __func__);
snprintf(mux_name, sizeof(mux_name), "mout_sclk_isp_sensor%d", channel);
snprintf(div_a_name, sizeof(div_a_name), "dout_sclk_isp_sensor%d_a", channel);
snprintf(div_b_name, sizeof(div_b_name), "dout_sclk_isp_sensor%d_b", channel);
snprintf(sclk_name, sizeof(sclk_name), "sclk_isp_sensor%d", channel);
fimc_is_set_parent_dt(pdev, mux_name, "oscclk");
fimc_is_set_rate_dt(pdev, div_a_name, 24 * 1000000);
fimc_is_set_rate_dt(pdev, div_b_name, 24 * 1000000);
frequency = fimc_is_get_rate_dt(pdev, sclk_name);
pr_info("%s(%d, mclk : %d)\n", __func__, channel, frequency);
return 0;
}
int exynos5430_cfg_clk_sclk(struct platform_device *pdev)
{
#ifndef CONFIG_COMPANION_USE
/* SCLK_SPI0 */
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi0", "mout_bus_pll_user");
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi0_a", 275 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi0_b", 46 * 1000000);
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi0_user", "sclk_isp_spi0_top");
#endif
/* SCLK_SPI1 */
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi1", "mout_bus_pll_user");
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi1_a", 275 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi1_b", 46 * 1000000);
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi1_user", "sclk_isp_spi1_top");
return 0;
}
static int exynos5430_cfg_clk_isp_pll_off(struct platform_device *pdev)
{
pr_info("%s\n", __func__);
fimc_is_set_parent_dt(pdev, "mout_isp_pll", "fin_pll");
fimc_is_disable_dt(pdev, "fout_isp_pll");
return 0;
}
int exynos5430_cfg_clk_cam1_spi(struct platform_device *pdev)
{
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_333_user", "aclk_cam1_333");
/* SPI */
fimc_is_set_rate_dt(pdev, "dout_pclk_cam1_83", 84 * 1000000);
return 0;
}
int exynos5430_cfg_clk_div_max(struct platform_device *pdev)
{
/* SCLK */
#ifndef CONFIG_COMPANION_USE
/* SCLK_SPI0 */
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi0", "oscclk");
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi0_a", 1);
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi0_user", "oscclk");
/* SCLK_SPI1 */
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi1", "oscclk");
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_spi1_a", 1);
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_spi1_user", "oscclk");
#endif
/* SCLK_UART */
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_uart", "oscclk");
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_uart", 1);
fimc_is_set_parent_dt(pdev, "mout_sclk_isp_uart_user", "oscclk");
/* CAM1 */
/* C-A5 */
fimc_is_set_rate_dt(pdev, "dout_atclk_cam1", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_dbg_cam1", 1);
return 0;
}
int exynos5422_cfg_clk_sclk(struct platform_device *pdev)
{
pr_info("%s\n", __func__);
#ifndef CONFIG_COMPANION_USE
/* SCLK_SPI0_ISP */
fimc_is_set_parent_dt(pdev, "mout_spi0_isp", "mout_spll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_spi0_isp", 200 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_spi0_isp_pre", 100 * 1000000);
/* SCLK_SPI1_ISP */
fimc_is_set_parent_dt(pdev, "mout_spi1_isp", "mout_spll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_spi1_isp", 200 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_spi1_isp_pre", 100 * 1000000);
#endif
/* SCLK_UART_ISP */
fimc_is_set_parent_dt(pdev, "mout_uart_isp", "fin_pll");
fimc_is_set_rate_dt(pdev, "dout_uart_isp", (24* 1000000));
/* SCLK_PWM_ISP */
fimc_is_set_parent_dt(pdev, "mout_pwm_isp", "fin_pll");
fimc_is_set_rate_dt(pdev, "dout_pwm_isp", (2 * 1000000));
return 0;
}
int exynos5422_fimc_is_sensor_mclk_on(struct platform_device *pdev,
u32 scenario,
u32 channel)
{
u32 frequency;
char div_name[30];
char sclk_name[30];
pr_info("%s:ch(%d)\n", __func__, channel);
snprintf(div_name, sizeof(div_name), "dout_isp_sensor%d", channel);
snprintf(sclk_name, sizeof(sclk_name), "sclk_isp_sensor%d", channel);
fimc_is_set_parent_dt(pdev, "mout_isp_sensor", "fin_pll");
fimc_is_set_rate_dt(pdev, div_name, (24 * 1000000));
fimc_is_enable_dt(pdev, sclk_name);
frequency = fimc_is_get_rate_dt(pdev, div_name);
switch (channel) {
case SENSOR_CONTROL_I2C0:
fimc_is_enable_dt(pdev, "sclk_gscl_wrap_a");
fimc_is_enable_dt(pdev, "clk_camif_top_fimcl0");
fimc_is_enable_dt(pdev, "clk_camif_top_fimcl3");
fimc_is_enable_dt(pdev, "gscl_fimc_lite0");
fimc_is_enable_dt(pdev, "gscl_fimc_lite3");
fimc_is_enable_dt(pdev, "clk_gscl_wrap_a");
break;
case SENSOR_CONTROL_I2C1:
case SENSOR_CONTROL_I2C2:
fimc_is_enable_dt(pdev, "sclk_gscl_wrap_b");
fimc_is_enable_dt(pdev, "clk_camif_top_fimcl1");
fimc_is_enable_dt(pdev, "gscl_fimc_lite1");
fimc_is_enable_dt(pdev, "clk_gscl_wrap_b");
break;
default:
pr_err("channel is invalid(%d)\n", channel);
break;
}
fimc_is_enable_dt(pdev, "clk_camif_top_csis0");
fimc_is_enable_dt(pdev, "clk_xiu_si_gscl_cam");
fimc_is_enable_dt(pdev, "clk_noc_p_rstop_fimcl");
pr_info("%s(%d, mclk : %d)\n", __func__, channel, frequency);
return 0;
}
int exynos5430_cfg_clk_cam1(struct platform_device *pdev)
{
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_552_user", "aclk_cam1_552");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_400_user", "aclk_cam1_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_333_user", "aclk_cam1_333");
/* C-A5 */
fimc_is_set_rate_dt(pdev, "dout_atclk_cam1", 276 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_dbg_cam1", 138 * 1000000);
/* LITE A */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_c_a", "mout_aclk_cam1_400_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_c_b", "mout_aclk_cam1_333_user");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_c", 333 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_c", 166 * 1000000);
/* FD */
fimc_is_set_parent_dt(pdev, "mout_aclk_fd_a", "mout_aclk_cam1_400_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_fd_b", "mout_aclk_fd_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_fd", 413 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_fd", 207 * 1000000);
/* CSI 2 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis2_a", "mout_aclk_cam1_400_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis2_b", "mout_aclk_cam1_333_user");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis2_a", 333 * 1000000);
/* MPWM */
fimc_is_set_rate_dt(pdev, "dout_pclk_cam1_166", 167 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_cam1_83", 84 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_sclk_isp_mpwm", 84 * 1000000);
/* CAM1 QE CLK GATE */
fimc_is_enable_dt(pdev, "gate_bts_fd");
fimc_is_disable_dt(pdev, "gate_bts_fd");
return 0;
}
int exynos5430_fimc_is_sensor_mclk_off(struct platform_device *pdev,
u32 scenario,
u32 channel)
{
char mux_name[30];
char div_a_name[30];
char div_b_name[30];
char sclk_name[30];
pr_debug("%s\n", __func__);
snprintf(mux_name, sizeof(mux_name), "mout_sclk_isp_sensor%d", channel);
snprintf(div_a_name, sizeof(div_a_name), "dout_sclk_isp_sensor%d_a", channel);
snprintf(div_b_name, sizeof(div_b_name), "dout_sclk_isp_sensor%d_b", channel);
snprintf(sclk_name, sizeof(sclk_name), "sclk_isp_sensor%d", channel);
fimc_is_set_parent_dt(pdev, mux_name, "oscclk");
fimc_is_set_rate_dt(pdev, div_a_name, 1);
fimc_is_set_rate_dt(pdev, div_b_name, 1);
fimc_is_get_rate_dt(pdev, sclk_name);
return 0;
}
int exynos5430_fimc_is_sensor_iclk_cfg(struct platform_device *pdev,
u32 scenario,
u32 channel)
{
int ret = 0;
if (scenario != SENSOR_SCENARIO_VISION)
return ret;
pr_info("clk_cfg(ch%d)\n", channel);
switch (channel) {
case 0:
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_552_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_333_user", "oscclk");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s4", "oscclk");
/* MIPI-CSIS0 */
fimc_is_set_rate_dt(pdev, "dout_aclk_csis0", 1);
/* FIMC-LITE0 */
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_a", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_a", 1);
/* FIMC-LITE3 */
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_d", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_d", 1);
/* ASYNC, FLITE, 3AA, SMMU, QE ... */
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_400", 1);
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_200", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_cam0_50", 1);
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_552_user", "aclk_cam0_552");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400_user", "aclk_cam0_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_333_user", "aclk_cam0_333");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s4", "phyclk_rxbyteclkhs0_s4");
/* MIPI-CSIS0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis0_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis0_b", "mout_aclk_csis0_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis0", 552 * 1000000);
/* FIMC-LITE0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_a_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_a_b", "mout_aclk_lite_a_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_a", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_a", 276 * 1000000);
/* FIMC-LITE3 */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_d_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_d_b", "mout_aclk_lite_d_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_d", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_d", 276 * 1000000);
/* ASYNC, FLITE, 3AA, SMMU, QE ... */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400", "mout_aclk_cam0_400_user");
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_400", 400 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_200", 200 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_cam0_50", 50 * 1000000);
/* FIMC-LITE2 PIXELASYNC */
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c_init", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_pixelasync_lite_c", 1);
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c", 1);
/* FIMC-LITE2 PIXELASYNC */
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_init_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_init_b", "mout_sclk_pixelasync_lite_c_init_a");
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c_init", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_pixelasync_lite_c", 276 * 1000000);
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_b", "mout_aclk_cam0_333_user");
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c", 333 * 1000000);
break;
case 1:
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_552_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_333_user", "oscclk");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2a", "oscclk");
/* MIPI-CSIS1 */
fimc_is_set_rate_dt(pdev, "dout_aclk_csis1", 1);
/* FIMC-LITE1 */
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_b", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_b", 1);
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_552_user", "aclk_cam0_552");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400_user", "aclk_cam0_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_333_user", "aclk_cam0_333");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2a", "phyclk_rxbyteclkhs0_s2a");
/* MIPI-CSIS1 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis1_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis1_b", "mout_aclk_csis1_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis1", 552 * 1000000);
/* FIMC-LITE1 */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_b_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_b_b", "mout_aclk_lite_b_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_b", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_b", 276 * 1000000);
break;
case 2:
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_552_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_400_user", "oscclk");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_333_user", "oscclk");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2b", "oscclk");
/* MIPI-CSIS2 */
fimc_is_set_rate_dt(pdev, "dout_aclk_csis2_a", 1);
/* FIMC-LITE2 */
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_c", 1);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_c", 1);
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_552_user", "aclk_cam1_552");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_400_user", "aclk_cam1_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam1_333_user", "aclk_cam1_333");
/* MIPI-CSIS PHY */
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2b", "phyclk_rxbyteclkhs0_s2b");
/* MIPI-CSIS2 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis2_a", "mout_aclk_cam1_400_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis2_b", "mout_aclk_cam1_333_user");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis2_a", 333 * 1000000);
break;
default:
pr_err("channel is invalid(%d)\n", channel);
break;
}
return ret;
}
int exynos5430_cfg_clk_cam0(struct platform_device *pdev)
{
/* USER_MUX_SEL */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_552_user", "aclk_cam0_552");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400_user", "aclk_cam0_400");
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_333_user", "aclk_cam0_333");
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s4", "phyclk_rxbyteclkhs0_s4");
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2a", "phyclk_rxbyteclkhs0_s2a");
fimc_is_set_parent_dt(pdev, "mout_phyclk_rxbyteclkhs0_s2b", "phyclk_rxbyteclkhs0_s2b");
/* LITE A */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_a_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_a_b", "mout_aclk_lite_a_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_a", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_a", 276 * 1000000);
/* LITE B */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_b_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_b_b", "mout_aclk_lite_b_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_b", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_b", 276 * 1000000);
/* LITE D */
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_d_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_lite_d_b", "mout_aclk_lite_d_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_lite_d", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_lite_d", 276 * 1000000);
/* LITE C PIXELASYNC */
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_init_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_init_b", "mout_sclk_pixelasync_lite_c_init_a");
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c_init", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_pixelasync_lite_c", 276 * 1000000);
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_sclk_pixelasync_lite_c_b", "mout_aclk_cam0_333_user");
fimc_is_set_rate_dt(pdev, "dout_sclk_pixelasync_lite_c", 333 * 1000000);
/* 3AA 0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_3aa0_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_3aa0_b", "mout_aclk_3aa0_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_3aa0", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_3aa0", 276 * 1000000);
/* 3AA 0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_3aa1_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_3aa1_b", "mout_aclk_3aa1_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_3aa1", 552 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_3aa1", 276 * 1000000);
/* CSI 0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis0_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis0_b", "mout_aclk_csis0_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis0", 552 * 1000000);
/* CSI 1 */
fimc_is_set_parent_dt(pdev, "mout_aclk_csis1_a", "mout_aclk_cam0_552_user");
fimc_is_set_parent_dt(pdev, "mout_aclk_csis1_b", "mout_aclk_csis1_a");
fimc_is_set_rate_dt(pdev, "dout_aclk_csis1", 552 * 1000000);
/* CAM0 400 */
fimc_is_set_parent_dt(pdev, "mout_aclk_cam0_400", "mout_aclk_cam0_400_user");
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_400", 413 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_aclk_cam0_200", 207 * 1000000);
fimc_is_set_rate_dt(pdev, "dout_pclk_cam0_50", 52 * 1000000);
return 0;
}
int exynos5422_cfg_clk_isp(struct platform_device *pdev)
{
/* CMU TOP */
/* 333_432_ISP0 */
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp0", "mout_ipll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_333_432_isp0", (432 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp0_sw", "dout_aclk_333_432_isp0");
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp0_user", "mout_aclk_333_432_isp0_sw");
/* 333_432_ISP */
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp", "mout_ipll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_333_432_isp", (432 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp_sw", "dout_aclk_333_432_isp");
fimc_is_set_parent_dt(pdev, "mout_aclk_333_432_isp_user", "mout_aclk_333_432_isp_sw");
/* 400_ISP */
fimc_is_set_parent_dt(pdev, "mout_aclk_400_isp", "mout_mpll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_400_isp", (532 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_400_isp_sw", "dout_aclk_400_isp");
fimc_is_set_parent_dt(pdev, "mout_aclk_400_isp_user", "mout_aclk_400_isp_sw");
/* 266_ISP */
fimc_is_set_parent_dt(pdev, "mout_aclk_266_isp", "mout_ipll_ctrl");
fimc_is_set_rate_dt(pdev, "dout_aclk_266_isp", (432 * 1000000));
fimc_is_set_parent_dt(pdev, "mout_aclk_266_isp_sw", "dout_aclk_266_isp");
fimc_is_set_parent_dt(pdev, "mout_aclk_266_isp_user", "mout_aclk_266_isp_sw");
/* CMU ISP */
/* ACLK_MCUISP_DIV0 */
fimc_is_set_rate_dt(pdev, "dout_mcuispdiv0", (267 * 1000000));
/* ACLK_MCUISP_DIV1 */
fimc_is_set_rate_dt(pdev, "dout_mcuispdiv1", (134 * 1000000));
/* ACLK_DIV0 */
fimc_is_set_rate_dt(pdev, "dout_ispdiv0", (216 * 1000000));
/* ACLK_DIV1 */
fimc_is_set_rate_dt(pdev, "dout_ispdiv1", (108 * 1000000));
/* ACLK_DIV2 */
fimc_is_set_rate_dt(pdev, "dout_ispdiv2", (54 * 1000000));
return 0;
}
