/*---------------------------------------------------------------------------*/
void
node_id_burn(unsigned short id)
{
unsigned char data[10];
unsigned short val;
data[0] = magic_id[0];
data[1] = magic_id[1];
data[2] = 0x02;
data[3] = 0x12;
data[4] = 0x74;
data[5] = 0x00;
data[6] = 0x00;
data[7] = 0x01;
#if 0
flash_setup();
flash_clear((unsigned long)ADDR_INFOMEM_A);
memcpy(&val, &data[0], 2);
flash_write((unsigned long)ADDR_INFOMEM_A, val);
memcpy(&val, &data[2], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 2), val);
memcpy(&val, &data[4], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 4), val);
memcpy(&val, &data[6], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 6), val);
flash_write((unsigned long)(ADDR_INFOMEM_A + 8), id);
flash_done();
#endif
}
void flush_rom()
{
if(pageRAMaddr!=0)
{
flash_clear((void*)pageRAMaddr);
ram2flash((void*)pageRAMaddr, pageRAM,512);
pageRAMaddr=0;
}
}
/*----------------------------------------------------------------------------*/
static inline void
clear_slot(id)
{
uintptr_t ptr;
int j;
ptr = SLOT_START_ADDR(id);
for(j = 0; j < SLOT_SIZE / SEG_SIZE; j++) {
flash_clear((unsigned short *)(ptr + j * SEG_SIZE));
}
}
static void erasearea_flash(void *start, size_t size) {
#if USE_BLOCKWRITING
rom_erase(size, (off_t)(uintptr_t)start);
#endif
flash_setup();
while (size > ROM_ERASE_UNIT_SIZE) {
flash_clear(start);
size -= ROM_ERASE_UNIT_SIZE;
start = (char*) start + ROM_ERASE_UNIT_SIZE;
}
flash_done();
}
void flash_write(uint16_t addr, void* sdata, uint16_t size) {
FCTL2 = FWKEY + FSSEL1 + FN1; // MCLK/3 for Flash Timing Generator
flash_clear(addr); // Block must always be cleared before writing
FCTL3 = FWKEY; // Clear Lock bit
FCTL1 = FWKEY + WRT; // Set WRT bit for write operation
memcpy((char*)sdata, (char*)&addr, size);
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY + LOCK; // Set LOCK bit
}
void
nvm_data_write(void)
{
uint8_t i;
uint16_t *flash_ptr = (uint16_t *)CETIC_6LBR_NVM_ADDRESS;
uint16_t *data = (uint16_t *)&nvm_data;
flash_setup();
flash_clear((unsigned short *)flash_ptr);
for(i = 0; i < CETIC_6LBR_NVM_SIZE/2; i++)
{
flash_write((unsigned short *)flash_ptr, *data);
flash_ptr++;
data++;
}
flash_done();
LOG6LBR_INFO("Flashing 6LBR NVM done\n");
}
void flash_store(unsigned char fb[8])
{
FCTL2 = FWKEY + FSSEL1 + FN1; // MCLK/3 for Flash Timing Generator
flash_clear(); // Block must always be cleared before writing
char *Flash_ptr;
Flash_ptr = (char *) 0x1001; //Point to Info Flash segment D
FCTL3 = FWKEY; // Clear Lock bit
FCTL1 = FWKEY + WRT; // Set WRT bit for write operation
*Flash_ptr++ = fb[0]; //OID
*Flash_ptr++ = fb[1];
*Flash_ptr++ = fb[2];
*Flash_ptr++ = fb[3]; //OID
*Flash_ptr++ = fb[4]; //CodeBlock
*Flash_ptr++ = fb[5];
*Flash_ptr++ = fb[6];
*Flash_ptr++ = fb[7]; //CodeBlock
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY + LOCK; // Set LOCK bit
sleep_jiffies (100* TIMER1_JIFFIES_PER_MS);
}
/*--------------------------------------------------------------------------*/
int
main(int argc, char **argv)
{
/*
* Initalize hardware.
*/
msp430_cpu_init();
clock_init();
leds_init();
leds_on(LEDS_RED);
uart1_init(BAUD2UBR(115200)); /* Must come before first printf */
#if NETSTACK_CONF_WITH_IPV4
slip_arch_init(BAUD2UBR(115200));
#endif /* NETSTACK_CONF_WITH_IPV4 */
leds_on(LEDS_GREEN);
/* xmem_init(); */
rtimer_init();
lcd_init();
PRINTF(CONTIKI_VERSION_STRING "\n");
/*
* Hardware initialization done!
*/
leds_on(LEDS_RED);
/* Restore node id if such has been stored in external mem */
// node_id_restore();
#ifdef NODEID
node_id = NODEID;
#ifdef BURN_NODEID
flash_setup();
flash_clear(0x1800);
flash_write(0x1800, node_id);
flash_done();
#endif /* BURN_NODEID */
#endif /* NODE_ID */
if(node_id == 0) {
node_id = *((unsigned short *)0x1800);
}
memset(node_mac, 0, sizeof(node_mac));
node_mac[6] = node_id >> 8;
node_mac[7] = node_id & 0xff;
/* for setting "hardcoded" IEEE 802.15.4 MAC addresses */
#ifdef MAC_1
{
uint8_t ieee[] = { MAC_1, MAC_2, MAC_3, MAC_4, MAC_5, MAC_6, MAC_7, MAC_8 };
memcpy(node_mac, ieee, sizeof(uip_lladdr.addr));
}
#endif
/*
* Initialize Contiki and our processes.
*/
process_init();
process_start(&etimer_process, NULL);
ctimer_init();
set_rime_addr();
cc2420_init();
{
uint8_t longaddr[8];
uint16_t shortaddr;
shortaddr = (linkaddr_node_addr.u8[0] << 8) +
linkaddr_node_addr.u8[1];
memset(longaddr, 0, sizeof(longaddr));
linkaddr_copy((linkaddr_t *)&longaddr, &linkaddr_node_addr);
printf("MAC %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
longaddr[0], longaddr[1], longaddr[2], longaddr[3],
longaddr[4], longaddr[5], longaddr[6], longaddr[7]);
cc2420_set_pan_addr(IEEE802154_PANID, shortaddr, longaddr);
}
leds_off(LEDS_ALL);
if(node_id > 0) {
PRINTF("Node id %u.\n", node_id);
} else {
PRINTF("Node id not set.\n");
}
#if NETSTACK_CONF_WITH_IPV6
memcpy(&uip_lladdr.addr, node_mac, sizeof(uip_lladdr.addr));
/* Setup nullmac-like MAC for 802.15.4 */
queuebuf_init();
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %lu %u\n",
NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0 ? 1:
NETSTACK_RDC.channel_check_interval()),
CC2420_CONF_CHANNEL);
process_start(&tcpip_process, NULL);
printf("IPv6 ");
{
uip_ds6_addr_t *lladdr;
int i;
lladdr = uip_ds6_get_link_local(-1);
for(i = 0; i < 7; ++i) {
printf("%02x%02x:", lladdr->ipaddr.u8[i * 2],
lladdr->ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n", lladdr->ipaddr.u8[14], lladdr->ipaddr.u8[15]);
}
if(!UIP_CONF_IPV6_RPL) {
uip_ipaddr_t ipaddr;
int i;
uip_ip6addr(&ipaddr, UIP_DS6_DEFAULT_PREFIX, 0, 0, 0, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
printf("Tentative global IPv6 address ");
for(i = 0; i < 7; ++i) {
printf("%02x%02x:",
ipaddr.u8[i * 2], ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n",
ipaddr.u8[7 * 2], ipaddr.u8[7 * 2 + 1]);
}
#else /* NETSTACK_CONF_WITH_IPV6 */
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %lu %u\n",
NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0? 1:
NETSTACK_RDC.channel_check_interval()),
CC2420_CONF_CHANNEL);
#endif /* NETSTACK_CONF_WITH_IPV6 */
#if !NETSTACK_CONF_WITH_IPV6
uart1_set_input(serial_line_input_byte);
serial_line_init();
#endif
#if TIMESYNCH_CONF_ENABLED
timesynch_init();
timesynch_set_authority_level(linkaddr_node_addr.u8[0]);
#endif /* TIMESYNCH_CONF_ENABLED */
/* process_start(&sensors_process, NULL);
SENSORS_ACTIVATE(button_sensor);*/
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
print_processes(autostart_processes);
autostart_start(autostart_processes);
duty_cycle_scroller_start(CLOCK_SECOND * 2);
/*
* This is the scheduler loop.
*/
watchdog_start();
watchdog_stop(); /* Stop the wdt... */
while(1) {
int r;
do {
/* Reset watchdog. */
watchdog_periodic();
r = process_run();
} while(r > 0);
/*
* Idle processing.
*/
int s = splhigh(); /* Disable interrupts. */
/* uart1_active is for avoiding LPM3 when still sending or receiving */
if(process_nevents() != 0 || uart1_active()) {
splx(s); /* Re-enable interrupts. */
} else {
static unsigned long irq_energest = 0;
/* Re-enable interrupts and go to sleep atomically. */
ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
/* We only want to measure the processing done in IRQs when we
are asleep, so we discard the processing time done when we
were awake. */
energest_type_set(ENERGEST_TYPE_IRQ, irq_energest);
watchdog_stop();
_BIS_SR(GIE | SCG0 | SCG1 | CPUOFF); /* LPM3 sleep. This
statement will block
until the CPU is
woken up by an
interrupt that sets
the wake up flag. */
/* We get the current processing time for interrupts that was
done during the LPM and store it for next time around. */
dint();
irq_energest = energest_type_time(ENERGEST_TYPE_IRQ);
eint();
watchdog_start();
ENERGEST_SWITCH(ENERGEST_TYPE_LPM, ENERGEST_TYPE_CPU);
}
}
}
