ir_node *copy_const_value(dbg_info *dbg, ir_node *n, ir_node *block)
{
ir_graph *irg = get_irn_irg(block);
/* @@@ GL I think we should implement this using the routines from irgopt
* for dead node elimination/inlineing. */
ir_mode *m = get_irn_mode(n);
ir_node *nn;
switch (get_irn_opcode(n)) {
case iro_Const:
nn = new_rd_Const(dbg, irg, get_Const_tarval(n));
break;
case iro_SymConst:
nn = new_rd_SymConst(dbg, irg, get_irn_mode(n), get_SymConst_symbol(n), get_SymConst_kind(n));
break;
case iro_Add:
nn = new_rd_Add(dbg, block,
copy_const_value(dbg, get_Add_left(n), block),
copy_const_value(dbg, get_Add_right(n), block), m);
break;
case iro_Sub:
nn = new_rd_Sub(dbg, block,
copy_const_value(dbg, get_Sub_left(n), block),
copy_const_value(dbg, get_Sub_right(n), block), m);
break;
case iro_Mul:
nn = new_rd_Mul(dbg, block,
copy_const_value(dbg, get_Mul_left(n), block),
copy_const_value(dbg, get_Mul_right(n), block), m);
break;
case iro_And:
nn = new_rd_And(dbg, block,
copy_const_value(dbg, get_And_left(n), block),
copy_const_value(dbg, get_And_right(n), block), m);
break;
case iro_Or:
nn = new_rd_Or(dbg, block,
copy_const_value(dbg, get_Or_left(n), block),
copy_const_value(dbg, get_Or_right(n), block), m);
break;
case iro_Eor:
nn = new_rd_Eor(dbg, block,
copy_const_value(dbg, get_Eor_left(n), block),
copy_const_value(dbg, get_Eor_right(n), block), m);
break;
case iro_Conv:
nn = new_rd_Conv(dbg, block,
copy_const_value(dbg, get_Conv_op(n), block), m);
break;
case iro_Minus:
nn = new_rd_Minus(dbg, block,
copy_const_value(dbg, get_Minus_op(n), block), m);
break;
case iro_Not:
nn = new_rd_Not(dbg, block,
copy_const_value(dbg, get_Not_op(n), block), m);
break;
case iro_Unknown:
nn = new_r_Unknown(irg, m);
break;
default:
panic("opcode invalid or not implemented %+F", n);
}
return nn;
}
void x86_create_address_mode(x86_address_t *addr, ir_node *node,
x86_create_am_flags_t flags)
{
addr->imm.kind = X86_IMM_VALUE;
if (eat_immediate(addr, node, true)) {
addr->variant = addr->ip_base ? X86_ADDR_RIP : X86_ADDR_JUST_IMM;
return;
}
assert(!addr->ip_base);
if (!(flags & x86_create_am_force) && x86_is_non_address_mode_node(node)
&& (!(flags & x86_create_am_double_use) || get_irn_n_edges(node) > 2)) {
addr->variant = X86_ADDR_BASE;
addr->base = node;
return;
}
ir_node *eat_imms = eat_immediates(addr, node, flags, false);
if (eat_imms != node) {
if (flags & x86_create_am_force)
eat_imms = be_skip_downconv(eat_imms, true);
node = eat_imms;
if (x86_is_non_address_mode_node(node)) {
addr->variant = X86_ADDR_BASE;
addr->base = node;
return;
}
}
/* starting point Add, Sub or Shl, FrameAddr */
if (is_Shl(node)) {
/* We don't want to eat add x, x as shl here, so only test for real Shl
* instructions, because we want the former as Lea x, x, not Shl x, 1 */
if (eat_shl(addr, node)) {
addr->variant = X86_ADDR_INDEX;
return;
}
} else if (eat_immediate(addr, node, true)) {
/* we can hit this case in x86_create_am_force mode */
addr->variant = addr->ip_base ? X86_ADDR_RIP : X86_ADDR_JUST_IMM;
return;
} else if (is_Add(node)) {
ir_node *left = get_Add_left(node);
ir_node *right = get_Add_right(node);
if (flags & x86_create_am_force) {
left = be_skip_downconv(left, true);
right = be_skip_downconv(right, true);
}
left = eat_immediates(addr, left, flags, false);
right = eat_immediates(addr, right, flags, false);
if (eat_shl(addr, left)) {
left = NULL;
} else if (eat_shl(addr, right)) {
right = NULL;
}
/* (x & 0xFFFFFFFC) + (x >> 2) -> lea(x >> 2, x >> 2, 4) */
if (left != NULL && right != NULL) {
ir_node *and;
ir_node *shr;
if (is_And(left) && (is_Shr(right) || is_Shrs(right))) {
and = left;
shr = right;
goto tryit;
}
if (is_And(right) && (is_Shr(left) || is_Shrs(left))) {
and = right;
shr = left;
tryit:
if (get_And_left(and) == get_binop_left(shr)) {
ir_node *and_right = get_And_right(and);
ir_node *shr_right = get_binop_right(shr);
if (is_Const(and_right) && is_Const(shr_right)) {
ir_tarval *and_mask = get_Const_tarval(and_right);
ir_tarval *shift_amount = get_Const_tarval(shr_right);
ir_mode *mode = get_irn_mode(and);
ir_tarval *all_one = get_mode_all_one(mode);
ir_tarval *shift_mask = tarval_shl(tarval_shr(all_one, shift_amount), shift_amount);
long val = get_tarval_long(shift_amount);
if (and_mask == shift_mask && val >= 0 && val <= 3) {
addr->variant = X86_ADDR_BASE_INDEX;
addr->base = shr;
addr->index = shr;
addr->scale = val;
return;
}
}
}
}
}
if (left != NULL) {
ir_node *base = addr->base;
if (base == NULL) {
addr->variant = addr->index != NULL ? X86_ADDR_BASE_INDEX
: X86_ADDR_BASE;
addr->base = left;
} else {
addr->variant = X86_ADDR_BASE_INDEX;
assert(addr->index == NULL && addr->scale == 0);
assert(right == NULL);
/* esp must be used as base */
if (is_Proj(left) && is_Start(get_Proj_pred(left))) {
addr->index = base;
addr->base = left;
} else {
addr->index = left;
}
}
}
if (right != NULL) {
ir_node *base = addr->base;
if (base == NULL) {
addr->variant = addr->index != NULL ? X86_ADDR_BASE_INDEX
: X86_ADDR_BASE;
addr->base = right;
} else {
addr->variant = X86_ADDR_BASE_INDEX;
assert(addr->index == NULL && addr->scale == 0);
/* esp must be used as base */
if (is_Proj(right) && is_Start(get_Proj_pred(right))) {
addr->index = base;
addr->base = right;
} else {
addr->index = right;
}
}
}
return;
}
addr->variant = X86_ADDR_BASE;
addr->base = node;
}
