int board_eth_init(bd_t *bis) { /* @todo implement this function */ //eth_clk_set(ETH_CLKSRC_SYS_D3,900*CLK_1M/3,50*CLK_1M); eth_clk_set(ETH_CLKSRC_SYS_D3,get_cpu_clk()*2/3,50*CLK_1M); // GPIOX59-X67 for M2_socket // GPIOE_57/NA nRst; eth_set_pinmux(ETH_BANK1_GPIOX59_X67,ETH_CLK_OUT_GPIOX68_REG3_14,0); CLEAR_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1); SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, (1 << 1)); SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1); udelay(100); /*reset*/ set_gpio_val(GPIOX_bank_bit32_63(57), GPIOX_bit_bit32_63(57), 0); set_gpio_mode(GPIOX_bank_bit32_63(57), GPIOX_bit_bit32_63(57), GPIO_OUTPUT_MODE); udelay(100); set_gpio_val(GPIOX_bank_bit32_63(57), GPIOX_bit_bit32_63(57), 1); set_gpio_mode(GPIOX_bank_bit32_63(57), GPIOX_bit_bit32_63(57), GPIO_OUTPUT_MODE); udelay(10); //waiting reset end; aml_eth_init(bis); return 0; }
unsigned long get_ahb_clk(void) { unsigned long clk = get_cpu_clk(); unsigned long reg = __raw_readl(REG_CLKDIV) & 0x3000000; if(reg == 0x3000000) clk >>= 3; else if(reg == 0x2000000)
unsigned int get_ddr_clk(void) { unsigned int ddr_clk; switch( *BSP_CGU_SYS & 0x7){ case 0: ddr_clk = get_cpu_clk(); break; case 2: ddr_clk = get_cpu_clk()/2; break; case 3: ddr_clk = get_cpu_clk()/5 * 2; break; case 4: ddr_clk = get_cpu_clk()/3; break; } return ddr_clk; }
int eth_io_init(void) { #if 0 int chip=2953; int selectclk,n; int clk; char *s = getenv("machid"); if(s) { chip=simple_strtoul(s,NULL,10); printf("get machid from env=%d\n",chip); } else { printf("not set the machid,used default(%d)\n",chip); } udelay(100); writel(readl(ETH_PLL_CNTL) & ~(1 << 0), ETH_PLL_CNTL); // Disable the Ethernet clocks // --------------------------------------------- // Test 50Mhz Input Divide by 2 // --------------------------------------------- // Select divide by 2 writel(readl(ETH_PLL_CNTL) | (0 << 3), ETH_PLL_CNTL); // desc endianess "same order" writel(readl(ETH_PLL_CNTL) | (0 << 2), ETH_PLL_CNTL); // data endianess "little" writel(readl(ETH_PLL_CNTL) | (1 << 1), ETH_PLL_CNTL); // divide by 2 for 100M writel(readl(ETH_PLL_CNTL) | (1 << 0), ETH_PLL_CNTL); // enable Ethernet clocks /* 5,6,7 sata 4-extern pad 3-other_pll_clk 2-ddr_pll_clk 1-APLL_CLK_OUT_400M 0----sys_pll_div3 (333~400Mhz) */ clk=get_cpu_clk();//a9 clk clk=clk<<1;//sys_pll; printf("get sys clk=%d\n",clk); if(((clk/3)%50000000)!=0) { printf("ERROR:a9_clk*2 must 3 times of 50M,a9 clk=%d\n",clk>>1); n=6; }
void start_arcboot(void) { DECLARE_GLOBAL_DATA_PTR; static gd_t gd_data; static bd_t bd_data; init_fnc_t **init_fnc_ptr; extern void *__text_end; unsigned stage = sizeof(init_sequence)/sizeof(init_sequence[0]); show_boot_progress(stage--); /* Init Global Data */ gd = global_data = &gd_data; gd->bd = &bd_data; gd->cpu_clk=get_cpu_clk(); gd->bd->bi_boot_params=BOOT_PARAMS_OFFSET; gd->bd->bi_memstart=PHYS_MEMORY_START; gd->bd->bi_memsize=PHYS_MEMORY_SIZE; gd->bd->bi_flashstart=CONFIG_SYS_FLASH_BASE; gd->bd->bi_flashoffset=0; /* frame buffer will sit after end of program */ gd->fb_base = TEXT_BASE; for (init_fnc_ptr = init_sequence;*init_fnc_ptr;++init_fnc_ptr) { show_boot_progress(stage--); if ((*init_fnc_ptr)() != 0) { printf("stage:%d",stage); hang(); } } /* Setup malloc area */ mem_malloc_init((ulong)&_start - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN); // __builtin_arc_sleep(0); #ifdef CONFIG_CMD_NAND puts ("NAND: "); nand_init(); #endif env_relocate(); stdio_init (); /* get the devices list going. */ jumptable_init(); console_init_r(); #ifdef CONFIG_MMC mmc_initialize(&bd_data); #endif #ifdef CONFIG_CMD_NET puts ("Net: "); gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); // eth_io_init(); eth_initialize(gd->bd); #if defined(CONFIG_RESET_PHY_R) debug ("Reset Ethernet PHY\n"); reset_phy(); #endif #endif #if defined(CONFIG_ARCH_MISC_INIT) /* miscellaneous arch dependent initialisations */ arch_misc_init (); #endif #if defined(CONFIG_MISC_INIT_R) /* miscellaneous platform dependent initialisations */ misc_init_r (); #endif #if defined(CONFIG_CMD_KGDB) puts("KGDB: "); kgdb_init(); #endif /* enable exceptions */ enable_interrupts (); icache_enable(); dcache_enable(); printf("Dcache status %d\n",dcache_status()); printf("Icache status %d\n",icache_status()); #ifdef CONFIG_A3_DISPLAY osd_display(); #endif #ifdef CONFIG_A3_I2C disable_i2c_pinmux();//disable hard i2c pinmux #endif // kgdb_test(); // init_osd_dev() ; for(;;){ main_loop(); } }