static void
ia32_get_fpcontext(struct thread *td, struct ia32_mcontext *mcp,
char *xfpusave, size_t xfpusave_len)
{
size_t max_len, len;
/*
* XXX Format of 64bit and 32bit FXSAVE areas differs. FXSAVE
* in 32bit mode saves %cs and %ds, while on 64bit it saves
* 64bit instruction and data pointers. Ignore the difference
* for now, it should be irrelevant for most applications.
*/
mcp->mc_ownedfp = fpugetregs(td);
bcopy(get_pcb_user_save_td(td), &mcp->mc_fpstate,
sizeof(mcp->mc_fpstate));
mcp->mc_fpformat = fpuformat();
if (!use_xsave || xfpusave_len == 0)
return;
max_len = cpu_max_ext_state_size - sizeof(struct savefpu);
len = xfpusave_len;
if (len > max_len) {
len = max_len;
bzero(xfpusave + max_len, len - max_len);
}
mcp->mc_flags |= _MC_HASFPXSTATE;
mcp->mc_xfpustate_len = len;
bcopy(get_pcb_user_save_td(td) + 1, xfpusave, len);
}
int
set_fpregs32(struct thread *td, struct fpreg32 *regs)
{
struct save87 *sv_87 = (struct save87 *)regs;
struct env87 *penv_87 = &sv_87->sv_env;
struct savefpu *sv_fpu = get_pcb_user_save_td(td);
struct envxmm *penv_xmm = &sv_fpu->sv_env;
int i;
/* FPU control/status */
penv_xmm->en_cw = penv_87->en_cw;
penv_xmm->en_sw = penv_87->en_sw;
penv_xmm->en_tw = penv_87->en_tw;
penv_xmm->en_rip = penv_87->en_fip;
/* penv_87->en_fcs and en_fos ignored, see above */
penv_xmm->en_opcode = penv_87->en_opcode;
penv_xmm->en_rdp = penv_87->en_foo;
/* FPU registers */
for (i = 0; i < 8; ++i)
sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
for (i = 8; i < 16; ++i)
bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
fpuuserinited(td);
return (0);
}
void
elf32_dump_thread(struct thread *td, void *dst, size_t *off)
{
#ifdef CPU_ENABLE_SSE
void *buf;
#endif
size_t len;
len = 0;
#ifdef CPU_ENABLE_SSE
if (use_xsave) {
if (dst != NULL) {
npxgetregs(td);
len += elf32_populate_note(NT_X86_XSTATE,
get_pcb_user_save_td(td), dst,
cpu_max_ext_state_size, &buf);
*(uint64_t *)((char *)buf + X86_XSTATE_XCR0_OFFSET) =
xsave_mask;
} else
len += elf32_populate_note(NT_X86_XSTATE, NULL, NULL,
cpu_max_ext_state_size, NULL);
}
#endif
*off = len;
}
/*
* Initialize machine state, mostly pcb and trap frame for a new
* thread, about to return to userspace. Put enough state in the new
* thread's PCB to get it to go back to the fork_return(), which
* finalizes the thread state and handles peculiarities of the first
* return to userspace for the new thread.
*/
void
cpu_copy_thread(struct thread *td, struct thread *td0)
{
struct pcb *pcb2;
/* Point the pcb to the top of the stack. */
pcb2 = td->td_pcb;
/*
* Copy the upcall pcb. This loads kernel regs.
* Those not loaded individually below get their default
* values here.
*/
update_pcb_bases(td0->td_pcb);
bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
clear_pcb_flags(pcb2, PCB_FPUINITDONE | PCB_USERFPUINITDONE |
PCB_KERNFPU);
pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
bcopy(get_pcb_user_save_td(td0), pcb2->pcb_save,
cpu_max_ext_state_size);
set_pcb_flags_raw(pcb2, PCB_FULL_IRET);
/*
* Create a new fresh stack for the new thread.
*/
bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
/* If the current thread has the trap bit set (i.e. a debugger had
* single stepped the process to the system call), we need to clear
* the trap flag from the new frame. Otherwise, the new thread will
* receive a (likely unexpected) SIGTRAP when it executes the first
* instruction after returning to userland.
*/
td->td_frame->tf_rflags &= ~PSL_T;
/*
* Set registers for trampoline to user mode. Leave space for the
* return address on stack. These are the kernel mode register values.
*/
pcb2->pcb_r12 = (register_t)fork_return; /* trampoline arg */
pcb2->pcb_rbp = 0;
pcb2->pcb_rsp = (register_t)td->td_frame - sizeof(void *); /* trampoline arg */
pcb2->pcb_rbx = (register_t)td; /* trampoline arg */
pcb2->pcb_rip = (register_t)fork_trampoline;
/*
* If we didn't copy the pcb, we'd need to do the following registers:
* pcb2->pcb_dr*: cloned above.
* pcb2->pcb_savefpu: cloned above.
* pcb2->pcb_onfault: cloned above (always NULL here?).
* pcb2->pcb_[fg]sbase: cloned above
*/
/* Setup to release spin count in fork_exit(). */
td->td_md.md_spinlock_count = 1;
td->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
}
static int
linux_proc_write_fpxregs(struct thread *td, struct linux_pt_fpxreg *fpxregs)
{
PROC_LOCK_ASSERT(td->td_proc, MA_OWNED);
if (cpu_fxsr == 0 || (td->td_proc->p_flag & P_INMEM) == 0)
return (EIO);
bcopy(fpxregs, &get_pcb_user_save_td(td)->sv_xmm, sizeof(*fpxregs));
return (0);
}
void
elf64_dump_thread(struct thread *td, void *dst, size_t *off)
{
void *buf;
size_t len;
len = 0;
if (use_xsave) {
if (dst != NULL) {
fpugetregs(td);
len += elf64_populate_note(NT_X86_XSTATE,
get_pcb_user_save_td(td), dst,
cpu_max_ext_state_size, &buf);
*(uint64_t *)((char *)buf + X86_XSTATE_XCR0_OFFSET) =
xsave_mask;
} else
len += elf64_populate_note(NT_X86_XSTATE, NULL, NULL,
cpu_max_ext_state_size, NULL);
}
*off = len;
}
int
cpu_ptrace(struct thread *td, int req, void *addr, int data)
{
#ifdef CPU_ENABLE_SSE
struct savexmm *fpstate;
int error;
if (!cpu_fxsr)
return (EINVAL);
fpstate = &get_pcb_user_save_td(td)->sv_xmm;
switch (req) {
case PT_GETXMMREGS:
npxgetregs(td);
error = copyout(fpstate, addr, sizeof(*fpstate));
break;
case PT_SETXMMREGS:
npxgetregs(td);
error = copyin(addr, fpstate, sizeof(*fpstate));
fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
break;
case PT_GETXSTATE_OLD:
case PT_SETXSTATE_OLD:
case PT_GETXSTATE_INFO:
case PT_GETXSTATE:
case PT_SETXSTATE:
error = cpu_ptrace_xstate(td, req, addr, data);
break;
default:
return (EINVAL);
}
return (error);
#else
return (EINVAL);
#endif
}
int
fill_fpregs32(struct thread *td, struct fpreg32 *regs)
{
struct savefpu *sv_fpu;
struct save87 *sv_87;
struct env87 *penv_87;
struct envxmm *penv_xmm;
int i;
bzero(regs, sizeof(*regs));
sv_87 = (struct save87 *)regs;
penv_87 = &sv_87->sv_env;
fpugetregs(td);
sv_fpu = get_pcb_user_save_td(td);
penv_xmm = &sv_fpu->sv_env;
/* FPU control/status */
penv_87->en_cw = penv_xmm->en_cw;
penv_87->en_sw = penv_xmm->en_sw;
penv_87->en_tw = penv_xmm->en_tw;
/*
* XXX for en_fip/fcs/foo/fos, check if the fxsave format
* uses the old-style layout for 32 bit user apps. If so,
* read the ip and operand segment registers from there.
* For now, use the process's %cs/%ds.
*/
penv_87->en_fip = penv_xmm->en_rip;
penv_87->en_fcs = td->td_frame->tf_cs;
penv_87->en_opcode = penv_xmm->en_opcode;
penv_87->en_foo = penv_xmm->en_rdp;
/* Entry into the kernel always sets TF_HASSEGS */
penv_87->en_fos = td->td_frame->tf_ds;
/* FPU registers */
for (i = 0; i < 8; ++i)
sv_87->sv_ac[i] = sv_fpu->sv_fp[i].fp_acc;
return (0);
}
static int
cpu_ptrace_xstate(struct thread *td, int req, void *addr, int data)
{
struct ptrace_xstate_info info;
char *savefpu;
int error;
if (!use_xsave)
return (EOPNOTSUPP);
switch (req) {
case PT_GETXSTATE_OLD:
npxgetregs(td);
savefpu = (char *)(get_pcb_user_save_td(td) + 1);
error = copyout(savefpu, addr,
cpu_max_ext_state_size - sizeof(union savefpu));
break;
case PT_SETXSTATE_OLD:
if (data > cpu_max_ext_state_size - sizeof(union savefpu)) {
error = EINVAL;
break;
}
savefpu = malloc(data, M_TEMP, M_WAITOK);
error = copyin(addr, savefpu, data);
if (error == 0) {
npxgetregs(td);
error = npxsetxstate(td, savefpu, data);
}
free(savefpu, M_TEMP);
break;
case PT_GETXSTATE_INFO:
if (data != sizeof(info)) {
error = EINVAL;
break;
}
info.xsave_len = cpu_max_ext_state_size;
info.xsave_mask = xsave_mask;
error = copyout(&info, addr, data);
break;
case PT_GETXSTATE:
npxgetregs(td);
savefpu = (char *)(get_pcb_user_save_td(td));
error = copyout(savefpu, addr, cpu_max_ext_state_size);
break;
case PT_SETXSTATE:
if (data < sizeof(union savefpu) ||
data > cpu_max_ext_state_size) {
error = EINVAL;
break;
}
savefpu = malloc(data, M_TEMP, M_WAITOK);
error = copyin(addr, savefpu, data);
if (error == 0)
error = npxsetregs(td, (union savefpu *)savefpu,
savefpu + sizeof(union savefpu), data -
sizeof(union savefpu));
free(savefpu, M_TEMP);
break;
default:
error = EINVAL;
break;
}
return (error);
}
/*
* Finish a fork operation, with process p2 nearly set up.
* Copy and update the pcb, set up the stack so that the child
* ready to run and return to user mode.
*/
void
cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags)
{
struct proc *p1;
struct pcb *pcb2;
struct mdproc *mdp1, *mdp2;
struct proc_ldt *pldt;
p1 = td1->td_proc;
if ((flags & RFPROC) == 0) {
if ((flags & RFMEM) == 0) {
/* unshare user LDT */
mdp1 = &p1->p_md;
mtx_lock(&dt_lock);
if ((pldt = mdp1->md_ldt) != NULL &&
pldt->ldt_refcnt > 1 &&
user_ldt_alloc(p1, 1) == NULL)
panic("could not copy LDT");
mtx_unlock(&dt_lock);
}
return;
}
/* Ensure that td1's pcb is up to date. */
fpuexit(td1);
update_pcb_bases(td1->td_pcb);
/* Point the pcb to the top of the stack */
pcb2 = get_pcb_td(td2);
td2->td_pcb = pcb2;
/* Copy td1's pcb */
bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
/* Properly initialize pcb_save */
pcb2->pcb_save = get_pcb_user_save_pcb(pcb2);
bcopy(get_pcb_user_save_td(td1), get_pcb_user_save_pcb(pcb2),
cpu_max_ext_state_size);
/* Point mdproc and then copy over td1's contents */
mdp2 = &p2->p_md;
bcopy(&p1->p_md, mdp2, sizeof(*mdp2));
/*
* Create a new fresh stack for the new process.
* Copy the trap frame for the return to user mode as if from a
* syscall. This copies most of the user mode register values.
*/
td2->td_frame = (struct trapframe *)td2->td_pcb - 1;
bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
td2->td_frame->tf_rax = 0; /* Child returns zero */
td2->td_frame->tf_rflags &= ~PSL_C; /* success */
td2->td_frame->tf_rdx = 1;
/*
* If the parent process has the trap bit set (i.e. a debugger had
* single stepped the process to the system call), we need to clear
* the trap flag from the new frame unless the debugger had set PF_FORK
* on the parent. Otherwise, the child will receive a (likely
* unexpected) SIGTRAP when it executes the first instruction after
* returning to userland.
*/
if ((p1->p_pfsflags & PF_FORK) == 0)
td2->td_frame->tf_rflags &= ~PSL_T;
/*
* Set registers for trampoline to user mode. Leave space for the
* return address on stack. These are the kernel mode register values.
*/
pcb2->pcb_r12 = (register_t)fork_return; /* fork_trampoline argument */
pcb2->pcb_rbp = 0;
pcb2->pcb_rsp = (register_t)td2->td_frame - sizeof(void *);
pcb2->pcb_rbx = (register_t)td2; /* fork_trampoline argument */
pcb2->pcb_rip = (register_t)fork_trampoline;
/*-
* pcb2->pcb_dr*: cloned above.
* pcb2->pcb_savefpu: cloned above.
* pcb2->pcb_flags: cloned above.
* pcb2->pcb_onfault: cloned above (always NULL here?).
* pcb2->pcb_[fg]sbase: cloned above
*/
/* Setup to release spin count in fork_exit(). */
td2->td_md.md_spinlock_count = 1;
td2->td_md.md_saved_flags = PSL_KERNEL | PSL_I;
td2->td_md.md_invl_gen.gen = 0;
/* As an i386, do not copy io permission bitmap. */
pcb2->pcb_tssp = NULL;
/* New segment registers. */
set_pcb_flags_raw(pcb2, PCB_FULL_IRET);
/* Copy the LDT, if necessary. */
mdp1 = &td1->td_proc->p_md;
mdp2 = &p2->p_md;
if (mdp1->md_ldt == NULL) {
mdp2->md_ldt = NULL;
return;
}
mtx_lock(&dt_lock);
if (mdp1->md_ldt != NULL) {
if (flags & RFMEM) {
mdp1->md_ldt->ldt_refcnt++;
mdp2->md_ldt = mdp1->md_ldt;
bcopy(&mdp1->md_ldt_sd, &mdp2->md_ldt_sd, sizeof(struct
system_segment_descriptor));
} else {
mdp2->md_ldt = NULL;
mdp2->md_ldt = user_ldt_alloc(p2, 0);
if (mdp2->md_ldt == NULL)
panic("could not copy LDT");
amd64_set_ldt_data(td2, 0, max_ldt_segment,
(struct user_segment_descriptor *)
mdp1->md_ldt->ldt_base);
}
} else
mdp2->md_ldt = NULL;
mtx_unlock(&dt_lock);
/*
* Now, cpu_switch() can schedule the new process.
* pcb_rsp is loaded pointing to the cpu_switch() stack frame
* containing the return address when exiting cpu_switch.
* This will normally be to fork_trampoline(), which will have
* %ebx loaded with the new proc's pointer. fork_trampoline()
* will set up a stack to call fork_return(p, frame); to complete
* the return to user-mode.
*/
}
