Ejemplo n.º 1
0
void main(void)
{
	struct mem_timings *mem;
	void *entry;
	int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);

	/* Clock must be initialized before console_init, otherwise you may need
	 * to re-initialize serial console drivers again. */
	mem = setup_clock();

	console_init();

	setup_power(is_resume);
	setup_memory(mem, is_resume);

	if (is_resume) {
		wakeup();
	}

	setup_storage();
	setup_gpio();
	setup_graphics();

	/* Set SPI (primary CBFS media) clock to 50MHz and configure pinmux. */
	exynos_pinmux_spi1();
	clock_set_rate(PERIPH_ID_SPI1, 50000000);

	cbmem_initialize_empty();

	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
	stage_exit(entry);
}
Ejemplo n.º 2
0
void bootblock_cpu_init(void)
{
	u32 ret;
	/*
	 * During Suspend-Resume & S/W-Reset, as soon as PMU releases
	 * pad retention, CKE goes high. This causes memory contents
	 * not to be retained during DRAM initialization. Therfore,
	 * there is a new control register(0x100431e8[28]) which lets us
	 * release pad retention and retain the memory content until the
	 * initialization is complete.
	 */
	if (read32(((void *)INF_REG_BASE + INF_REG1_OFFSET)) == S5P_CHECK_SLEEP) {
		write32(PAD_RETENTION_DRAM_COREBLK_VAL,
			(void *)PAD_RETENTION_DRAM_COREBLK_OPTION);
		do {
			ret = read32((void *)PAD_RETENTION_DRAM_STATUS);
		} while (ret != 0x1);
	}

	/* kick off the multi-core timer.
	 * We want to do this as early as we can.
	 */
	mct_start();

	if (get_wakeup_state() == WAKEUP_DIRECT) {
		wakeup();
		/* Never returns. */
	}

	/* For most ARM systems, we have to initialize firmware media source
	 * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is
	 * already handled by iROM so there's no need to setup again.
	 */
}
Ejemplo n.º 3
0
void main(void)
{

	extern struct mem_timings mem_timings;
	void *entry;
	int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);

	/* Clock must be initialized before console_init, otherwise you may need
	 * to re-initialize serial console drivers again. */
	system_clock_init();

	console_init();

	setup_power(is_resume);
	setup_memory(&mem_timings, is_resume);

	primitive_mem_test();

	if (is_resume) {
		wakeup();
	}

	setup_storage();
	setup_gpio();
	setup_ec();

	simple_spi_test();
	/* Set SPI (primary CBFS media) clock to 50MHz. */
	/* if this is uncommented SPI will not work correctly. */
	clock_set_rate(PERIPH_ID_SPI1, 50000000);
	simple_spi_test();
	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
	simple_spi_test();
	stage_exit(entry);
}
Ejemplo n.º 4
0
void main(void)
{

	extern struct mem_timings mem_timings;
	int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
	int power_init_failed;

	exynos5420_config_smp();
	power_init_failed = setup_power(is_resume);

	timestamp_init(timestamp_get());
	timestamp_add_now(TS_START_ROMSTAGE);

	/* Clock must be initialized before console_init, otherwise you may need
	 * to re-initialize serial console drivers again. */
	system_clock_init();

	exynos_pinmux_uart3();
	console_init();
	exception_init();

	if (power_init_failed)
		die("Failed to intialize power.\n");

	/* re-initialize PMIC I2C channel after (re-)setting system clocks */
	i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */

	timestamp_add_now(TS_BEFORE_INITRAM);

	setup_memory(&mem_timings, is_resume);

	timestamp_add_now(TS_AFTER_INITRAM);

	primitive_mem_test();

	trustzone_init();

	if (is_resume) {
		wakeup();
	}

	setup_gpio();
	setup_ec();

	simple_spi_test();
	/* Set SPI (primary CBFS media) clock to 50MHz. */
	/* if this is uncommented SPI will not work correctly. */
	clock_set_rate(PERIPH_ID_SPI1, 50000000);
	exynos_pinmux_spi1();
	simple_spi_test();

	cbmem_initialize_empty();

	simple_spi_test();

	timestamp_add_now(TS_END_ROMSTAGE);

	run_ramstage();
}
Ejemplo n.º 5
0
void bootblock_soc_init(void)
{
    if (get_wakeup_state() == WAKEUP_DIRECT) {
        wakeup();
        /* Never returns. */
    }

    /* For most ARM systems, we have to initialize firmware media source
     * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is
     * already handled by iROM so there's no need to setup again.
     */
}
Ejemplo n.º 6
0
void bootblock_soc_init(void)
{
	if (get_wakeup_state() == WAKEUP_DIRECT) {
		wakeup();
		/* Never returns. */
	}

	/* set up dcache and MMU */
	mmu_init();
	mmu_disable_range(0, SRAM_START);
	mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK);
	mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF);
	dcache_mmu_enable();

	/* For most ARM systems, we have to initialize firmware media source
	 * (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is
	 * already handled by iROM so there's no need to setup again.
	 */
}
Ejemplo n.º 7
0
void main(void)
{
	struct mem_timings *mem;
	int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);

	timestamp_init(timestamp_get());
	timestamp_add_now(TS_START_ROMSTAGE);

	/* Clock must be initialized before console_init, otherwise you may need
	 * to re-initialize serial console drivers again. */
	mem = setup_clock();

	console_init();
	exception_init();

	setup_power(is_resume);

	timestamp_add_now(TS_BEFORE_INITRAM);

	setup_memory(mem, is_resume);

	timestamp_add_now(TS_AFTER_INITRAM);

	/* This needs to happen on normal boots and on resume. */
	trustzone_init();

	if (is_resume) {
		wakeup();
	}

	setup_gpio();
	setup_graphics();

	/* Set SPI (primary CBFS media) clock to 50MHz and configure pinmux. */
	exynos_pinmux_spi1();
	clock_set_rate(PERIPH_ID_SPI1, 50000000);

	cbmem_initialize_empty();

	timestamp_add_now(TS_END_ROMSTAGE);

	run_ramstage();
}