void handle_irq(arch_registers_state_t* save_area, uintptr_t fault_pc,
uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3)
{
uint32_t irq = 0;
/* The assembly stub leaves the first 4 registers, the stack pointer, and
* the exception PC for us to save, as it's run out of room for the
* necessary instructions. */
save_area->named.x0 = x0;
save_area->named.x1 = x1;
save_area->named.x2 = x2;
save_area->named.x3 = x3;
save_area->named.stack = sysreg_read_sp_el0();
save_area->named.pc = fault_pc;
irq = gic_get_active_irq();
debug(SUBSYS_DISPATCH, "IRQ %"PRIu32" while %s\n", irq,
dcb_current ? (dcb_current->disabled ? "disabled": "enabled") :
"in kernel");
if (dcb_current != NULL) {
dispatcher_handle_t handle = dcb_current->disp;
if (save_area == dispatcher_get_disabled_save_area(handle)) {
assert(dispatcher_is_disabled_ip(handle, fault_pc));
dcb_current->disabled = true;
} else {
/* debug(SUBSYS_DISPATCH,
"save_area=%p, dispatcher_get_enabled_save_are(handle)=%p\n",
save_area, dispatcher_get_enabled_save_area(handle));
*/
assert(save_area == dispatcher_get_enabled_save_area(handle));
assert(!dispatcher_is_disabled_ip(handle, fault_pc));
dcb_current->disabled = false;
}
}
if (pit_handle_irq(irq)) {
// Timer interrupt, pit_handle_irq acks it at the timer.
assert(kernel_ticks_enabled);
kernel_now += kernel_timeslice;
wakeup_check(kernel_now);
dispatch(schedule());
}
/* This is the (still) unacknowledged startup interrupt sent by the BSP.
* We just acknowledge it here. */
else if(irq == 1)
{
gic_ack_irq(irq);
dispatch(schedule());
}
else {
gic_ack_irq(irq);
send_user_interrupt(irq);
panic("Unhandled IRQ %"PRIu32"\n", irq);
}
}
bool pit_handle_irq(uint32_t irq)
{
if (PIT0_IRQ == irq)
{
sp804_pit_Timer1IntClr_wr(&pit0, ~0ul);
gic_ack_irq(irq);
return 1;
}
else if(PIT1_IRQ == irq)
{
sp804_pit_Timer1IntClr_wr(&pit1, ~0ul);
gic_ack_irq(irq);
return 1;
}
else {
return 0;
}
}
bool
timer_interrupt(uint32_t irq) {
if(irq == LOCAL_TIMER_IRQ) {
gic_ack_irq(irq);
/* Reset the timeout. */
a15_gt_timeout(timeslice_ticks);
return 1;
}
return 0;
}
void arm_kernel_startup(void)
{
printf("arm_kernel_startup entered \n");
struct dcb *init_dcb;
if (hal_cpu_is_bsp()) {
printf("Doing BSP related bootup \n");
/* Initialize the location to allocate phys memory from */
bsp_init_alloc_addr = glbl_core_data->start_free_ram;
// Bring up init
init_dcb = spawn_bsp_init(BSP_INIT_MODULE_NAME, bsp_alloc_phys);
// Not available on PandaBoard? pit_start(0);
} else {
printf("Doing non-BSP related bootup \n");
/* Initialize the allocator with the information passed to us */
app_alloc_phys_start = glbl_core_data->memory_base_start;
app_alloc_phys_end = app_alloc_phys_start
+ ((lpaddr_t)1 <<glbl_core_data->memory_bits);
init_dcb = spawn_app_init(glbl_core_data, APP_INIT_MODULE_NAME, app_alloc_phys);
#ifndef __ARM_ARCH_7M__ //armv7-m does not use a gic and can not acknowledge interrupts
uint32_t irq = gic_get_active_irq();
gic_ack_irq(irq);
#endif
}
/* printf("Trying to enable interrupts\n"); */
/* __asm volatile ("CPSIE aif"); // Enable interrups */
/* printf("Done enabling interrupts\n"); */
/* printf("HOLD BOOTUP - SPINNING\n"); */
/* while (1); */
/* printf("THIS SHOULD NOT HAPPEN\n"); */
// enable interrupt forwarding to cpu
// FIXME: PS: enable this as it is needed for multicore setup.
// gic_cpu_interface_enable();
// Should not return
printf("Calling dispatch from arm_kernel_startup, start address is=%"PRIxLVADDR"\n",
get_dispatcher_shared_arm(init_dcb->disp)->enabled_save_area.named.r0);
dispatch(init_dcb);
panic("Error spawning init!");
}
static void tegra2_ack_irq(unsigned int irq) {
//printk("%s: %d\n", __FUNCTION__, irq);
gic_ack_irq(irq);
}
void arm_kernel_startup(void)
{
printf("arm_kernel_startup entered \n");
/* Initialize the core_data */
/* Used when bringing up other cores, must be at consistent global address
* seen by all cores */
struct arm_core_data *core_data
= (void *)((lvaddr_t)&kernel_first_byte - BASE_PAGE_SIZE);
struct dcb *init_dcb;
if(hal_cpu_is_bsp())
{
printf("Doing BSP related bootup \n");
/* Initialize the location to allocate phys memory from */
bsp_init_alloc_addr = glbl_core_data->start_free_ram;
// Bring up init
init_dcb = spawn_bsp_init(BSP_INIT_MODULE_NAME, bsp_alloc_phys);
// Not available on PandaBoard? pit_start(0);
}
else
{
printf("Doing non-BSP related bootup \n");
my_core_id = core_data->dst_core_id;
/* Initialize the allocator */
app_alloc_phys_start = core_data->memory_base_start;
app_alloc_phys_end = ((lpaddr_t)1 << core_data->memory_bits) +
app_alloc_phys_start;
init_dcb = spawn_app_init(core_data, APP_INIT_MODULE_NAME, app_alloc_phys);
uint32_t irq = gic_get_active_irq();
gic_ack_irq(irq);
}
/* printf("Trying to enable interrupts\n"); */
/* __asm volatile ("CPSIE aif"); // Enable interrups */
/* printf("Done enabling interrupts\n"); */
/* printf("HOLD BOOTUP - SPINNING\n"); */
/* while (1); */
/* printf("THIS SHOULD NOT HAPPEN\n"); */
// enable interrupt forwarding to cpu
// FIXME: PS: enable this as it is needed for multicore setup.
// gic_cpu_interface_enable();
// Should not return
printf("Calling dispatch from arm_kernel_startup, start address is=%"PRIxLVADDR"\n",
get_dispatcher_shared_arm(init_dcb->disp)->enabled_save_area.named.r0);
dispatch(init_dcb);
panic("Error spawning init!");
}
