/*
* SPI1 remapped:
* SCK - PB3
* MISO - PB4
* MOSI - PB5
*/
void SPI1_init(){
// enable AFIO & other clocking
rcc_peripheral_enable_clock(&RCC_APB2ENR,
RCC_APB2ENR_SPI1EN | RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPBEN);
// remap SPI1 (change pins from PA5..7 to PB3..5); also turn off JTAG
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF, AFIO_MAPR_SPI1_REMAP);
// SCK, MOSI - push-pull output
gpio_set_mode(GPIO_BANK_SPI1_RE_SCK, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_SPI1_RE_SCK);
gpio_set_mode(GPIO_BANK_SPI1_RE_MOSI, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_SPI1_RE_MOSI);
// MISO - opendrain in
gpio_set_mode(GPIO_BANK_SPI1_RE_MISO, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_SPI1_RE_MISO);
spi_reset(SPI1);
/* Set up SPI in Master mode with:
* Clock baud rate: 1/128 of peripheral clock frequency (APB2, 72MHz)
* Clock polarity: CPOL=0, CPHA=0
* Data frame format: 8-bit
* Frame format: MSB First
*/
spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_256, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST);
nvic_enable_irq(NVIC_SPI1_IRQ); // enable SPI interrupt
spi_enable(Current_SPI);
}
void motor_GPIO_config(void)
{
/* PWM pins */
gpio_set_mode(GPIOC,
GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL,
MOTOR_GPIO_PWM_FRONT_L |
MOTOR_GPIO_PWM_FRONT_R |
MOTOR_GPIO_PWM_REAR_L |
MOTOR_GPIO_PWM_REAR_R );
// remap TIM3 to PCx pins
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_FULL_SWJ, AFIO_MAPR_TIM3_REMAP_FULL_REMAP);
/* direction pins*/
gpio_set_mode(GPIOC,
GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL,
MOTOR_DIR_L_1 |
MOTOR_DIR_L_2 |
MOTOR_DIR_R_1 |
MOTOR_DIR_R_2);
gpio_clear(GPIOC, MOTOR_DIR_L_1 | MOTOR_DIR_L_2 | MOTOR_DIR_R_1 | MOTOR_DIR_R_2);
}
/**
* Init timer 2 (&remap channels 3&4 to five-tolerant ports)
*/
void tim2_init() {
// Turn off JTAG & SWD, remap TIM2_CH3/TIM2_CH4 to PB10/PB11 (five tolerant)
// don't forget about AFIO clock & PB clock!
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPBEN);
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF, AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP2);
// setup PB10 & PB11
// PB10 - Trig output - push/pull
gpio_set_mode(GPIO_BANK_TIM2_PR2_CH3, GPIO_MODE_OUTPUT_10_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_TIM2_PR2_CH3);
// gpio_set_mode(GPIO_BANK_TIM2_CH3, GPIO_MODE_OUTPUT_10_MHZ,
// GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_TIM2_CH3);
// PB11 - Echo input - floating
// gpio_set_mode(GPIO_BANK_TIM2_PR2_CH4, GPIO_MODE_INPUT,
// GPIO_CNF_INPUT_FLOAT, GPIO_TIM2_PR2_CH4);
rcc_periph_clock_enable(RCC_TIM2);
timer_reset(TIM2);
// timers have frequency of 1MHz -- 1us for one step
// 36MHz of APB1
timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
// 72MHz div 72 = 1MHz
TIM2_PSC = 71; // prescaler is (div - 1)
TIM2_ARR = TRIG_T;
TIM2_CCR3 = TRIG_L;
// DBG("Timer configured\n");
}
int main(void)
{
int i;
rcc_clock_setup_in_hse_8mhz_out_72mhz();
rcc_periph_clock_enable(RCC_GPIOC);
rcc_periph_clock_enable(RCC_TIM3);
rcc_periph_clock_enable(RCC_AFIO);
gpio_primary_remap(0,AFIO_MAPR_TIM3_REMAP_FULL_REMAP );
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL , GPIO9);
timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE,
TIM_CR1_DIR_UP);
timer_set_prescaler(TIM3,36);
timer_set_period(TIM3, 1000);
timer_set_oc_mode(TIM3, TIM_OC4, TIM_OCM_PWM1);
timer_enable_oc_output(TIM3, TIM_OC4);
// timer_enable_preload(TIM3);
//timer_continuous_mode(TIM3);
timer_enable_counter(TIM3);
#if defined(ENABLE_SEMIHOSTING) && (ENABLE_SEMIHOSTING)
initialise_monitor_handles();
#endif
uint16_t a = 0;
while (1)
{
for(i=0; i< 1000; i++){
timer_set_oc_value(TIM3, TIM_OC4, i);
delay();
}
for(i=999; i >=0 ; i--){
timer_set_oc_value(TIM3, TIM_OC4, i);
delay();
}
//gpio_toggle(GPIOC, GPIO9); /* LED on/off */
//printf("hello world\n");
}
}
int main(void) {
uint32_t i;
rcc_periph_clock_enable(BOARD_RCC_LED);
LED_ENABLE();
LED_BUSY();
/* Setup clock accordingly */
#ifdef GD32F103
rcc_clock_setup_in_hse_12mhz_out_120mhz();
#else
#ifdef STM32F0
rcc_clock_setup_in_hsi48_out_48mhz();
rcc_periph_clock_enable(RCC_SYSCFG_COMP);
SYSCFG_CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP;
rcc_periph_clock_enable(RCC_CRS);
crs_autotrim_usb_enable();
rcc_set_usbclk_source(RCC_HSI48);
#else
rcc_clock_setup_in_hse_8mhz_out_72mhz();
#endif /* STM32F0 */
#endif /* GD32F103 */
rcc_periph_clock_enable(RCC_GPIOA); /* For USB */
/* STM32F0x2 has internal pullup and does not need AFIO */
#ifndef STM32F0
rcc_periph_clock_enable(BOARD_RCC_USB_PULLUP);
rcc_periph_clock_enable(RCC_AFIO); /* For SPI */
#endif /* STM32F0 */
#if BOARD_USE_DEBUG_PINS_AS_GPIO
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF, AFIO_MAPR_TIM2_REMAP_FULL_REMAP);
#endif
/* Setup GPIO to pull up the D+ high. (STM32F0x2 has internal pullup.) */
#ifndef STM32F0
gpio_set_mode(BOARD_PORT_USB_PULLUP, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, BOARD_PIN_USB_PULLUP);
#if BOARD_USB_HIGH_IS_PULLUP
gpio_set(BOARD_PORT_USB_PULLUP, BOARD_PIN_USB_PULLUP);
#else
gpio_clear(BOARD_PORT_USB_PULLUP, BOARD_PIN_USB_PULLUP);
#endif /* BOARD_USB_HIGH_IS_PULLUP */
#endif /* STM32F0 */
usbcdc_init();
spi_setup(SPI_DEFAULT_CLOCK);
/* The loop. */
while (true) {
/* Wait and blink if USB is not ready. */
LED_IDLE();
while (!usb_ready) {
LED_DISABLE();
for (i = 0; i < rcc_ahb_frequency / 150; i ++) {
asm("nop");
}
LED_ENABLE();
for (i = 0; i < rcc_ahb_frequency / 150; i ++) {
asm("nop");
}
}
/* Actual thing */
/* TODO: we are blocked here, hence no knowledge about USB bet reset. */
handle_command(usbcdc_getc());
}
return 0;
}
