void
gusintr (int irq, void *dev_id, struct pt_regs *dummy)
{
unsigned char src;
extern int gus_timer_enabled;
sti ();
#ifdef CONFIG_GUSMAX
if (have_gus_max)
ad1848_interrupt (irq, NULL, NULL);
#endif
while (1)
{
if (!(src = inb (u_IrqStatus)))
return;
if (src & DMA_TC_IRQ)
{
guswave_dma_irq ();
}
if (src & (MIDI_TX_IRQ | MIDI_RX_IRQ))
{
#ifdef CONFIG_MIDI
gus_midi_interrupt (0);
#endif
}
if (src & (GF1_TIMER1_IRQ | GF1_TIMER2_IRQ))
{
#ifdef CONFIG_SEQUENCER
if (gus_timer_enabled)
{
sound_timer_interrupt ();
}
gus_write8 (0x45, 0); /* Ack IRQ */
gus_timer_command (4, 0x80); /* Reset IRQ flags */
#else
gus_write8 (0x45, 0); /* Stop timers */
#endif
}
if (src & (WAVETABLE_IRQ | ENVELOPE_IRQ))
{
gus_voice_irq ();
}
}
}
irqreturn_t gusintr(int irq, void *dev_id, struct pt_regs *dummy)
{
unsigned char src;
extern int gus_timer_enabled;
int handled = 0;
#ifdef CONFIG_SOUND_GUSMAX
if (have_gus_max) {
struct address_info *hw_config = dev_id;
adintr(irq, (void *)hw_config->slots[1], NULL);
}
#endif
#ifdef CONFIG_SOUND_GUS16
if (db16) {
struct address_info *hw_config = dev_id;
adintr(irq, (void *)hw_config->slots[3], NULL);
}
#endif
while (1)
{
if (!(src = inb(u_IrqStatus)))
break;
handled = 1;
if (src & DMA_TC_IRQ)
{
guswave_dma_irq();
}
if (src & (MIDI_TX_IRQ | MIDI_RX_IRQ))
{
gus_midi_interrupt(0);
}
if (src & (GF1_TIMER1_IRQ | GF1_TIMER2_IRQ))
{
if (gus_timer_enabled)
sound_timer_interrupt();
gus_write8(0x45, 0); /* Ack IRQ */
gus_timer_command(4, 0x80); /* Reset IRQ flags */
}
if (src & (WAVETABLE_IRQ | ENVELOPE_IRQ))
gus_voice_irq();
}
return IRQ_RETVAL(handled);
}