/* Send function.
* Write to send_buf[1] - send_buf[31] before calling this function.
* command will be placed in send_buf[0].*/
void send(command_t command)
{
uint8_t i;
// Set operation mode to transmit.
CE_LOW();
hal_nrf_set_operation_mode(HAL_NRF_PTX);
// Copy command to send buffer.
send_buf[0] = command;
hal_nrf_write_tx_payload(send_buf, PAYLOAD_SIZE);
// Activate sender
CE_PULSE();
send_success = false;
// Wait for radio to transmit
while (RFF != 1) ;
RFF = 0;
nrf_irq();
// Clear send buffer.
for (i = 0; i < PAYLOAD_SIZE; i++) {
send_buf[i] = 0x00;
}
// Reset operation mode to receive.
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
}
void radio_sb_init( hal_nrf_operation_mode_t operational_mode )
{
if( !bus_initialized )
radio_bus_init();
switch( operational_mode )
{
case HAL_NRF_PRX:
radio_mode = DEVICE_PRX_SB;
break;
case HAL_NRF_PTX:
radio_mode = DEVICE_PTX_SB;
break;
}
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, false); // Open pipe0, without/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(0, RF_RETRANS_DELAY); // Disables auto retransmit
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
//hal_nrf_set_datarate(HAL_NRF_1MBPS); // Uncomment this line for
// compatibility with nRF2401
// and nRF24E1
radio_wait();
radio_set_status (RF_IDLE); // Radio now ready
}
void radio_esb_init( hal_nrf_operation_mode_t operational_mode )
{
if( !bus_initialized )
radio_bus_init();
switch( operational_mode )
{
case HAL_NRF_PRX:
radio_mode = DEVICE_PRX_ESB;
break;
case HAL_NRF_PTX:
radio_mode = DEVICE_PTX_ESB;
break;
}
hal_nrf_close_pipe( HAL_NRF_ALL ); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe( HAL_NRF_PIPE0, true ); // Then open pipe0, w/autoack
// Changed from sb/radio_sb.c
hal_nrf_set_crc_mode( HAL_NRF_CRC_16BIT ); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr( RF_RETRANSMITS, RF_RETRANS_DELAY );
// Enables auto retransmit.
// 3 retrans with 250ms delay
// Changed from sb/radio_sb.c
hal_nrf_set_address_width( HAL_NRF_AW_5BYTES ); // 5 bytes address width
hal_nrf_set_address( HAL_NRF_TX, address ); // Set device's addresses
hal_nrf_set_address( HAL_NRF_PIPE0, address ); // Sets recieving address on
// pipe0
if( operational_mode == HAL_NRF_PTX ) // Mode depentant settings
{
hal_nrf_set_operation_mode( HAL_NRF_PTX ); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode( HAL_NRF_PRX ); // Enter RX mode
hal_nrf_set_rx_pload_width( (uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH );
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel( RF_CHANNEL ); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode( HAL_NRF_PWR_UP ); // Power up device
radio_wait();
radio_set_status( RF_IDLE ); // Radio now ready
}
// Configures RF parameters before Enhanced Shockburst can be used.
void configureRF()
{
packet_received = false;
send_success = false;
// Enable the radio clock
RFCKEN = 1;
// Set payload width to 32 bytes
hal_nrf_set_rx_payload_width((int)HAL_NRF_PIPE0, PAYLOAD_SIZE);
// Set auto-retries to 5 with 500 us intervals
hal_nrf_set_auto_retr(5, 500);
// Set pipe address
hal_nrf_set_address(HAL_NRF_PIPE0, default_pipe_address);
hal_nrf_set_address(HAL_NRF_TX, default_pipe_address);
// Set initial channel
hal_nrf_set_rf_channel(default_channels[1]);
// Configure radio as primary receiver (PTX)
hal_nrf_set_operation_mode(HAL_NRF_PRX);
// Wait for the xtal to power up
while (hal_clk_get_16m_source() != HAL_CLK_XOSC16M) ;
// Power up radio
hal_nrf_set_power_mode(HAL_NRF_PWR_UP);
// Enable receiver
CE_HIGH();
return;
}
app_states_t app_init(void)
{
if(usb_get_state() == USB_REM_WU_ENABLE)
{
return APP_SUSP_WE;
}
if(usb_get_state() == USB_REM_WU_DISABLE)
{
return APP_SUSP_WD;
}
/*
I3FR = 1; // rising edge SPI ready detect
INTEXP = 0x01; //Slave SPI Interrupt
SPI = 1; // Enable SPI Interrupt
*/
hal_nrf_enable_ack_payload(1);
hal_nrf_enable_dynamic_payload(1);
hal_nrf_setup_dynamic_payload(1 << 0); // Set up PIPE 0 to handle dynamic lengths
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Configure radio as primary receiver (PTX)
//hal_nrf_set_rx_payload_width(HAL_NRF_PIPE0, 30); // Set payload width to 30 bytes
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up radio
CE_HIGH(); // Enable receiver
return APP_NORMAL;
}
/** Initialized the RF configurations and powre up the RF.
* Use this function to initialize RF configurations.
* Note that the pipe isn't opened in this function,
* please use "rf_rcv_pipe_config" after using this
* function to configure RX pipe.
*
* @param in_channel RF Frequency (in_channel + 2400MHz)
* @param in_datarate Data rate of the RF transmission. (1Mbps or 2Mbps)
* @param in_output_power RF output power configuration.
* @param in_auto_retr Enable auto retransmission or not.
* @param in_auto_retr_delay Auto retransmission delay.
* @param in_addr_width Address width configuration for both PTX and PRX pipe.
* @param in_crc_mode CRC enable or disable configuration.
* @param in_spi_clk_rate SPI clock rate. (SPI speed)
* @param in_rf_int RF interrupt enable bit.
*/
void epl_rf_en_init(unsigned char in_channel, epl_rf_en_datarate_t in_datarate, char in_output_power, unsigned char in_auto_retr, unsigned int in_auto_retr_delay, char in_addr_width, epl_rf_en_crc_mode_t in_crc_mode, unsigned char in_rf_int)
{
RFCKEN = 1; // RF clock enable.
CE_LOW();
//--- Default static setup. These setting is optimized to match the RF protocol with nRF24E1. ---//
hal_nrf_close_pipe(HAL_NRF_ALL); // Close all pipes first. By default, pipe0 and pipe1 are opened.
hal_nrf_set_datarate(in_datarate);
hal_nrf_set_auto_retr(in_auto_retr, in_auto_retr_delay); // First parameter is set to zero indicating the auto retransmission is off.
hal_nrf_set_output_power(in_output_power); // Maximum radio output power (0dbm).
hal_nrf_set_crc_mode(in_crc_mode);
hal_nrf_set_address_width(in_addr_width); // Both RX and TX's address width are Configured.
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter RF TX mode
hal_nrf_set_rf_channel(in_channel);
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up radio
hal_nrf_get_clear_irq_flags();
// IEN1 RF interrupt enable bit
RF = in_rf_int;
}
void radio_sb_init (const uint8_t *address, hal_nrf_operation_mode_t operational_mode)
{
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, FALSE); // Open pipe0, without/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(0, RF_RETRANS_DELAY); // Disables auto retransmit
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
hal_nrf_set_datarate(HAL_NRF_250KBPS); // Uncomment this line for
// compatibility with nRF2401
// and nRF24E1
//hal_nrf_set_output_power(hal_nrf_output_power_t power); //default reset value is 0dbm
// Wait for the radio to power up, max. 4.5ms depending on crystal Ls
Timeout_SetTimeout2(5);
while(!Timeout_IsTimeout2());
radio_set_status (RF_IDLE); // Radio now ready
}
static void radio_init()
{
// Enable radio SPI
RFCTL = 0x10;
/** RF init **/
RF = 1; // Enable RF interrupt
RFCKEN = 1; // Enable the radio clock
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Configure radio as primary receiver (PRX)
// hal_nrf_set_rx_payload_width(HAL_NRF_PIPE0, 30); // Set payload width to 3 bytes
/* hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up radio
CE_HIGH(); // Enable receiver
*/
return;
}
void hal_nrf_set_sta(hal_nrf_sta_t sta)
{
u8 len, i;
if(hal_nrf_tx_cnt){
hal_nrf_tx_cmd_flag = 0;
HAL_NRF_WAIT_ACK_DONE();
IRQ_DIS();
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
hal_nrf_sta = HAL_NRF_STA_TX;
hal_nrf_tx_busy = 1;
len = hal_nrf_tx_buf[hal_nrf_tx_rd_index];
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
hal_nrf_tx_cnt = hal_nrf_tx_cnt-len-1;
// hal_nrf_write_tx_payload(hal_nrf_tx_buf_tmp, len);
CSN_LOW();
HAL_NRF_HW_SPI_WRITE(W_TX_PAYLOAD);
while(HAL_NRF_HW_SPI_BUSY) {}
HAL_NRF_HW_SPI_READ();
for(i=0; i<len; i++){
HAL_NRF_HW_SPI_WRITE(hal_nrf_tx_buf[hal_nrf_tx_rd_index]);
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
while(HAL_NRF_HW_SPI_BUSY) {} /* wait for byte transfer finished */
HAL_NRF_HW_SPI_READ();
}
CSN_HIGH();
hal_nrf_set_operation_mode(HAL_NRF_PTX);
// CE_HIGH();
// T2_START();
t2_start_delay();
IRQ_EN();
}else{
read_flash_buf(slave_cmd, slave_cmd_end, CMD_LENGTH);
hal_nrf_send_cmd(slave_cmd, HAL_NRF_STA_RX);
hal_nrf_tx_cmd_flag = 2;
}
}
void hal_nrf_send_cmd(u8 *buf, u8 sta)
{
/** auto ack delay */
HAL_NRF_WAIT_ACK_DONE();
IRQ_DIS();
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
hal_nrf_sta = HAL_NRF_STA_TX_CMD;
// hal_nrf_sta_next = sta;
hal_nrf_write_tx_payload(buf, CMD_LENGTH);
// hal_nrf_write_tx_payload_noack(buf, CMD_LENGTH);
hal_nrf_set_operation_mode(HAL_NRF_PTX);
// CE_HIGH();
// T2_START();
t2_start_delay();
IRQ_EN();
}
void gzll_rx_start()
{
uint8_t i;
uint32_t flag;
gzll_goto_idle();
if(gzll_rx_setup_modified)
{
flag = gzll_interupts_save();
gzll_rx_setup_modified = false;
gzll_tx_setup_modified = true;
/*
Restore pipe 0 address (this may have been altered during transmission)
*/
hal_nrf_set_address(HAL_NRF_PIPE0, gzll_p0_adr);
/*
Enable the receive pipes selected by gzll_set_param()
*/
hal_nrf_close_pipe(HAL_NRF_ALL);
for(i = 0; i < 6; i++)
{
if(gzll_dyn_params[GZLL_PARAM_RX_PIPES] & (1 << i))
{
hal_nrf_open_pipe((hal_nrf_address_t)i, EN_AA);
}
}
hal_nrf_set_operation_mode(HAL_NRF_PRX);
}
gzll_set_radio_power_on(true);
gzll_timeout_counter = 0;
gzll_state_var = GZLL_HOST_ACTIVE;
GZLL_RFCE_HIGH();
gzll_interupts_restore(flag);
}
void main()
{
#ifdef MCU_NRF24LE1
while(hal_clk_get_16m_source() != HAL_CLK_XOSC16M)
{
// Wait until 16 MHz crystal oscillator is running
}
#endif
#ifdef MCU_NRF24LU1P
// Enable radio SPI
RFCTL = 0x10;
#endif
// Set P0 as output
P0DIR = 0;
// Enable the radio clock
RFCKEN = 1;
// Enable RF interrupt
RF = 1;
// Enable global interrupt
EA = 1;
// Configure radio as primary receiver (PTX)
hal_nrf_set_operation_mode(HAL_NRF_PRX);
// Set payload width to 3 bytes
hal_nrf_set_rx_payload_width((int)HAL_NRF_PIPE0, 3);
// Power up radio
hal_nrf_set_power_mode(HAL_NRF_PWR_UP);
// Enable receiver
CE_HIGH();
for(;;){}
}
void init_radio()
{
// Enable the radio clock
RFCKEN = 1;
// Enable RF interrupt
RF = 1;
// Power up radio
hal_nrf_set_power_mode(HAL_NRF_PWR_UP);
hal_nrf_set_output_power(HAL_NRF_0DBM);
hal_nrf_enable_ack_payload(1);
hal_nrf_enable_dynamic_payload(1);
hal_nrf_setup_dynamic_payload(1); // Set up PIPE 0 to handle dynamic lengths
hal_nrf_set_rf_channel(125); // 2525 MHz
hal_nrf_set_auto_retr(5, 250); // Retry 5x
// Configure radio as primary receiver (PTX)
hal_nrf_set_operation_mode(HAL_NRF_PTX);
// Set payload width to 32 bytes
// hal_nrf_set_rx_payload_width(HAL_NRF_PIPE0, MAXLENGTH);
// Enable global interrupt
EA = 1;
}
// Resets RF parameters to default values.
// Must be called before jumping to new firmware.
void resetRF()
{
// Reset values set by the RF setup.
CE_LOW();
// PWR_UP = 0
hal_nrf_set_power_mode(HAL_NRF_PWR_DOWN);
// PRIM_RX = 0
hal_nrf_set_operation_mode(HAL_NRF_PTX);
// RF_CH = 0x02;
hal_nrf_set_rf_channel(reset_channel);
// AW = 11 (Default = 5 bytes)
// RX_ADDR_P0 = TX_ADDR = 0xE7E7E7E7E7
hal_nrf_set_address(HAL_NRF_TX, reset_pipe_address);
hal_nrf_set_address(HAL_NRF_PIPE0, reset_pipe_address);
// ARD = 0000, ARC = 0011
hal_nrf_set_auto_retr(3, 250);
// RX_PW_P0 = 0x00
hal_nrf_set_rx_payload_width((int)HAL_NRF_PIPE0, 0);
// Disable radio clock
RFCKEN = 0;
return;
}
/** Switch RF mode to TX mode.
* Use this function to switch the mode to TX mode.
*/
void epl_rf_en_enter_tx_mode(void)
{
RFCE = 0;
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter RF TX mode
}
__interrupt void HAL_NRF_ISR(void)
{
u8 status, len, i;
if(!IRQ) {
/** */
// Read and clear IRQ flags from radio
status = hal_nrf_nop();
// if(hal_nrf_ack_flag){
// if((status&0x60) == 0x60){
// hal_nrf_ack_flag = 0;
// }else{
// read_flash_buf(slave_cmd, slave_cmd_request, CMD_LENGTH);
// hal_nrf_write_ack_payload(0, slave_cmd, CMD_LENGTH);
// }
// }
#ifdef SLAVE_DEBUG
hal_nrf_irq_flag = status;
#endif
if(status & (1<< (uint8_t)HAL_NRF_RX_DR)){
do{
len = hal_nrf_read_rx_payload_width();
if(len > 32){
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR));
hal_nrf_rx_sta = HAL_NRF_RX_STA_COM_ERROR;
return;
}
if((hal_nrf_rx_cnt + len + 1) < HAL_NRF_RX_BUF_LEN){
hal_nrf_rx_buf[hal_nrf_rx_wr_index] = len;
hal_nrf_rx_wr_index++;
if(hal_nrf_rx_wr_index == HAL_NRF_RX_BUF_LEN){
hal_nrf_rx_wr_index=0;
}
// hal_nrf_read_payload((u8*)hal_nrf_rx_buf[hal_nrf_rx_wr_index].buf, len);
CSN_LOW();
HAL_NRF_HW_SPI_WRITE(R_RX_PAYLOAD);
while(HAL_NRF_HW_SPI_BUSY) {}
HAL_NRF_HW_SPI_READ();
for(i=0; i<len; i++){
HAL_NRF_HW_SPI_WRITE(0U);
while(HAL_NRF_HW_SPI_BUSY){}
hal_nrf_rx_buf[hal_nrf_rx_wr_index] = HAL_NRF_HW_SPI_READ();
hal_nrf_rx_wr_index++;
if(hal_nrf_rx_wr_index == HAL_NRF_RX_BUF_LEN){
hal_nrf_rx_wr_index=0;
}
}
CSN_HIGH();
hal_nrf_rx_cnt = hal_nrf_rx_cnt+len+1;
}else{
hal_nrf_flush_rx();
hal_nrf_rx_sta = HAL_NRF_RX_STA_BUF_OVF;
/** clear RX_DR */
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR));
break;
}
/** clear RX_DR */
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_RX_DR));
}while(!hal_nrf_rx_fifo_empty());
}
if(status & (1 << (uint8_t)HAL_NRF_TX_DS)){
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_TX_DS));
switch(hal_nrf_sta){
case HAL_NRF_STA_TX:
hal_nrf_tx_cmd_flag = 0;
if(hal_nrf_tx_cnt){
hal_nrf_tx_busy = 1;
len = hal_nrf_tx_buf[hal_nrf_tx_rd_index];
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
hal_nrf_tx_cnt = hal_nrf_tx_cnt-len-1;
// hal_nrf_write_tx_payload(hal_nrf_tx_buf_tmp, len);
CSN_LOW();
HAL_NRF_HW_SPI_WRITE(W_TX_PAYLOAD);
while(HAL_NRF_HW_SPI_BUSY) {}
HAL_NRF_HW_SPI_READ();
for(i=0; i<len; i++){
HAL_NRF_HW_SPI_WRITE(hal_nrf_tx_buf[hal_nrf_tx_rd_index]);
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
while(HAL_NRF_HW_SPI_BUSY) {} /* wait for byte transfer finished */
HAL_NRF_HW_SPI_READ();
}
CSN_HIGH();
// CE_HIGH();
// T2_START();
t2_start_delay();
}else{
if(hal_nrf_tx_sta == HAL_NRF_TX_STA_IDLE){
/** send end pkt */
hal_nrf_tx_sta = HAL_NRF_TX_STA_DONE;
read_flash_buf(slave_cmd, slave_cmd_end, CMD_LENGTH);
hal_nrf_write_tx_payload(slave_cmd, CMD_LENGTH);
hal_nrf_tx_cmd_flag = 2;
// CE_HIGH();
// T2_START();
t2_start_delay();
}else{
hal_nrf_tx_sta = HAL_NRF_TX_STA_IDLE;
hal_nrf_sta = HAL_NRF_STA_RX;
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
/** return to RX mode */
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
hal_nrf_tx_busy = 0;
}
}
break;
case HAL_NRF_STA_RX:
/** ack payload send */
break;
case HAL_NRF_STA_TX_CMD:
hal_nrf_sta = HAL_NRF_STA_RX;
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
/** return to RX mode */
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
hal_nrf_tx_busy = 0;
hal_nrf_tx_cmd_flag = 0;
break;
}
}
if(status & (1 << (uint8_t)HAL_NRF_MAX_RT)){
#if 0
// When a MAX_RT interrupt occurs the TX payload will not be removed from the TX FIFO.
// If the packet is to be discarded this must be done manually by flushing the TX FIFO.
// Alternatively, CE_PULSE() can be called re-starting transmission of the payload.
// (Will only be possible after the radio irq flags are cleared)
hal_nrf_flush_tx();
hal_nrf_flush_rx();
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
hal_nrf_sta=HAL_NRF_STA_RX;
/** discard all data in buffer */
hal_nrf_tx_busy = 0;
hal_nrf_tx_cnt = 0;
hal_nrf_tx_rd_index =0;
hal_nrf_tx_wr_index = 0;
// hal_nrf_flush_rx();
// hal_nrf_rx_cnt = 0;
// hal_nrf_rx_rd_index =0;
// hal_nrf_rx_wr_index = 0;
/** set timeout flag */
hal_nrf_timeout = 1;
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_MAX_RT));
#else
hal_nrf_write_reg (STATUS, (1<< (uint8_t)HAL_NRF_MAX_RT));
switch(hal_nrf_sta){
case HAL_NRF_STA_TX:
hal_nrf_tx_cmd_flag = 0;
if(hal_nrf_tx_cnt){
hal_nrf_tx_busy = 1;
len = hal_nrf_tx_buf[hal_nrf_tx_rd_index];
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
hal_nrf_tx_cnt = hal_nrf_tx_cnt-len-1;
// hal_nrf_write_tx_payload(hal_nrf_tx_buf_tmp, len);
CSN_LOW();
HAL_NRF_HW_SPI_WRITE(W_TX_PAYLOAD);
while(HAL_NRF_HW_SPI_BUSY) {}
HAL_NRF_HW_SPI_READ();
for(i=0; i<len; i++){
HAL_NRF_HW_SPI_WRITE(hal_nrf_tx_buf[hal_nrf_tx_rd_index]);
hal_nrf_tx_rd_index++;
if(hal_nrf_tx_rd_index == HAL_NRF_TX_BUF_LEN){
hal_nrf_tx_rd_index = 0;
}
while(HAL_NRF_HW_SPI_BUSY) {} /* wait for byte transfer finished */
HAL_NRF_HW_SPI_READ();
}
CSN_HIGH();
// CE_HIGH();
// T2_START();
t2_start_delay();
}else{
if(hal_nrf_tx_sta == HAL_NRF_TX_STA_IDLE){
/** send end pkt */
hal_nrf_tx_sta = HAL_NRF_TX_STA_DONE;
read_flash_buf(slave_cmd, slave_cmd_end, CMD_LENGTH);
hal_nrf_write_tx_payload(slave_cmd, CMD_LENGTH);
hal_nrf_tx_cmd_flag = 2;
// CE_HIGH();
// T2_START();
t2_start_delay();
}else{
hal_nrf_tx_sta = HAL_NRF_TX_STA_IDLE;
hal_nrf_sta = HAL_NRF_STA_RX;
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
/** return to RX mode */
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
hal_nrf_tx_busy = 0;
}
}
break;
case HAL_NRF_STA_RX:
/** ack payload send */
break;
case HAL_NRF_STA_TX_CMD:
hal_nrf_sta = HAL_NRF_STA_RX;
CE_LOW();
hal_nrf_flush_tx();
hal_nrf_flush_rx();
/** return to RX mode */
hal_nrf_set_operation_mode(HAL_NRF_PRX);
CE_HIGH();
hal_nrf_tx_busy = 0;
hal_nrf_tx_cmd_flag = 0;
break;
}
#endif
}
}
}
int main(void)
{
int ch;
bool_t eol=FALSE, spi_ini=FALSE, gpio_ini=FALSE;
spi_hndl_t spi_h;
gpio_hndl_t gpio_h;
if (gpio_init(&gpio_h, gpio_drv_io)!=LREC_SUCCESS) goto finish;
else gpio_ini=TRUE;
gpio_direction_output(&gpio_h, GPIO_CE, 0);
if (spi_init(&spi_h, 0, SPI_CS, SPI_MODE_0, FALSE, 8,
SPI_USE_DEF, SPI_USE_DEF, SPI_USE_DEF)!=LREC_SUCCESS) goto finish;
else spi_ini=TRUE;
signal(SIGINT, term_handler);
signal(SIGTERM, term_handler);
errno = 0;
hal_nrf_set_spi_hndl(&spi_h);
hal_nrf_set_power_mode(HAL_NRF_PWR_UP);
usleep(1500);
NRF_EXEC(hal_nrf_set_operation_mode(HAL_NRF_PRX));
for (ch=0; ch<128 && !scan_finish; ch++)
{
int i;
if (eol) printf("\n");
NRF_EXEC(hal_nrf_set_rf_channel(ch));
assert(hal_nrf_get_rf_channel()==ch);
chip_enable();
for (i=0; i<500; i++) {
if (hal_nrf_get_carrier_detect()) break;
usleep(1000);
}
if (i<500) {
if (!eol) printf("\n");
printf("Carrier detected on channel %d", ch);
eol=TRUE;
} else {
printf(".");
fflush(stdout);
eol = (!((ch+1)%10) ? TRUE : FALSE);
}
chip_disable();
}
if (!eol) printf("\n");
finish:
if (errno==ECOMM) printf("SPI communication error\n");
if (spi_ini) spi_free(&spi_h);
if (gpio_ini) gpio_free(&gpio_h);
return 0;
}
/** Switch RF mode to RX mode.
* Use this function to switch the mode to RX mode.
*/
void epl_rf_en_enter_rx_mode(void)
{
RFCE = 1;
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RF RX mode
}
bool gzll_tx_data(const uint8_t *src, uint8_t length, uint8_t pipe)
{
uint8_t temp_address[GZLL_ADDRESS_WIDTH];
uint16_t temp;
uint32_t flag;
ASSERT(length <= GZLL_MAX_FW_PAYLOAD_LENGTH && length > 0);
ASSERT(pipe <= 5);
/*
Length check to prevent memory corruption. (Note, assertion
will capture this as well).
*/
if(length == 0 || length > GZLL_MAX_FW_PAYLOAD_LENGTH)
{
return false;
}
gzll_current_tx_payload_length = length;
if(gzll_state_var == GZLL_HOST_ACTIVE)
{
gzll_goto_idle();
}
flag = gzll_interupts_save();
/*
If the specified pipe is different from the previous TX pipe,
the TX setup must be updated
*/
if(pipe != gzll_current_tx_pipe)
{
gzll_current_tx_pipe = pipe;
gzll_tx_setup_modified = true;
}
/*
Here, state can be GZLL_IDLE or GZLL_DEVICE_ACTIVE
*/
if(gzll_state_var == GZLL_IDLE)
{
if(gzll_tx_setup_modified) // TX setup has to be restored?
{
gzll_tx_setup_modified = false;
gzll_rx_setup_modified = true;
hal_nrf_set_operation_mode(HAL_NRF_PTX);
hal_nrf_open_pipe(HAL_NRF_PIPE0, EN_AA);
//Read out the full RX address for pipe number "pipe"
if(pipe == HAL_NRF_PIPE0)
{
hal_nrf_set_address(HAL_NRF_TX, gzll_p0_adr);
hal_nrf_set_address(HAL_NRF_PIPE0, gzll_p0_adr);
}
else
{
//lint -esym(550,bytes_in_buffer) "variable not accessed"
//lint -esym(438,bytes_in_buffer) "last assigned value not used"
uint8_t bytes_in_buffer;
bytes_in_buffer = hal_nrf_get_address(HAL_NRF_PIPE1, temp_address);
if(pipe != HAL_NRF_PIPE1)
{
switch(pipe)
{
default:
case HAL_NRF_PIPE2:
bytes_in_buffer = hal_nrf_get_address(HAL_NRF_PIPE2, temp_address);
break;
case HAL_NRF_PIPE3:
bytes_in_buffer = hal_nrf_get_address(HAL_NRF_PIPE3, temp_address);
break;
case HAL_NRF_PIPE4:
bytes_in_buffer = hal_nrf_get_address(HAL_NRF_PIPE4, temp_address);
break;
case HAL_NRF_PIPE5:
bytes_in_buffer = hal_nrf_get_address(HAL_NRF_PIPE5, temp_address);
break;
}
bytes_in_buffer = bytes_in_buffer;
}
//Here, temp_address will contain the full TX address
hal_nrf_set_address(HAL_NRF_PIPE0, temp_address);
hal_nrf_set_address(HAL_NRF_TX, temp_address);
/*
Change seed for random generator. Will prevent different devices
transmitting to the same host from using the same channel hopping
sequence.
*/
//lint -esym(534, gzll_lfsr_get) "return value ignored"
gzll_lfsr_get(pipe, 1);
}
}
// Prepare for new transmission
gzll_timeout_counter = 0;
gzll_channel_switch_counter = 0;
gzll_try_counter = 0;
hal_nrf_flush_tx();
GZLL_UPLOAD_PAYLOAD_TO_RADIO();
gzll_tx_success_f = false; // Transmission by default "failure"
temp = gzll_dyn_params[GZLL_PARAM_DEVICE_MODE];
gzll_set_radio_power_on(true);
if(gzll_sync_on)
{
switch(temp)
{
case GZLL_DEVICE_MODE_2:
default:
gzll_start_new_tx(GZLL_CHANNEL_PREVIOUS_SUCCESS);
break;
case GZLL_DEVICE_MODE_3:
gzll_start_new_tx(GZLL_CHANNEL_RANDOM);
break;
case GZLL_DEVICE_MODE_4:
gzll_start_new_tx(GZLL_CHANNEL_ESTIMATED);
break;
}
}
else
{
switch(temp)
{
case GZLL_DEVICE_MODE_0:
case GZLL_DEVICE_MODE_2:
gzll_start_new_tx(GZLL_CHANNEL_PREVIOUS_SUCCESS);
break;
default:
gzll_start_new_tx(GZLL_CHANNEL_RANDOM);
break;
}
}
gzll_state_var = GZLL_DEVICE_ACTIVE;
gzll_interupts_restore(flag);
return true; // Payload successfully written to TX FIFO
}
else // Else TRANSMIT state
{
/*
Check if criteria for starting new transmission when already transmitting
is fulfilled
*/
if(!gzll_tx_setup_modified &&
!hal_nrf_tx_fifo_full()
)
{
GZLL_UPLOAD_PAYLOAD_TO_RADIO();
gzll_interupts_restore(flag);
return true; // Payload successfully written to TX FIFO
}
else
{
gzll_interupts_restore(flag);
return false; // Payload not written to TX FIFO
}
}
}
void radio_pl_init (const uint8_t *address, hal_nrf_operation_mode_t operational_mode)
{
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, true); // Then open pipe0, w/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(RF_RETRANSMITS, RF_RETRANS_DELAY);
// Enables auto retransmit.
// 3 retrans with 250ms delay
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
/*****************************************************************************
* Changed from esb/radio_esb.c *
* Enables: *
* - ACK payload *
* - Dynamic payload width *
* - Dynamic ACK *
*****************************************************************************/
hal_nrf_enable_ack_pl(); // Try to enable ack payload
// When the features are locked, the FEATURE and DYNPD are read out 0x00
// even after we have tried to enable ack payload. This mean that we need to
// activate the features.
if(hal_nrf_read_reg(FEATURE) == 0x00 && (hal_nrf_read_reg(DYNPD) == 0x00))
{
hal_nrf_lock_unlock (); // Activate features
hal_nrf_enable_ack_pl(); // Enables payload in ack
}
hal_nrf_enable_dynamic_pl(); // Enables dynamic payload
hal_nrf_setup_dyn_pl(ALL_PIPES); // Sets up dynamic payload on
// all data pipes.
/*****************************************************************************
* End changes from esb/radio_esb.c *
*****************************************************************************/
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
start_timer(RF_POWER_UP_DELAY); // Wait for the radio to
wait_for_timer(); // power up
radio_set_status (RF_IDLE); // Radio now ready
}
