Ejemplo n.º 1
0
/* carry out clock initialization sequence */
static void nortos_clk_setup(void)
{
    // Setup DIVN
    if (dg_configEXT_CRYSTAL_FREQ == EXT_CRYSTAL_IS_16M)
    {
        hw_cpm_set_divn(false);                 // External crystal is 16MHz
    }
    else
    {
        hw_cpm_set_divn(true);                  // External crystal is 32MHz
    }

    hw_cpm_enable_rc32k();
    hw_cpm_lp_set_rc32k();

    NVIC_ClearPendingIRQ(XTAL16RDY_IRQn);
    nortos_xtal16m_settled = false;
    NVIC_EnableIRQ(XTAL16RDY_IRQn);                 // Activate XTAL16 Ready IRQ

    hw_cpm_set_xtal16m_settling_time(dg_configXTAL16_SETTLE_TIME_RC32K);
    hw_cpm_enable_xtal16m();                        // Enable XTAL16M
    hw_watchdog_unfreeze();                         // Start watchdog

    while (!hw_cpm_is_xtal16m_started());           // Block until XTAL16M starts

    /* Wait for XTAL16M to settle */
    while (!nortos_xtal16m_settled);

    hw_watchdog_freeze();                           // Stop watchdog
    hw_cpm_set_sysclk(SYS_CLK_IS_XTAL16M);
}
Ejemplo n.º 2
0
void ClkInit(void)
{
    NVIC_ClearPendingIRQ(XTAL16RDY_IRQn);
    NVIC_EnableIRQ(XTAL16RDY_IRQn);                 // Activate XTAL16 Ready IRQ
    hw_cpm_set_divn(false);                         // External crystal is 16MHz
    hw_cpm_enable_rc32k();
    hw_cpm_lp_set_rc32k();
    hw_cpm_set_xtal16m_settling_time(dg_configXTAL16_SETTLE_TIME_RC32K);
    hw_cpm_enable_xtal16m();                        // Enable XTAL16M
    hw_cpm_configure_xtal32k_pins();                // Configure XTAL32K pins
    hw_cpm_configure_xtal32k();                     // Configure XTAL32K
    hw_cpm_enable_xtal32k();                        // Enable XTAL32K
    hw_watchdog_unfreeze();                         // Start watchdog

    while (!hw_cpm_is_xtal16m_started());           // Block until XTAL16M starts

    hw_watchdog_freeze();                           // Stop watchdog
    hw_cpm_set_recharge_period((uint16_t)dg_configSET_RECHARGE_PERIOD);
    hw_cpm_set_sysclk(SYS_CLK_IS_XTAL16M);
    hw_cpm_set_hclk_div(0);
    hw_cpm_set_pclk_div(0);
    hw_otpc_init();
    hw_otpc_set_speed(HW_OTPC_SYS_CLK_FREQ_16);
}