static int or51211_load_firmware (struct dvb_frontend* fe,
const struct firmware *fw)
{
struct or51211_state* state = fe->demodulator_priv;
u8 tudata[585];
int i;
dprintk("Firmware is %zd bytes\n",fw->size);
/* Get eprom data */
tudata[0] = 17;
if (i2c_writebytes(state,0x50,tudata,1)) {
printk(KERN_WARNING "or51211:load_firmware error eprom addr\n");
return -1;
}
if (i2c_readbytes(state,0x50,&tudata[145],192)) {
printk(KERN_WARNING "or51211: load_firmware error eprom\n");
return -1;
}
/* Create firmware buffer */
for (i = 0; i < 145; i++)
tudata[i] = fw->data[i];
for (i = 0; i < 248; i++)
tudata[i+337] = fw->data[145+i];
state->config->reset(fe);
if (i2c_writebytes(state,state->config->demod_address,tudata,585)) {
printk(KERN_WARNING "or51211: load_firmware error 1\n");
return -1;
}
msleep(1);
if (i2c_writebytes(state,state->config->demod_address,
&fw->data[393],8125)) {
printk(KERN_WARNING "or51211: load_firmware error 2\n");
return -1;
}
msleep(1);
if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51211: load_firmware error 3\n");
return -1;
}
/* Wait at least 5 msec */
msleep(10);
if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51211: load_firmware error 4\n");
return -1;
}
msleep(10);
printk("or51211: Done.\n");
return 0;
};
static int or51211_setmode(struct dvb_frontend* fe, int mode)
{
struct or51211_state* state = fe->demodulator_priv;
u8 rec_buf[14];
state->config->setmode(fe, mode);
if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51211: setmode error 1\n");
return -1;
}
/* Wait at least 5 msec */
msleep(10);
if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
printk(KERN_WARNING "or51211: setmode error 2\n");
return -1;
}
msleep(10);
/* Set operation mode in Receiver 1 register;
* type 1:
* data 0x50h Automatic sets receiver channel conditions
* Automatic NTSC rejection filter
* Enable MPEG serial data output
* MPEG2tr
* High tuner phase noise
* normal +/-150kHz Carrier acquisition range
*/
if (i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
printk(KERN_WARNING "or51211: setmode error 3\n");
return -1;
}
rec_buf[0] = 0x04;
rec_buf[1] = 0x00;
rec_buf[2] = 0x03;
rec_buf[3] = 0x00;
msleep(20);
if (i2c_writebytes(state,state->config->demod_address,rec_buf,3)) {
printk(KERN_WARNING "or51211: setmode error 5\n");
}
msleep(3);
if (i2c_readbytes(state,state->config->demod_address,&rec_buf[10],2)) {
printk(KERN_WARNING "or51211: setmode error 6");
return -1;
}
dprintk("setmode rec status %02x %02x\n",rec_buf[10],rec_buf[11]);
return 0;
}
static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
struct or51132_state* state = fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[2];
u8 rcvr_stat;
u16 snr_equ;
u32 signal_strength;
int usK;
snd_buf[0]=0x04;
snd_buf[1]=0x02; /* SNR after Equalizer */
msleep(30); /* 30ms */
if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_status write error\n");
return -1;
}
msleep(30); /* 30ms */
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_status read error\n");
return -1;
}
snr_equ = rec_buf[0] | (rec_buf[1] << 8);
dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
/* Receiver Status */
snd_buf[0]=0x04;
snd_buf[1]=0x00;
msleep(30); /* 30ms */
if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
return -1;
}
msleep(30); /* 30ms */
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
return -1;
}
dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
rcvr_stat = rec_buf[1];
usK = (rcvr_stat & 0x10) ? 3 : 0;
/* The value reported back from the frontend will be FFFF=100% 0000=0% */
signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
if (signal_strength > 0xffff)
*strength = 0xffff;
else
*strength = signal_strength;
dprintk("read_signal_strength %i\n",*strength);
return 0;
}
static int or51211_read_snr(struct dvb_frontend* fe, u16* snr)
{
struct or51211_state* state = fe->demodulator_priv;
u8 rec_buf[2];
u8 snd_buf[3];
/* SNR after Equalizer */
snd_buf[0] = 0x04;
snd_buf[1] = 0x00;
snd_buf[2] = 0x04;
if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
printk(KERN_WARNING "%s: error writing snr reg\n",
__func__);
return -1;
}
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "%s: read_status read error\n",
__func__);
return -1;
}
state->snr = calculate_snr(rec_buf[0], 89599047);
*snr = (state->snr) >> 16;
dprintk("%s: noise = 0x%02x, snr = %d.%02d dB\n", __func__, rec_buf[0],
state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
return 0;
}
static int or51211_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
struct or51211_state* state = fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[] = {0x04,0x00,0x03,0x00};
*status = 0;
/* Receiver Status */
if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
printk(KERN_WARNING "or51132: read_status write error\n");
return -1;
}
msleep(3);
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_status read error\n");
return -1;
}
dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
if (rec_buf[0] & 0x01) { /* Receiver Lock */
*status |= FE_HAS_SIGNAL;
*status |= FE_HAS_CARRIER;
*status |= FE_HAS_VITERBI;
*status |= FE_HAS_SYNC;
*status |= FE_HAS_LOCK;
}
return 0;
}
static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char rec_buf[2];
unsigned char snd_buf[2];
u16 snr_equ;
snd_buf[0]=0x04;
snd_buf[1]=0x02; /* SNR after Equalizer */
msleep(30); /* 30ms */
if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
printk(KERN_WARNING "or51132: read_snr write error\n");
return -1;
}
msleep(30); /* 30ms */
if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
printk(KERN_WARNING "or51132: read_snr dvr read error\n");
return -1;
}
snr_equ = rec_buf[0] | (rec_buf[1] << 8);
dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
*snr = 0xFFFF - snr_equ;
dprintk("read_snr %i\n",*snr);
return 0;
}
//
// Originally, 'endTransmission' was an f(void) function.
// It has been modified to take one parameter indicating
// whether or not a STOP should be performed on the bus.
// Calling endTransmission(false) allows a sketch to
// perform a repeated start.
//
// WARNING: Nothing in the library keeps track of whether
// the bus tenure has been properly ended with a STOP. It
// is very possible to leave the bus in a hung state if
// no call to endTransmission(true) is made. Some I2C
// devices will behave oddly if they do not see a STOP.
//
uint8_t TwoWire::endTransmission(uint8_t sendStop)
{
int err;
if (sendStop == true) {
// transmit buffer (blocking)
if (txBufferLength > 1)
err = i2c_writebytes(i2c_fd, txBuffer, txBufferLength);
else if (txBufferLength == 1)
err = i2c_writebyte(i2c_fd, *txBuffer);
else
/* FIXME: A zero byte transmit is typically used to check for an
* ACK from the slave device. I'm not sure if this is the
* correct way to do this.
*/
err = i2c_readbyte(i2c_fd);
// empty buffer
txBufferLength = 0;
if (err < 0)
return 2;
return 0;
} else {
/* sendStop = false
* pretend we have held the bus while
* actually waiting for the next operation
*/
// i2c_add_to_buf(txAddress, 0, txBuffer, txBufferLength);
// i2c_transfer = 1;
return 0;
}
}
static int or51211_init(struct dvb_frontend* fe)
{
struct or51211_state* state = fe->demodulator_priv;
const struct or51211_config* config = state->config;
const struct firmware* fw;
unsigned char get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
unsigned char rec_buf[14];
int ret,i;
if (!state->initialized) {
/* Request the firmware, this will block until it uploads */
printk(KERN_INFO "or51211: Waiting for firmware upload "
"(%s)...\n", OR51211_DEFAULT_FIRMWARE);
ret = config->request_firmware(fe, &fw,
OR51211_DEFAULT_FIRMWARE);
printk(KERN_INFO "or51211:Got Hotplug firmware\n");
if (ret) {
printk(KERN_WARNING "or51211: No firmware uploaded "
"(timeout or file not found?)\n");
return ret;
}
ret = or51211_load_firmware(fe, fw);
release_firmware(fw);
if (ret) {
printk(KERN_WARNING "or51211: Writing firmware to "
"device failed!\n");
return ret;
}
printk(KERN_INFO "or51211: Firmware upload complete.\n");
/* Set operation mode in Receiver 1 register;
* type 1:
* data 0x50h Automatic sets receiver channel conditions
* Automatic NTSC rejection filter
* Enable MPEG serial data output
* MPEG2tr
* High tuner phase noise
* normal +/-150kHz Carrier acquisition range
*/
if (i2c_writebytes(state,state->config->demod_address,
cmd_buf,3)) {
printk(KERN_WARNING "or51211: Load DVR Error 5\n");
return -1;
}
/* Read back ucode version to besure we loaded correctly */
/* and are really up and running */
rec_buf[0] = 0x04;
rec_buf[1] = 0x00;
rec_buf[2] = 0x03;
rec_buf[3] = 0x00;
msleep(30);
if (i2c_writebytes(state,state->config->demod_address,
rec_buf,3)) {
printk(KERN_WARNING "or51211: Load DVR Error A\n");
return -1;
}
msleep(3);
if (i2c_readbytes(state,state->config->demod_address,
&rec_buf[10],2)) {
printk(KERN_WARNING "or51211: Load DVR Error B\n");
return -1;
}
rec_buf[0] = 0x04;
rec_buf[1] = 0x00;
rec_buf[2] = 0x01;
rec_buf[3] = 0x00;
msleep(20);
if (i2c_writebytes(state,state->config->demod_address,
rec_buf,3)) {
printk(KERN_WARNING "or51211: Load DVR Error C\n");
return -1;
}
msleep(3);
if (i2c_readbytes(state,state->config->demod_address,
&rec_buf[12],2)) {
printk(KERN_WARNING "or51211: Load DVR Error D\n");
return -1;
}
for (i = 0; i < 8; i++)
rec_buf[i]=0xed;
for (i = 0; i < 5; i++) {
msleep(30);
get_ver_buf[4] = i+1;
if (i2c_writebytes(state,state->config->demod_address,
get_ver_buf,5)) {
printk(KERN_WARNING "or51211:Load DVR Error 6"
" - %d\n",i);
return -1;
}
msleep(3);
if (i2c_readbytes(state,state->config->demod_address,
&rec_buf[i*2],2)) {
printk(KERN_WARNING "or51211:Load DVR Error 7"
" - %d\n",i);
return -1;
}
/* If we didn't receive the right index, try again */
if ((int)rec_buf[i*2+1]!=i+1){
i--;
}
}
dprintk("read_fwbits %x %x %x %x %x %x %x %x %x %x\n",
rec_buf[0], rec_buf[1], rec_buf[2], rec_buf[3],
rec_buf[4], rec_buf[5], rec_buf[6], rec_buf[7],
rec_buf[8], rec_buf[9]);
printk(KERN_INFO "or51211: ver TU%02x%02x%02x VSB mode %02x"
" Status %02x\n",
rec_buf[2], rec_buf[4],rec_buf[6],
rec_buf[12],rec_buf[10]);
rec_buf[0] = 0x04;
rec_buf[1] = 0x00;
rec_buf[2] = 0x03;
rec_buf[3] = 0x00;
msleep(20);
if (i2c_writebytes(state,state->config->demod_address,
rec_buf,3)) {
printk(KERN_WARNING "or51211: Load DVR Error 8\n");
return -1;
}
msleep(20);
if (i2c_readbytes(state,state->config->demod_address,
&rec_buf[8],2)) {
printk(KERN_WARNING "or51211: Load DVR Error 9\n");
return -1;
}
state->initialized = 1;
}
return 0;
}
static int or51132_set_parameters(struct dvb_frontend* fe,
struct dvb_frontend_parameters *param)
{
int ret;
u8 buf[4];
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
const struct firmware *fw;
/* Change only if we are actually changing the modulation */
if (state->current_modulation != param->u.vsb.modulation) {
switch(param->u.vsb.modulation) {
case VSB_8:
dprintk("set_parameters VSB MODE\n");
printk("or51132: Waiting for firmware upload(%s)...\n",
OR51132_VSB_FIRMWARE);
ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
&state->i2c->dev);
if (ret){
printk(KERN_WARNING "or51132: No firmware up"
"loaded(timeout or file not found?)\n");
return ret;
}
/* Set non-punctured clock for VSB */
state->config->set_ts_params(fe, 0);
break;
case QAM_AUTO:
case QAM_64:
case QAM_256:
dprintk("set_parameters QAM MODE\n");
printk("or51132: Waiting for firmware upload(%s)...\n",
OR51132_QAM_FIRMWARE);
ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
&state->i2c->dev);
if (ret){
printk(KERN_WARNING "or51132: No firmware up"
"loaded(timeout or file not found?)\n");
return ret;
}
/* Set punctured clock for QAM */
state->config->set_ts_params(fe, 1);
break;
default:
printk("or51132:Modulation type(%d) UNSUPPORTED\n",
param->u.vsb.modulation);
return -1;
};
ret = or51132_load_firmware(fe, fw);
release_firmware(fw);
if (ret) {
printk(KERN_WARNING "or51132: Writing firmware to "
"device failed!\n");
return ret;
}
printk("or51132: Firmware upload complete.\n");
state->current_modulation = param->u.vsb.modulation;
or51132_setmode(fe);
}
/* Change only if we are actually changing the channel */
if (state->current_frequency != param->frequency) {
dvb_pll_configure(state->config->pll_desc, buf,
param->frequency, 0);
dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
"0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
printk(KERN_WARNING "or51132: set_parameters error "
"writing to tuner\n");
/* Set to current mode */
or51132_setmode(fe);
/* Update current frequency */
state->current_frequency = param->frequency;
}
return 0;
}
static int or51132_setmode(struct dvb_frontend* fe)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
unsigned char cmd_buf[4];
dprintk("setmode %d\n",(int)state->current_modulation);
/* set operation mode in Receiver 1 register; */
cmd_buf[0] = 0x04;
cmd_buf[1] = 0x01;
switch (state->current_modulation) {
case QAM_256:
case QAM_64:
case QAM_AUTO:
/* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
cmd_buf[2] = 0x5F;
break;
case VSB_8:
/* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
cmd_buf[2] = 0x50;
break;
default:
printk("setmode:Modulation set to unsupported value\n");
};
cmd_buf[3] = 0x00;
if (i2c_writebytes(state,state->config->demod_address,
cmd_buf,3)) {
printk(KERN_WARNING "or51132: set_mode error 1\n");
return -1;
}
dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
/* Set operation mode in Receiver 6 register */
cmd_buf[0] = 0x1C;
switch (state->current_modulation) {
case QAM_AUTO:
/* REC MODE Normal Carrier Lock */
cmd_buf[1] = 0x00;
/* Channel MODE Auto QAM64/256 */
cmd_buf[2] = 0x4f;
break;
case QAM_256:
/* REC MODE Normal Carrier Lock */
cmd_buf[1] = 0x00;
/* Channel MODE QAM256 */
cmd_buf[2] = 0x45;
break;
case QAM_64:
/* REC MODE Normal Carrier Lock */
cmd_buf[1] = 0x00;
/* Channel MODE QAM64 */
cmd_buf[2] = 0x43;
break;
case VSB_8:
/* REC MODE inv IF spectrum, Normal */
cmd_buf[1] = 0x03;
/* Channel MODE ATSC/VSB8 */
cmd_buf[2] = 0x06;
break;
default:
printk("setmode: Modulation set to unsupported value\n");
};
cmd_buf[3] = 0x00;
msleep(20); /* 20ms */
if (i2c_writebytes(state,state->config->demod_address,
cmd_buf,3)) {
printk(KERN_WARNING "or51132: set_mode error 2\n");
return -1;
}
dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
return 0;
}
static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
{
struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
static u8 run_buf[] = {0x7F,0x01};
static u8 get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
u8 rec_buf[14];
u8 cmd_buf[14];
u32 firmwareAsize, firmwareBsize;
int i,ret;
dprintk("Firmware is %Zd bytes\n",fw->size);
/* Get size of firmware A and B */
firmwareAsize = le32_to_cpu(*((u32*)fw->data));
dprintk("FirmwareA is %i bytes\n",firmwareAsize);
firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
dprintk("FirmwareB is %i bytes\n",firmwareBsize);
/* Upload firmware */
if ((ret = i2c_writebytes(state,state->config->demod_address,
&fw->data[8],firmwareAsize))) {
printk(KERN_WARNING "or51132: load_firmware error 1\n");
return ret;
}
msleep(1); /* 1ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
&fw->data[8+firmwareAsize],firmwareBsize))) {
printk(KERN_WARNING "or51132: load_firmware error 2\n");
return ret;
}
msleep(1); /* 1ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
run_buf,2))) {
printk(KERN_WARNING "or51132: load_firmware error 3\n");
return ret;
}
/* Wait at least 5 msec */
msleep(20); /* 10ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
run_buf,2))) {
printk(KERN_WARNING "or51132: load_firmware error 4\n");
return ret;
}
/* 50ms for operation to begin */
msleep(50);
/* Read back ucode version to besure we loaded correctly and are really up and running */
/* Get uCode version */
cmd_buf[0] = 0x10;
cmd_buf[1] = 0x10;
cmd_buf[2] = 0x00;
cmd_buf[3] = 0x00;
msleep(20); /* 20ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
cmd_buf,3))) {
printk(KERN_WARNING "or51132: load_firmware error a\n");
return ret;
}
cmd_buf[0] = 0x04;
cmd_buf[1] = 0x17;
cmd_buf[2] = 0x00;
cmd_buf[3] = 0x00;
msleep(20); /* 20ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
cmd_buf,2))) {
printk(KERN_WARNING "or51132: load_firmware error b\n");
return ret;
}
cmd_buf[0] = 0x00;
cmd_buf[1] = 0x00;
cmd_buf[2] = 0x00;
cmd_buf[3] = 0x00;
msleep(20); /* 20ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
cmd_buf,2))) {
printk(KERN_WARNING "or51132: load_firmware error c\n");
return ret;
}
for(i=0;i<4;i++) {
msleep(20); /* 20ms */
get_ver_buf[4] = i+1;
if ((ret = i2c_readbytes(state,state->config->demod_address,
&rec_buf[i*2],2))) {
printk(KERN_WARNING
"or51132: load_firmware error d - %d\n",i);
return ret;
}
}
printk(KERN_WARNING
"or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
cmd_buf[0] = 0x10;
cmd_buf[1] = 0x00;
cmd_buf[2] = 0x00;
cmd_buf[3] = 0x00;
msleep(20); /* 20ms */
if ((ret = i2c_writebytes(state,state->config->demod_address,
cmd_buf,3))) {
printk(KERN_WARNING "or51132: load_firmware error e\n");
return ret;
}
return 0;
};
