/*
* i8259_init() - initialise the device
*
* This function initialises the i8259 chip and disables all interrupts
*/
void i8259_init(memaddr_t i8259,
uint8_t icw1, uint8_t icw2, uint8_t icw3, uint8_t icw4)
{
i8259_write(i8259, i8259_icw1, icw1 | I8259_ICW1);
i8259_write(i8259, i8259_icw2, icw2);
if ( (icw1 & I8259_ICW1_SNGL) == 0 )
i8259_write(i8259, i8259_icw3, icw3);
if ( (icw1 & I8259_ICW1_IC4) != 0 )
i8259_write(i8259, i8259_icw4, icw4);
i8259_set_mask(i8259, 0xff);
}
t_stat i8259_io(IOHANDLER* ioh,uint32* value,uint32 rw,uint32 mask)
{
int port = ioh->offset;
I8259* chip = (I8259*)ioh->ctxt;
if (rw==MEM_WRITE) {
return chip->write ? chip->write(chip,port,*value) : i8259_write(chip,port,*value);
} else {
return chip->read ? chip->read(chip,port,value) : i8259_read(chip,port,value);
}
}
/*
* i8259_disable() - disable the specified interrupts
*
* This routine disables the interrupts specified by the bits in the
* mask parameter: 1 = disable, 0 = do not change.
*
* The old value is returned.
*/
uint8_t i8259_disable(memaddr_t i8259, uint8_t mask)
{
uint8_t old = i8259_read(i8259, i8259_ocw1);
i8259_write(i8259, i8259_ocw1, old | mask);
return old;
}
/*
* i8259_set_mask() - set the mask register
*
* Sets the interrupt mask register to the specified value,
* returns the old value.
*/
uint8_t i8259_set_mask(memaddr_t i8259, uint8_t mask)
{
uint8_t old = i8259_read(i8259, i8259_ocw1);
i8259_write(i8259, i8259_ocw1, mask);
return old;
}
