static void
i915_clear_render_target_blitter(struct pipe_context *pipe,
struct pipe_surface *dst,
const union pipe_color_union *color,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height)
{
struct i915_texture *tex = i915_texture(dst->texture);
struct pipe_resource *pt = &tex->b.b;
union util_color uc;
unsigned offset = i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
assert(util_format_get_blockwidth(pt->format) == 1);
assert(util_format_get_blockheight(pt->format) == 1);
util_pack_color(color->f, dst->format, &uc);
i915_fill_blit( i915_context(pipe),
util_format_get_blocksize(pt->format),
XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB,
(unsigned short) tex->stride,
tex->buffer, offset,
(short) dstx, (short) dsty,
(short) width, (short) height,
uc.ui );
}
/* Assumes all values are within bounds -- no checking at this level -
* do it higher up if required.
*/
static void
i915_surface_copy_blitter(struct pipe_context *pipe,
struct pipe_resource *dst, unsigned dst_level,
unsigned dstx, unsigned dsty, unsigned dstz,
struct pipe_resource *src, unsigned src_level,
const struct pipe_box *src_box)
{
struct i915_texture *dst_tex = i915_texture(dst);
struct i915_texture *src_tex = i915_texture(src);
struct pipe_resource *dpt = &dst_tex->b.b;
struct pipe_resource *spt = &src_tex->b.b;
unsigned dst_offset, src_offset; /* in bytes */
/* Fallback for buffers. */
if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
src, src_level, src_box);
return;
}
/* XXX cannot copy 3d regions at this time */
assert(src_box->depth == 1);
if (dst->target != PIPE_TEXTURE_CUBE &&
dst->target != PIPE_TEXTURE_3D)
assert(dstz == 0);
dst_offset = i915_texture_offset(dst_tex, dst_level, dstz);
if (src->target != PIPE_TEXTURE_CUBE &&
src->target != PIPE_TEXTURE_3D)
assert(src_box->z == 0);
src_offset = i915_texture_offset(src_tex, src_level, src_box->z);
assert( util_format_get_blocksize(dpt->format) == util_format_get_blocksize(spt->format) );
assert( util_format_get_blockwidth(dpt->format) == util_format_get_blockwidth(spt->format) );
assert( util_format_get_blockheight(dpt->format) == util_format_get_blockheight(spt->format) );
assert( util_format_get_blockwidth(dpt->format) == 1 );
assert( util_format_get_blockheight(dpt->format) == 1 );
i915_copy_blit( i915_context(pipe),
util_format_get_blocksize(dpt->format),
(unsigned short) src_tex->stride, src_tex->buffer, src_offset,
(unsigned short) dst_tex->stride, dst_tex->buffer, dst_offset,
(short) src_box->x, (short) src_box->y, (short) dstx, (short) dsty,
(short) src_box->width, (short) src_box->height );
}
static void update_dst_buf_vars(struct i915_context *i915)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
uint32_t dst_buf_vars, cformat, zformat;
uint32_t early_z = 0;
uint32_t fixup = 0;
int need_fixup;
if (cbuf_surface)
cformat = cbuf_surface->format;
else
cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
cformat = translate_format(cformat);
if (depth_surface) {
struct i915_texture *tex = i915_texture(depth_surface->texture);
struct i915_screen *is = i915_screen(i915->base.screen);
zformat = translate_depth_format(depth_surface->format);
if (is->is_i945 && tex->tiling != I915_TILE_NONE
&& !i915->fs->info.writes_z)
early_z = CLASSIC_EARLY_DEPTH;
} else
zformat = 0;
dst_buf_vars = DSTORG_HORT_BIAS(0x8) | /* .5 */
DSTORG_VERT_BIAS(0x8) | /* .5 */
LOD_PRECLAMP_OGL |
TEX_DEFAULT_COLOR_OGL |
cformat |
zformat |
early_z;
if (i915->current.dst_buf_vars != dst_buf_vars) {
if (early_z != (i915->current.dst_buf_vars & CLASSIC_EARLY_DEPTH))
i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);
i915->current.dst_buf_vars = dst_buf_vars;
i915->static_dirty |= I915_DST_VARS;
i915->hardware_dirty |= I915_HW_STATIC;
}
need_fixup = need_target_fixup(cbuf_surface, &fixup);
if (i915->current.target_fixup_format != need_fixup ||
i915->current.fixup_swizzle != fixup) {
i915->current.target_fixup_format = need_fixup;
i915->current.fixup_swizzle = fixup;
/* we also send a new program to make sure the fixup for RGBA surfaces happens */
i915->hardware_dirty |= I915_HW_PROGRAM;
}
}
/**
* Called before drawing VBO to map vertex samplers and hand them to draw
*/
void
i915_prepare_vertex_sampling(struct i915_context *i915)
{
struct i915_winsys *iws = i915->iws;
unsigned i,j;
uint32_t row_stride[PIPE_MAX_TEXTURE_LEVELS];
uint32_t img_stride[PIPE_MAX_TEXTURE_LEVELS];
uint32_t mip_offsets[PIPE_MAX_TEXTURE_LEVELS];
unsigned num = i915->num_vertex_sampler_views;
struct pipe_sampler_view **views = i915->vertex_sampler_views;
assert(num <= PIPE_MAX_SAMPLERS);
if (!num)
return;
for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
struct pipe_sampler_view *view = i < num ? views[i] : NULL;
if (view) {
struct pipe_resource *tex = view->texture;
struct i915_texture *i915_tex = i915_texture(tex);
ubyte *addr;
/* We're referencing the texture's internal data, so save a
* reference to it.
*/
pipe_resource_reference(&i915->mapped_vs_tex[i], tex);
i915->mapped_vs_tex_buffer[i] = i915_tex->buffer;
addr = iws->buffer_map(iws,
i915_tex->buffer,
FALSE /* read only */);
/* Setup array of mipmap level pointers */
/* FIXME: handle 3D textures? */
for (j = view->u.tex.first_level; j <= tex->last_level; j++) {
mip_offsets[j] = i915_texture_offset(i915_tex, j , 0 /* FIXME depth */);
row_stride[j] = i915_tex->stride;
img_stride[j] = 0; /* FIXME */;
}
draw_set_mapped_texture(i915->draw,
PIPE_SHADER_VERTEX,
i,
tex->width0, tex->height0, tex->depth0,
view->u.tex.first_level, tex->last_level,
addr,
row_stride, img_stride, mip_offsets);
} else
i915->mapped_vs_tex[i] = NULL;
}
}
static void
i915_clear_depth_stencil_blitter(struct pipe_context *pipe,
struct pipe_surface *dst,
unsigned clear_flags,
double depth,
unsigned stencil,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height,
bool render_condition_enabled)
{
struct i915_texture *tex = i915_texture(dst->texture);
struct pipe_resource *pt = &tex->b.b;
unsigned packedds;
unsigned mask = 0;
unsigned offset = i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
assert(util_format_get_blockwidth(pt->format) == 1);
assert(util_format_get_blockheight(pt->format) == 1);
packedds = util_pack_z_stencil(dst->format, depth, stencil);
if (clear_flags & PIPE_CLEAR_DEPTH)
mask |= XY_COLOR_BLT_WRITE_RGB;
/* XXX presumably this does read-modify-write
(otherwise this won't work anyway). Hence will only want to
do it if really have stencil and it isn't cleared */
if ((clear_flags & PIPE_CLEAR_STENCIL) ||
(dst->format != PIPE_FORMAT_Z24_UNORM_S8_UINT))
mask |= XY_COLOR_BLT_WRITE_ALPHA;
i915_fill_blit( i915_context(pipe),
util_format_get_blocksize(pt->format),
mask,
(unsigned short) tex->stride,
tex->buffer, offset,
(short) dstx, (short) dsty,
(short) width, (short) height,
packedds );
}
static void update_framebuffer(struct i915_context *i915)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
unsigned x, y;
int layer;
uint32_t draw_offset, draw_size;
if (cbuf_surface) {
struct i915_texture *tex = i915_texture(cbuf_surface->texture);
assert(tex);
i915->current.cbuf_bo = tex->buffer;
i915->current.cbuf_flags = BUF_3D_ID_COLOR_BACK |
BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
buf_3d_tiling_bits(tex->tiling);
layer = cbuf_surface->u.tex.first_layer;
x = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksx;
y = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksy;
} else {
i915->current.cbuf_bo = NULL;
x = y = 0;
}
i915->static_dirty |= I915_DST_BUF_COLOR;
/* What happens if no zbuf??
*/
if (depth_surface) {
struct i915_texture *tex = i915_texture(depth_surface->texture);
unsigned offset = i915_texture_offset(tex, depth_surface->u.tex.level,
depth_surface->u.tex.first_layer);
assert(tex);
if (offset != 0)
debug_printf("Depth offset is %d\n",offset);
i915->current.depth_bo = tex->buffer;
i915->current.depth_flags = BUF_3D_ID_DEPTH |
BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
buf_3d_tiling_bits(tex->tiling);
} else
i915->current.depth_bo = NULL;
i915->static_dirty |= I915_DST_BUF_DEPTH;
/* drawing rect calculations */
draw_offset = x | (y << 16);
draw_size = (i915->framebuffer.width - 1 + x) |
((i915->framebuffer.height - 1 + y) << 16);
if (i915->current.draw_offset != draw_offset) {
i915->current.draw_offset = draw_offset;
i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);
i915->static_dirty |= I915_DST_RECT;
}
if (i915->current.draw_size != draw_size) {
i915->current.draw_size = draw_size;
i915->static_dirty |= I915_DST_RECT;
}
/* we also send a new program to make sure the fixup for RGBA surfaces happens */
i915->hardware_dirty |= I915_HW_STATIC | I915_HW_PROGRAM;
/* flush the cache in case we sample from the old renderbuffers */
i915_set_flush_dirty(i915, I915_FLUSH_CACHE);
}
void
i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil,
unsigned destx, unsigned desty, unsigned width, unsigned height)
{
struct i915_context *i915 = i915_context(pipe);
uint32_t clear_params, clear_color, clear_depth, clear_stencil,
clear_color8888, packed_z_stencil;
union util_color u_color;
float f_depth = depth;
struct i915_texture *cbuf_tex, *depth_tex;
int depth_clear_bbp, color_clear_bbp;
cbuf_tex = depth_tex = NULL;
clear_params = 0;
depth_clear_bbp = color_clear_bbp = 0;
if (buffers & PIPE_CLEAR_COLOR) {
struct pipe_surface *cbuf = i915->framebuffer.cbufs[0];
clear_params |= CLEARPARAM_WRITE_COLOR;
cbuf_tex = i915_texture(cbuf->texture);
util_pack_color(color->f, cbuf->format, &u_color);
if (util_format_get_blocksize(cbuf_tex->b.b.format) == 4) {
clear_color = u_color.ui;
color_clear_bbp = 32;
} else {
clear_color = (u_color.ui & 0xffff) | (u_color.ui << 16);
color_clear_bbp = 16;
}
/* correctly swizzle clear value */
if (i915->current.target_fixup_format)
util_pack_color(color->f, cbuf->format, &u_color);
else
util_pack_color(color->f, PIPE_FORMAT_B8G8R8A8_UNORM, &u_color);
clear_color8888 = u_color.ui;
} else
clear_color = clear_color8888 = 0;
clear_depth = clear_stencil = 0;
if (buffers & PIPE_CLEAR_DEPTH) {
struct pipe_surface *zbuf = i915->framebuffer.zsbuf;
clear_params |= CLEARPARAM_WRITE_DEPTH;
depth_tex = i915_texture(zbuf->texture);
packed_z_stencil = util_pack_z_stencil(depth_tex->b.b.format, depth, stencil);
if (util_format_get_blocksize(depth_tex->b.b.format) == 4) {
/* Avoid read-modify-write if there's no stencil. */
if (buffers & PIPE_CLEAR_STENCIL
|| depth_tex->b.b.format != PIPE_FORMAT_Z24_UNORM_S8_UINT) {
clear_params |= CLEARPARAM_WRITE_STENCIL;
clear_stencil = packed_z_stencil >> 24;
}
clear_depth = packed_z_stencil & 0xffffff;
depth_clear_bbp = 32;
} else {
void
i915_clear_emit(struct pipe_context *pipe, unsigned buffers, const float *rgba,
double depth, unsigned stencil,
unsigned destx, unsigned desty, unsigned width, unsigned height)
{
struct i915_context *i915 = i915_context(pipe);
uint32_t clear_params, clear_color, clear_depth, clear_stencil,
clear_color8888, packed_z_stencil;
union util_color u_color;
float f_depth = depth;
struct i915_texture *cbuf_tex, *depth_tex;
cbuf_tex = depth_tex = NULL;
clear_params = 0;
if (buffers & PIPE_CLEAR_COLOR) {
struct pipe_surface *cbuf = i915->framebuffer.cbufs[0];
clear_params |= CLEARPARAM_WRITE_COLOR;
cbuf_tex = i915_texture(cbuf->texture);
util_pack_color(rgba, cbuf->format, &u_color);
if (util_format_get_blocksize(cbuf_tex->b.b.format) == 4)
clear_color = u_color.ui;
else
clear_color = (u_color.ui & 0xffff) | (u_color.ui << 16);
util_pack_color(rgba, cbuf->format, &u_color);
clear_color8888 = u_color.ui;
} else
clear_color = clear_color8888 = 0;
clear_depth = clear_stencil = 0;
if (buffers & PIPE_CLEAR_DEPTH) {
struct pipe_surface *zbuf = i915->framebuffer.zsbuf;
clear_params |= CLEARPARAM_WRITE_DEPTH;
depth_tex = i915_texture(zbuf->texture);
packed_z_stencil = util_pack_z_stencil(depth_tex->b.b.format, depth, stencil);
if (util_format_get_blocksize(depth_tex->b.b.format) == 4) {
/* Avoid read-modify-write if there's no stencil. */
if (buffers & PIPE_CLEAR_STENCIL
|| depth_tex->b.b.format != PIPE_FORMAT_Z24_UNORM_S8_USCALED) {
clear_params |= CLEARPARAM_WRITE_STENCIL;
clear_stencil = packed_z_stencil & 0xff;
clear_depth = packed_z_stencil;
} else
clear_depth = packed_z_stencil & 0xffffff00;
} else {
clear_depth = (clear_depth & 0xffff) | (clear_depth << 16);
}
}
if (i915->hardware_dirty)
i915_emit_hardware_state(i915);
if (!BEGIN_BATCH(7 + 7)) {
FLUSH_BATCH(NULL);
i915_emit_hardware_state(i915);
i915->vbo_flushed = 1;
assert(BEGIN_BATCH(7 + 7));
}
OUT_BATCH(_3DSTATE_CLEAR_PARAMETERS);
OUT_BATCH(clear_params | CLEARPARAM_CLEAR_RECT);
OUT_BATCH(clear_color);
OUT_BATCH(clear_depth);
OUT_BATCH(clear_color8888);
OUT_BATCH_F(f_depth);
OUT_BATCH(clear_stencil);
OUT_BATCH(_3DPRIMITIVE | PRIM3D_CLEAR_RECT | 5);
OUT_BATCH_F(destx + width);
OUT_BATCH_F(desty + height);
OUT_BATCH_F(destx);
OUT_BATCH_F(desty + height);
OUT_BATCH_F(destx);
OUT_BATCH_F(desty);
/* Flush after clear, its expected to be a costly operation.
* This is not required, just a heuristic
*/
FLUSH_BATCH(NULL);
}
