void
identify_cpu (struct cpuinfo_ia64 *c)
{
union {
unsigned long bits[5];
struct {
/* id 0 & 1: */
char vendor[16];
/* id 2 */
u64 ppn; /* processor serial number */
/* id 3: */
unsigned number : 8;
unsigned revision : 8;
unsigned model : 8;
unsigned family : 8;
unsigned archrev : 8;
unsigned reserved : 24;
/* id 4: */
u64 features;
} field;
} cpuid;
pal_vm_info_1_u_t vm1;
pal_vm_info_2_u_t vm2;
pal_status_t status;
unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
int i;
for (i = 0; i < 5; ++i)
cpuid.bits[i] = ia64_get_cpuid(i);
memcpy(c->vendor, cpuid.field.vendor, 16);
#ifdef CONFIG_SMP
c->cpu = smp_processor_id();
#endif
c->ppn = cpuid.field.ppn;
c->number = cpuid.field.number;
c->revision = cpuid.field.revision;
c->model = cpuid.field.model;
c->family = cpuid.field.family;
c->archrev = cpuid.field.archrev;
c->features = cpuid.field.features;
status = ia64_pal_vm_summary(&vm1, &vm2);
if (status == PAL_STATUS_SUCCESS) {
impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
}
printk(KERN_INFO "CPU %d: %lu virtual and %lu physical address bits\n",
smp_processor_id(), impl_va_msb + 1, phys_addr_size);
c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
}
static void __cpuinit
identify_cpu (struct cpuinfo_ia64 *c)
{
union {
unsigned long bits[5];
struct {
/* id 0 & 1: */
char vendor[16];
/* id 2 */
u64 ppn; /* processor serial number */
/* id 3: */
unsigned number : 8;
unsigned revision : 8;
unsigned model : 8;
unsigned family : 8;
unsigned archrev : 8;
unsigned reserved : 24;
/* id 4: */
u64 features;
} field;
} cpuid;
pal_vm_info_1_u_t vm1;
pal_vm_info_2_u_t vm2;
pal_status_t status;
unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
int i;
for (i = 0; i < 5; ++i)
cpuid.bits[i] = ia64_get_cpuid(i);
memcpy(c->vendor, cpuid.field.vendor, 16);
#ifdef CONFIG_SMP
c->cpu = smp_processor_id();
/* below default values will be overwritten by identify_siblings()
* for Multi-Threading/Multi-Core capable cpu's
*/
c->threads_per_core = c->cores_per_socket = c->num_log = 1;
c->socket_id = -1;
identify_siblings(c);
#endif
c->ppn = cpuid.field.ppn;
c->number = cpuid.field.number;
c->revision = cpuid.field.revision;
c->model = cpuid.field.model;
c->family = cpuid.field.family;
c->archrev = cpuid.field.archrev;
c->features = cpuid.field.features;
status = ia64_pal_vm_summary(&vm1, &vm2);
if (status == PAL_STATUS_SUCCESS) {
impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
}
c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
}
