static void __init
check_sal_cache_flush (void)
{
unsigned long flags;
int cpu;
u64 vector;
cpu = get_cpu();
local_irq_save(flags);
/*
* Schedule a timer interrupt, wait until it's reported, and see if
* SAL_CACHE_FLUSH drops it.
*/
ia64_set_itv(IA64_TIMER_VECTOR);
ia64_set_itm(ia64_get_itc() + 1000);
while (!ia64_get_irr(IA64_TIMER_VECTOR))
cpu_relax();
ia64_sal_cache_flush(3);
if (ia64_get_irr(IA64_TIMER_VECTOR)) {
vector = ia64_get_ivr();
ia64_eoi();
WARN_ON(vector != IA64_TIMER_VECTOR);
} else {
sal_cache_flush_drops_interrupts = 1;
printk(KERN_ERR "SAL: SAL_CACHE_FLUSH drops interrupts; "
"PAL_CACHE_FLUSH will be used instead\n");
ia64_eoi();
}
local_irq_restore(flags);
put_cpu();
}
/*
* On SMP systems, when the scheduler does migration-cost autodetection,
* it needs a way to flush as much of the CPU's caches as possible.
*/
void sched_cacheflush(void)
{
ia64_sal_cache_flush(3);
}
void flush_all_cache()
{
ia64_sal_cache_flush(3);
}
