void init_desc(void)
{
// IDT entries
ISR_ENTRY(0); ISR_ENTRY(1); ISR_ENTRY(2); ISR_ENTRY(3); ISR_ENTRY(4); ISR_ENTRY(5);
ISR_ENTRY(6); ISR_ENTRY(7); ISR_ENTRY(8); ISR_ENTRY(9); ISR_ENTRY(10); ISR_ENTRY(11);
ISR_ENTRY(12); ISR_ENTRY(13); ISR_ENTRY(14); ISR_ENTRY(15); ISR_ENTRY(16); ISR_ENTRY(17);
ISR_ENTRY(18); ISR_ENTRY(19); ISR_ENTRY(20); ISR_ENTRY(21); ISR_ENTRY(22); ISR_ENTRY(23);
ISR_ENTRY(24); ISR_ENTRY(25); ISR_ENTRY(26); ISR_ENTRY(27); ISR_ENTRY(28); ISR_ENTRY(29);
ISR_ENTRY(30); ISR_ENTRY(31);
SYSG((u32)isr128, this_cpu.idt[0x80]);// SYStem Call goes here
ISR_ENTRY(255);
IRQ_ENTRY(0); IRQ_ENTRY(1); IRQ_ENTRY(2); IRQ_ENTRY(3); IRQ_ENTRY(4); IRQ_ENTRY(5);
IRQ_ENTRY(6); IRQ_ENTRY(7); IRQ_ENTRY(8); IRQ_ENTRY(9); IRQ_ENTRY(10); IRQ_ENTRY(11);
IRQ_ENTRY(12); IRQ_ENTRY(13); IRQ_ENTRY(14); IRQ_ENTRY(15);
write_tss(&this_cpu.gdt[GDT_TSS_ENTRY], __KERNEL_DS, 0x0);
this_cpu.idt_ptr.limit = IDT_ENTRY_NUM * sizeof(struct idt_desc_struct);
this_cpu.idt_ptr.base = (u32)&(this_cpu.idt);
gdt_flush((u32)&(this_cpu.gdt_ptr));
init_8259A();
irq_enable(2);
memset((u8 *)&interrupt_handlers , 0, sizeof(interrupt_handlers));
idt_flush((u32)&(this_cpu.idt_ptr));
tss_flush();
}
void init_idt() {
idt_ptr.limit = sizeof (idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32_t) & idt_entries;
memset(&idt_entries, 0, sizeof (idt_entry_t)*256);
idt_set_gate(0, (uint32_t) isr0, 0x08, 0x8E);
idt_set_gate(1, (uint32_t) isr1, 0x08, 0x8E);
idt_set_gate(2, (uint32_t) isr2, 0x08, 0x8E);
idt_set_gate(3, (uint32_t) isr3, 0x08, 0x8E);
idt_set_gate(4, (uint32_t) isr4, 0x08, 0x8E);
idt_set_gate(5, (uint32_t) isr5, 0x08, 0x8E);
idt_set_gate(6, (uint32_t) isr6, 0x08, 0x8E);
idt_set_gate(7, (uint32_t) isr7, 0x08, 0x8E);
idt_set_gate(8, (uint32_t) isr8, 0x08, 0x8E);
idt_set_gate(9, (uint32_t) isr9, 0x08, 0x8E);
idt_set_gate(10, (uint32_t) isr10, 0x08, 0x8E);
idt_set_gate(11, (uint32_t) isr11, 0x08, 0x8E);
idt_set_gate(12, (uint32_t) isr12, 0x08, 0x8E);
idt_set_gate(13, (uint32_t) isr13, 0x08, 0x8E);
idt_set_gate(14, (uint32_t) isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32_t) isr15, 0x08, 0x8E);
idt_set_gate(16, (uint32_t) isr16, 0x08, 0x8E);
idt_set_gate(17, (uint32_t) isr17, 0x08, 0x8E);
idt_set_gate(18, (uint32_t) isr18, 0x08, 0x8E);
idt_set_gate(19, (uint32_t) isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32_t) isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32_t) isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32_t) isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32_t) isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32_t) isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32_t) isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32_t) isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32_t) isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32_t) isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32_t) isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32_t) isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32_t) isr31, 0x08, 0x8E);
// IRQ entries
idt_set_gate(32, (uint32_t) irq0, 0x08, 0x8E);
idt_set_gate(33, (uint32_t) irq1, 0x08, 0x8E);
idt_set_gate(34, (uint32_t) irq2, 0x08, 0x8E);
idt_set_gate(35, (uint32_t) irq3, 0x08, 0x8E);
idt_set_gate(36, (uint32_t) irq4, 0x08, 0x8E);
idt_set_gate(37, (uint32_t) irq5, 0x08, 0x8E);
idt_set_gate(38, (uint32_t) irq6, 0x08, 0x8E);
idt_set_gate(39, (uint32_t) irq7, 0x08, 0x8E);
idt_set_gate(40, (uint32_t) irq8, 0x08, 0x8E);
idt_set_gate(41, (uint32_t) irq9, 0x08, 0x8E);
idt_set_gate(42, (uint32_t) irq10, 0x08, 0x8E);
idt_set_gate(43, (uint32_t) irq11, 0x08, 0x8E);
idt_set_gate(44, (uint32_t) irq12, 0x08, 0x8E);
idt_set_gate(45, (uint32_t) irq13, 0x08, 0x8E);
idt_set_gate(46, (uint32_t) irq14, 0x08, 0x8E);
idt_set_gate(47, (uint32_t) irq15, 0x08, 0x8E);
printf("* Flushing IDT.\n");
idt_flush(&idt_ptr);
}
void idt_install(){
ip.limit = (sizeof(struct idt_entry) * 256) - 1;
ip.base = (uint32_t)&idt;
memset(&idt, 0, sizeof(struct idt_entry) * 256);
idt_flush();
}
void idt_init() {
memset(idt_entries, 0, sizeof(idt_entries));
idt_ptr.base = (uint32_t)idt_entries;
idt_ptr.limit = sizeof(idt_entries) - 1;
pic_init();
idt_set_entry( 0, (uint32_t)exception0 , 0x08, 0x8E);
idt_set_entry( 1, (uint32_t)exception1 , 0x08, 0x8E);
idt_set_entry( 2, (uint32_t)exception2 , 0x08, 0x8E);
idt_set_entry( 3, (uint32_t)exception3 , 0x08, 0x8E);
idt_set_entry( 4, (uint32_t)exception4 , 0x08, 0x8E);
idt_set_entry( 5, (uint32_t)exception5 , 0x08, 0x8E);
idt_set_entry( 6, (uint32_t)exception6 , 0x08, 0x8E);
idt_set_entry( 7, (uint32_t)exception7 , 0x08, 0x8E);
idt_set_entry( 8, (uint32_t)exception8 , 0x08, 0x8E);
idt_set_entry( 9, (uint32_t)exception9 , 0x08, 0x8E);
idt_set_entry(10, (uint32_t)exception10, 0x08, 0x8E);
idt_set_entry(11, (uint32_t)exception11, 0x08, 0x8E);
idt_set_entry(12, (uint32_t)exception12, 0x08, 0x8E);
idt_set_entry(13, (uint32_t)exception13, 0x08, 0x8E);
idt_set_entry(14, (uint32_t)exception14, 0x08, 0x8E);
idt_set_entry(15, (uint32_t)exception15, 0x08, 0x8E);
idt_set_entry(16, (uint32_t)exception16, 0x08, 0x8E);
idt_set_entry(17, (uint32_t)exception17, 0x08, 0x8E);
idt_set_entry(18, (uint32_t)exception18, 0x08, 0x8E);
idt_set_entry(19, (uint32_t)exception19, 0x08, 0x8E);
idt_set_entry(20, (uint32_t)exception20, 0x08, 0x8E);
idt_set_entry(21, (uint32_t)exception21, 0x08, 0x8E);
idt_set_entry(22, (uint32_t)exception22, 0x08, 0x8E);
idt_set_entry(23, (uint32_t)exception23, 0x08, 0x8E);
idt_set_entry(24, (uint32_t)exception24, 0x08, 0x8E);
idt_set_entry(25, (uint32_t)exception25, 0x08, 0x8E);
idt_set_entry(26, (uint32_t)exception26, 0x08, 0x8E);
idt_set_entry(27, (uint32_t)exception27, 0x08, 0x8E);
idt_set_entry(28, (uint32_t)exception28, 0x08, 0x8E);
idt_set_entry(29, (uint32_t)exception29, 0x08, 0x8E);
idt_set_entry(30, (uint32_t)exception30, 0x08, 0x8E);
idt_set_entry(31, (uint32_t)exception31, 0x08, 0x8E);
idt_set_entry(32, (uint32_t)irq0, 0x08, 0x8E);
idt_set_entry(33, (uint32_t)irq1, 0x08, 0x8E);
idt_set_entry(34, (uint32_t)irq2, 0x08, 0x8E);
idt_set_entry(35, (uint32_t)irq3, 0x08, 0x8E);
idt_set_entry(36, (uint32_t)irq4, 0x08, 0x8E);
idt_set_entry(37, (uint32_t)irq5, 0x08, 0x8E);
idt_set_entry(38, (uint32_t)irq6, 0x08, 0x8E);
idt_set_entry(39, (uint32_t)irq7, 0x08, 0x8E);
idt_set_entry(40, (uint32_t)irq8, 0x08, 0x8E);
idt_set_entry(41, (uint32_t)irq9, 0x08, 0x8E);
idt_set_entry(42, (uint32_t)irq10, 0x08, 0x8E);
idt_set_entry(43, (uint32_t)irq11, 0x08, 0x8E);
idt_set_entry(44, (uint32_t)irq12, 0x08, 0x8E);
idt_set_entry(45, (uint32_t)irq13, 0x08, 0x8E);
idt_set_entry(46, (uint32_t)irq14, 0x08, 0x8E);
idt_set_entry(47, (uint32_t)irq15, 0x08, 0x8E);
idt_set_entry(128, (uint32_t)exception128, 0x08, 0x8E);
idt_flush((uint32_t)&(idt_ptr));
asm volatile("sti");
}
void kmain(multiboot_info_t* mbd, unsigned long magic)
{
if(magic != MULTIBOOT_BOOTLOADER_MAGIC) {
scrn_setmode(GREEN,BLACK);
scrn_print("Algo salio muy muy mal. No se que mas decirte.");
return;
}
scrn_cls();
scrn_setmode(GREEN,BLACK);
scrn_print("BIENVENIDO A juampiOS\n\t"
"Estamos trabajando para ofrecerle "
"el OS del futuro.\n");
scrn_print("INICIALIZANDO GDT...");
gdt_init();
gdt_flush();
scrn_print("OK\nINICIALIZANDO IDT PARA LAS EXCEPCIONES...");
initialize_exception_handlers();
idt_init_exceptions();
remap_pic();
scrn_print("OK\nINICIALIZANDO IDT PARA LAS INTERRUPCIONES Y SYSCALLS...");
irq_init_handlers();
syscalls_initialize();
idt_init_interrupts();
idt_init_syscalls();
idt_flush();
irq_sti_force();
scrn_printf("OK\nCHEQUEANDO ESTADO DE LOS MODULOS...");
scrn_printf("%u MODULOS CARGADOS\n",mbd->mods_count);
scrn_print("CHECKEANDO ESTADO DE LA MEMORIA\n");
// Chequeamos que la cantidad de memoria RAM presente.
if(mbd->flags & 1) {
scrn_printf("\tCantidad de RAM en el sistema:\n"
"\t\tLower: %u Kb, Upper: %u Kb\n",
mbd->mem_lower,mbd->mem_upper);
} else {
kernel_panic("Mapa de memoria de GRUB invalido");
}
scrn_print("INICIALIZANDO LAS ESTRUCTURAS DE MEMORIA DEL KERNEL...");
module_t* grub_modules = (module_t*) mbd->mods_addr;
uint kernel_end_addr = grub_modules[mbd->mods_count-1].mod_end;
// El mapa de memoria upper es a partir del primer megabyte ergo el primer
// lugar donde nos vamos de largo es 1024 kilobytes mas la memoria que dice GRUB
paging_init(kernel_end_addr, (1024+mbd->mem_upper)*1024);
scrn_printf("OK\n");
scrn_print("INICIALIZANDO DISCO ATA\n");
hdd_init();
scrn_printf("INICIALIZANDO FILESYSTEM MINIX\n");
init_disk_super_block();
keybuffer_init(1024);
scheduler_init();
void * buffer = (void *) grub_modules[0].mod_start;
jump_to_initial(buffer);
while(1) ;
}
void idt::init() {
idt_ptr.limit = sizeof(idt_entry_t) * IDT_NUM_ENTRIES - 1;
idt_ptr.base = (uint64_t)&idt_entries;
memset(&idt_entries[0], 0, IDT_NUM_ENTRIES * sizeof(idt_entry_t));
idt_flush(&idt_ptr);
}
void init_idt(){
idt.limit = sizeof(idt_entry) * 256 -1;
idt.base = (unsigned int)&idt_entries;
for(unsigned char* i=(unsigned char*)idt_entries;i<((unsigned char*)&(idt_entries[256]));i++){*i = 0;}
idt_set_gate(0, (unsigned int)isr0, 0x08, 0x8E);
idt_set_gate(1, (unsigned int)isr1, 0x08, 0x8E);
idt_set_gate(2, (unsigned int)isr2, 0x08, 0x8E);
idt_set_gate(3, (unsigned int)isr3, 0x08, 0x8E);
idt_set_gate(4, (unsigned int)isr4, 0x08, 0x8E);
idt_set_gate(5, (unsigned int)isr5, 0x08, 0x8E);
idt_set_gate(6, (unsigned int)isr6, 0x08, 0x8E);
idt_set_gate(7, (unsigned int)isr7, 0x08, 0x8E);
idt_set_gate(8, (unsigned int)isr8, 0x08, 0x8E);
idt_set_gate(9, (unsigned int)isr9, 0x08, 0x8E);
idt_set_gate(10, (unsigned int)isr10, 0x08, 0x8E);
idt_set_gate(11, (unsigned int)isr11, 0x08, 0x8E);
idt_set_gate(12, (unsigned int)isr12, 0x08, 0x8E);
idt_set_gate(13, (unsigned int)isr13, 0x08, 0x8E);
idt_set_gate(14, (unsigned int)isr14, 0x08, 0x8E);
idt_set_gate(15, (unsigned int)isr15, 0x08, 0x8E);
idt_set_gate(16, (unsigned int)isr16, 0x08, 0x8E);
idt_set_gate(17, (unsigned int)isr17, 0x08, 0x8E);
idt_set_gate(18, (unsigned int)isr18, 0x08, 0x8E);
idt_set_gate(19, (unsigned int)isr19, 0x08, 0x8E);
idt_set_gate(20, (unsigned int)isr20, 0x08, 0x8E);
idt_set_gate(21, (unsigned int)isr21, 0x08, 0x8E);
idt_set_gate(22, (unsigned int)isr22, 0x08, 0x8E);
idt_set_gate(23, (unsigned int)isr23, 0x08, 0x8E);
idt_set_gate(24, (unsigned int)isr24, 0x08, 0x8E);
idt_set_gate(25, (unsigned int)isr25, 0x08, 0x8E);
idt_set_gate(26, (unsigned int)isr26, 0x08, 0x8E);
idt_set_gate(27, (unsigned int)isr27, 0x08, 0x8E);
idt_set_gate(28, (unsigned int)isr28, 0x08, 0x8E);
idt_set_gate(29, (unsigned int)isr29, 0x08, 0x8E);
idt_set_gate(30, (unsigned int)isr30, 0x08, 0x8E);
idt_set_gate(31, (unsigned int)isr31, 0x08, 0x8E);
idt_set_gate(32, (unsigned int)isr32, 0x08, 0x8E);
idt_set_gate(33, (unsigned int)isr33, 0x08, 0x8E);
idt_set_gate(34, (unsigned int)isr34, 0x08, 0x8E);
idt_set_gate(35, (unsigned int)isr35, 0x08, 0x8E);
idt_set_gate(36, (unsigned int)isr36, 0x08, 0x8E);
idt_set_gate(37, (unsigned int)isr37, 0x08, 0x8E);
idt_set_gate(38, (unsigned int)isr38, 0x08, 0x8E);
idt_set_gate(39, (unsigned int)isr39, 0x08, 0x8E);
idt_set_gate(40, (unsigned int)isr40, 0x08, 0x8E);
idt_set_gate(41, (unsigned int)isr41, 0x08, 0x8E);
idt_set_gate(42, (unsigned int)isr42, 0x08, 0x8E);
idt_set_gate(43, (unsigned int)isr43, 0x08, 0x8E);
idt_set_gate(44, (unsigned int)isr44, 0x08, 0x8E);
idt_set_gate(45, (unsigned int)isr45, 0x08, 0x8E);
idt_set_gate(46, (unsigned int)isr46, 0x08, 0x8E);
idt_set_gate(47, (unsigned int)isr47, 0x08, 0x8E);
idt_flush((unsigned int)&idt);
}
void
init_idt()
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 -1;
idt_ptr.base = (unsigned long) &idt_entries;
memset(&idt_entries, 0, sizeof(idt_entry_t) * 256);
printk("Flushing IDT: ");
idt_flush(&idt_ptr);
printk(SUCC_COLOR "ok\n" DEF_COLOR);
}
// Initialisation routine - zeroes all the interrupt service routines, and
// initialises the IDT.
void init_idt ()
{
// Zero all interrupt handlers initially.
memset (&interrupt_handlers, 0, sizeof (interrupt_handler_t) * 256);
// Just like the GDT, the IDT has a "limit" field that is set to the last valid byte in the IDT,
// after adding in the start position (i.e. size-1).
idt_ptr.limit = sizeof (idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32_t) &idt_entries;
// Zero the IDT to start with.
memset (&idt_entries, 0, sizeof (idt_entry_t) * 255);
// Set each gate in the IDT that we care about - that is:
// 0-32: Used by the CPU to report conditions, both normal and error.
// 255: Will be used later as a way to execute system calls.
idt_set_gate ( 0, (uint32_t)isr0 , 0x08, 0x8E);
idt_set_gate ( 1, (uint32_t)isr1 , 0x08, 0x8E);
idt_set_gate ( 2, (uint32_t)isr2 , 0x08, 0x8E);
idt_set_gate ( 3, (uint32_t)isr3 , 0x08, 0x8E);
idt_set_gate ( 4, (uint32_t)isr4 , 0x08, 0x8E);
idt_set_gate ( 5, (uint32_t)isr5 , 0x08, 0x8E);
idt_set_gate ( 6, (uint32_t)isr6 , 0x08, 0x8E);
idt_set_gate ( 7, (uint32_t)isr7 , 0x08, 0x8E);
idt_set_gate ( 8, (uint32_t)isr8 , 0x08, 0x8E);
idt_set_gate ( 9, (uint32_t)isr9 , 0x08, 0x8E);
idt_set_gate (10, (uint32_t)isr10, 0x08, 0x8E);
idt_set_gate (11, (uint32_t)isr11, 0x08, 0x8E);
idt_set_gate (12, (uint32_t)isr12, 0x08, 0x8E);
idt_set_gate (13, (uint32_t)isr13, 0x08, 0x8E);
idt_set_gate (14, (uint32_t)isr14, 0x08, 0x8E);
idt_set_gate (15, (uint32_t)isr15, 0x08, 0x8E);
idt_set_gate (16, (uint32_t)isr16, 0x08, 0x8E);
idt_set_gate (17, (uint32_t)isr17, 0x08, 0x8E);
idt_set_gate (18, (uint32_t)isr18, 0x08, 0x8E);
idt_set_gate (19, (uint32_t)isr19, 0x08, 0x8E);
idt_set_gate (20, (uint32_t)isr20, 0x08, 0x8E);
idt_set_gate (21, (uint32_t)isr21, 0x08, 0x8E);
idt_set_gate (22, (uint32_t)isr22, 0x08, 0x8E);
idt_set_gate (23, (uint32_t)isr23, 0x08, 0x8E);
idt_set_gate (24, (uint32_t)isr24, 0x08, 0x8E);
idt_set_gate (25, (uint32_t)isr25, 0x08, 0x8E);
idt_set_gate (26, (uint32_t)isr26, 0x08, 0x8E);
idt_set_gate (27, (uint32_t)isr27, 0x08, 0x8E);
idt_set_gate (28, (uint32_t)isr28, 0x08, 0x8E);
idt_set_gate (29, (uint32_t)isr29, 0x08, 0x8E);
idt_set_gate (30, (uint32_t)isr30, 0x08, 0x8E);
idt_set_gate (31, (uint32_t)isr31, 0x08, 0x8E);
idt_set_gate (255, (uint32_t)isr255, 0x08, 0x8E);
// Tell the CPU about our new IDT.
idt_flush ((uint32_t)&idt_ptr);
}
void idt_init()
{
ip.limit = sizeof(idt_entry_t) * 256 - 1;
ip.base = (uint32_t)&ient;
memset(&ient, 0, sizeof(idt_entry_t) * 256);
isr_init();
irq_init();
idt_flush((uint32_t)&ip);
printStatusMessage("Loading IDTs...",STATUS_DONE);
}
void idt_init(void){
init_interrupt_chip();
idt_ptr.limit = sizeof(idt_entry_t) * INTERRUPT_MAX - 1;
idt_ptr.base = (uint32)&idt_entries;
for(uint32 i = 0;i < 48;i++){
idt_set_gate(i,(uint32)isr_irq_func[i],0x08,0x8E);
}
idt_set_gate(128,(uint32)isr128,0x08,0xEF);
idt_flush((uint32)&idt_ptr);
}
void idt_init()
{
memset(&idt_entries, 0, sizeof(idt_entries));
set_trap_gate( 0, isr0);
set_trap_gate( 1, isr1);
set_intr_gate( 2, isr2);
set_system_gate( 3, isr3);
set_system_gate( 4, isr4);
set_system_gate( 5, isr5);
set_intr_gate( 6, isr6 );
set_intr_gate( 7, isr7 );
set_intr_gate( 8, isr8 );
set_intr_gate( 9, isr9 );
set_intr_gate(10, isr10);
set_intr_gate(11, isr11);
set_intr_gate(12, isr12);
set_intr_gate(13, isr13);
set_intr_gate(14, isr14);
set_intr_gate(15, isr15);
set_intr_gate(16, isr16);
set_intr_gate(17, isr17);
set_intr_gate(18, isr18);
set_intr_gate(19, isr19);
set_intr_gate(32, isr32); // irq0
set_intr_gate(33, isr33);
set_intr_gate(34, isr34);
set_intr_gate(35, isr35);
set_intr_gate(36, isr36);
set_intr_gate(37, isr37);
set_intr_gate(38, isr38);
set_intr_gate(39, isr39);
set_intr_gate(40, isr40);
set_intr_gate(41, isr41);
set_intr_gate(42, isr42);
set_intr_gate(43, isr43);
set_intr_gate(44, isr44);
set_intr_gate(45, isr45);
set_intr_gate(46, isr46);
set_intr_gate(47, isr47);
idt_ptr.limit = sizeof(idt_entries) -1;
idt_ptr.base = (u64)idt_entries;
idt_flush(&idt_ptr);
}
int init_idt()
{
idt_ptr.limit = sizeof(idt_entry_t) * NUM_IDT -1;
idt_ptr.base = (int) &idt_entries;
memset(&idt_entries, 0, sizeof(idt_entry_t)*NUM_IDT);
/* TODO: understand selector and flags */
idt_set_gate( 0, (int)isr0 , 0x08, 0x8E);
idt_set_gate( 1, (int)isr1 , 0x08, 0x8E);
idt_set_gate( 2, (int)isr2 , 0x08, 0x8E);
idt_set_gate( 3, (int)isr3 , 0x08, 0x8E);
idt_set_gate( 4, (int)isr4 , 0x08, 0x8E);
idt_set_gate( 5, (int)isr5 , 0x08, 0x8E);
idt_set_gate( 6, (int)isr6 , 0x08, 0x8E);
idt_set_gate( 7, (int)isr7 , 0x08, 0x8E);
idt_set_gate( 8, (int)isr8 , 0x08, 0x8E);
idt_set_gate( 9, (int)isr9 , 0x08, 0x8E);
idt_set_gate( 10, (int)isr10 , 0x08, 0x8E);
idt_set_gate( 11, (int)isr11 , 0x08, 0x8E);
idt_set_gate( 12, (int)isr12 , 0x08, 0x8E);
idt_set_gate( 13, (int)isr13 , 0x08, 0x8E);
idt_set_gate( 14, (int)isr14 , 0x08, 0x8E);
idt_set_gate( 15, (int)isr15 , 0x08, 0x8E);
idt_set_gate( 16, (int)isr16 , 0x08, 0x8E);
idt_set_gate( 17, (int)isr17 , 0x08, 0x8E);
idt_set_gate( 18, (int)isr18 , 0x08, 0x8E);
idt_set_gate( 19, (int)isr19 , 0x08, 0x8E);
idt_set_gate( 20, (int)isr20 , 0x08, 0x8E);
idt_set_gate( 21, (int)isr21 , 0x08, 0x8E);
idt_set_gate( 22, (int)isr22 , 0x08, 0x8E);
idt_set_gate( 23, (int)isr23 , 0x08, 0x8E);
idt_set_gate( 24, (int)isr24 , 0x08, 0x8E);
idt_set_gate( 25, (int)isr25 , 0x08, 0x8E);
idt_set_gate( 26, (int)isr26 , 0x08, 0x8E);
idt_set_gate( 27, (int)isr27 , 0x08, 0x8E);
idt_set_gate( 28, (int)isr28 , 0x08, 0x8E);
idt_set_gate( 29, (int)isr29 , 0x08, 0x8E);
idt_set_gate( 30, (int)isr30 , 0x08, 0x8E);
idt_set_gate( 31, (int)isr31 , 0x08, 0x8E);
//idt_flush((int)&idt_ptr);
idt_flush();
return 1;
}
void idt_init(void) {
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32_t) &idt_entry;
memset(&idt_entry, 0, sizeof(idt_entry_t) * 256);
/* Set access flags to 0x8E: entry present, is ring level 0 (kernel level)
* and has lower 5 bits set to decimal 14 (hex E).
*/
idt_set_gate(0, (uint32_t) isr0, 0x08, 0x8E);
idt_set_gate(1, (uint32_t) isr1, 0x08, 0x8E);
idt_set_gate(2, (uint32_t) isr2, 0x08, 0x8E);
idt_set_gate(3, (uint32_t) isr3, 0x08, 0x8E);
idt_set_gate(4, (uint32_t) isr4, 0x08, 0x8E);
idt_set_gate(5, (uint32_t) isr5, 0x08, 0x8E);
idt_set_gate(6, (uint32_t) isr6, 0x08, 0x8E);
idt_set_gate(7, (uint32_t) isr7, 0x08, 0x8E);
idt_set_gate(8, (uint32_t) isr8, 0x08, 0x8E);
idt_set_gate(9, (uint32_t) isr9, 0x08, 0x8E);
idt_set_gate(10, (uint32_t) isr10, 0x08, 0x8E);
idt_set_gate(11, (uint32_t) isr11, 0x08, 0x8E);
idt_set_gate(12, (uint32_t) isr12, 0x08, 0x8E);
idt_set_gate(13, (uint32_t) isr13, 0x08, 0x8E);
idt_set_gate(14, (uint32_t) isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32_t) isr15, 0x08, 0x8E);
idt_set_gate(16, (uint32_t) isr16, 0x08, 0x8E);
idt_set_gate(17, (uint32_t) isr17, 0x08, 0x8E);
idt_set_gate(18, (uint32_t) isr18, 0x08, 0x8E);
idt_set_gate(19, (uint32_t) isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32_t) isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32_t) isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32_t) isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32_t) isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32_t) isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32_t) isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32_t) isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32_t) isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32_t) isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32_t) isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32_t) isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32_t) isr31, 0x08, 0x8E);
idt_flush((uint32_t) &idt_ptr);
PIC_remap(0x20, 0x28);
}
// 初始化中断描述符表
void init_idt(void)
{
init_interrupt_chip();
idt_ptr.limit = sizeof(idt_entry_t) * INTERRUPT_MAX - 1;
idt_ptr.base = (uint32_t)&idt_entries;
// 0~31: 用于 CPU 的中断处理
// 32~47: Intel 保留
for (uint32_t i = 0; i < 48; ++i) {
idt_set_gate(i, (uint32_t)isr_irq_func[i], 0x08, 0x8E);
}
// 128 (0x80) 将来用于实现系统调用
idt_set_gate(128, (uint32_t)isr128, 0x08, 0xEF);
// 更新设置中断描述符表
idt_flush((uint32_t)&idt_ptr);
}
static void idt_init() {
log(LOG_TAG_INFO, "Init idt descriptor tables");
idt_ptr.limit = sizeof(idt_entry_t) * (IDTENTRIES -1);
idt_ptr.base = (u32int)&idt_entries;
memset((char*)&idt_entries, 0, sizeof(idt_entries) * IDTENTRIES);
idt_set_gate(0, (u32int)isr0, 0x08, 0x8E);
idt_set_gate(1, (u32int)isr1, 0x08, 0x8E);
idt_set_gate(2, (u32int)isr2, 0x08, 0x8E);
idt_set_gate(3, (u32int)isr3, 0x08, 0x8E);
idt_set_gate(4, (u32int)isr4, 0x08, 0x8E);
idt_set_gate(5, (u32int)isr5, 0x08, 0x8E);
idt_set_gate(6, (u32int)isr6, 0x08, 0x8E);
idt_set_gate(7, (u32int)isr7, 0x08, 0x8E);
idt_set_gate(8, (u32int)isr8, 0x08, 0x8E);
idt_set_gate(9, (u32int)isr9, 0x08, 0x8E);
idt_set_gate(10, (u32int)isr10, 0x08, 0x8E);
idt_set_gate(11, (u32int)isr11, 0x08, 0x8E);
idt_set_gate(12, (u32int)isr12, 0x08, 0x8E);
idt_set_gate(13, (u32int)isr13, 0x08, 0x8E);
idt_set_gate(14, (u32int)isr14, 0x08, 0x8E);
idt_set_gate(15, (u32int)isr15, 0x08, 0x8E);
idt_set_gate(16, (u32int)isr16, 0x08, 0x8E);
idt_set_gate(17, (u32int)isr17, 0x08, 0x8E);
idt_set_gate(18, (u32int)isr18, 0x08, 0x8E);
idt_set_gate(19, (u32int)isr19, 0x08, 0x8E);
idt_set_gate(20, (u32int)isr20, 0x08, 0x8E);
idt_set_gate(21, (u32int)isr21, 0x08, 0x8E);
idt_set_gate(22, (u32int)isr22, 0x08, 0x8E);
idt_set_gate(23, (u32int)isr23, 0x08, 0x8E);
idt_set_gate(24, (u32int)isr24, 0x08, 0x8E);
idt_set_gate(25, (u32int)isr25, 0x08, 0x8E);
idt_set_gate(26, (u32int)isr26, 0x08, 0x8E);
idt_set_gate(27, (u32int)isr27, 0x08, 0x8E);
idt_set_gate(28, (u32int)isr28, 0x08, 0x8E);
idt_set_gate(29, (u32int)isr29, 0x08, 0x8E);
idt_set_gate(30, (u32int)isr30, 0x08, 0x8E);
idt_set_gate(31, (u32int)isr31, 0x08, 0x8E);
idt_flush((u32int)&idt_ptr);
}
static void init_idt()
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 -1;
idt_ptr.base = (u32int)&idt_entries;
memset(&idt_entries, 0, sizeof(idt_entry_t)*256);
idt_set_gate( 0, (u32int)isr0 , 0x08, 0x8E);
idt_set_gate( 1, (u32int)isr1 , 0x08, 0x8E);
idt_set_gate( 2, (u32int)isr2 , 0x08, 0x8E);
idt_set_gate( 3, (u32int)isr3 , 0x08, 0x8E);
idt_set_gate( 4, (u32int)isr4 , 0x08, 0x8E);
idt_set_gate( 5, (u32int)isr5 , 0x08, 0x8E);
idt_set_gate( 6, (u32int)isr6 , 0x08, 0x8E);
idt_set_gate( 7, (u32int)isr7 , 0x08, 0x8E);
idt_set_gate( 8, (u32int)isr8 , 0x08, 0x8E);
idt_set_gate( 9, (u32int)isr9 , 0x08, 0x8E);
idt_set_gate(10, (u32int)isr10, 0x08, 0x8E);
idt_set_gate(11, (u32int)isr11, 0x08, 0x8E);
idt_set_gate(12, (u32int)isr12, 0x08, 0x8E);
idt_set_gate(13, (u32int)isr13, 0x08, 0x8E);
idt_set_gate(14, (u32int)isr14, 0x08, 0x8E);
idt_set_gate(15, (u32int)isr15, 0x08, 0x8E);
idt_set_gate(16, (u32int)isr16, 0x08, 0x8E);
idt_set_gate(17, (u32int)isr17, 0x08, 0x8E);
idt_set_gate(18, (u32int)isr18, 0x08, 0x8E);
idt_set_gate(19, (u32int)isr19, 0x08, 0x8E);
idt_set_gate(20, (u32int)isr20, 0x08, 0x8E);
idt_set_gate(21, (u32int)isr21, 0x08, 0x8E);
idt_set_gate(22, (u32int)isr22, 0x08, 0x8E);
idt_set_gate(23, (u32int)isr23, 0x08, 0x8E);
idt_set_gate(24, (u32int)isr24, 0x08, 0x8E);
idt_set_gate(25, (u32int)isr25, 0x08, 0x8E);
idt_set_gate(26, (u32int)isr26, 0x08, 0x8E);
idt_set_gate(27, (u32int)isr27, 0x08, 0x8E);
idt_set_gate(28, (u32int)isr28, 0x08, 0x8E);
idt_set_gate(29, (u32int)isr29, 0x08, 0x8E);
idt_set_gate(30, (u32int)isr30, 0x08, 0x8E);
idt_set_gate(31, (u32int)isr31, 0x08, 0x8E);
idt_flush((u32int)&idt_ptr);
}
void idt_install(void)
{
ip.limit = sizeof(idt_entry_t) * 256 -1;
ip.base = (u32_t)&idt;
memset(&idt, 0, sizeof(idt_entry_t)*256);
idt_set_gate(0, (u32_t)isr0 , 0x08, 0x8E);
idt_set_gate(1, (u32_t)isr1 , 0x08, 0x8E);
idt_set_gate(2, (u32_t)isr2 , 0x08, 0x8E);
idt_set_gate(3, (u32_t)isr3 , 0x08, 0x8E);
idt_set_gate(4, (u32_t)isr4 , 0x08, 0x8E);
idt_set_gate(5, (u32_t)isr5 , 0x08, 0x8E);
idt_set_gate(6, (u32_t)isr6 , 0x08, 0x8E);
idt_set_gate(7, (u32_t)isr7 , 0x08, 0x8E);
idt_set_gate(8, (u32_t)isr8 , 0x08, 0x8E);
idt_set_gate(9, (u32_t)isr9 , 0x08, 0x8E);
idt_set_gate(10, (u32_t)isr10 , 0x08, 0x8E);
idt_set_gate(11, (u32_t)isr11 , 0x08, 0x8E);
idt_set_gate(12, (u32_t)isr12 , 0x08, 0x8E);
idt_set_gate(13, (u32_t)isr13 , 0x08, 0x8E);
idt_set_gate(14, (u32_t)isr14 , 0x08, 0x8E);
idt_set_gate(15, (u32_t)isr15 , 0x08, 0x8E);
idt_set_gate(16, (u32_t)isr16 , 0x08, 0x8E);
idt_set_gate(17, (u32_t)isr17 , 0x08, 0x8E);
idt_set_gate(18, (u32_t)isr18 , 0x08, 0x8E);
idt_set_gate(19, (u32_t)isr19 , 0x08, 0x8E);
idt_set_gate(20, (u32_t)isr20 , 0x08, 0x8E);
idt_set_gate(21, (u32_t)isr21 , 0x08, 0x8E);
idt_set_gate(22, (u32_t)isr22 , 0x08, 0x8E);
idt_set_gate(23, (u32_t)isr23 , 0x08, 0x8E);
idt_set_gate(24, (u32_t)isr24 , 0x08, 0x8E);
idt_set_gate(25, (u32_t)isr25 , 0x08, 0x8E);
idt_set_gate(26, (u32_t)isr26 , 0x08, 0x8E);
idt_set_gate(27, (u32_t)isr27 , 0x08, 0x8E);
idt_set_gate(28, (u32_t)isr28 , 0x08, 0x8E);
idt_set_gate(29, (u32_t)isr29 , 0x08, 0x8E);
idt_set_gate(30, (u32_t)isr30 , 0x08, 0x8E);
idt_set_gate(31, (u32_t)isr31 , 0x08, 0x8E);
idt_flush((u32_t)&ip);
}
void idtInit()
{
int i;
unsigned int temp;
// Get distance between isr stubs.
temp = (unsigned int)isr1 - (unsigned int)isr0;
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (unsigned int)&idt;
memset(&idt, 0, sizeof(idt_entry_t)*256);
// Initialize the Vector Table with the stubs.
for(i=0; i<128; i++) {
idtSetGate(i, (unsigned int)isr0 + (temp*i), 0x08, 0x8E);
}
// Initialize the Function calls to default state
for(i=0; i<256; i++) {
interruptHandlerRegister(i, unhandledInterrupt);
}
idt_flush((unsigned int)&idt_ptr);
}
void idt_init(void)
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 -1;
idt_ptr.base = (u32int)&idt_entries;
// Remap the irq table.
outb(0x20, 0x11);
outb(0xA0, 0x11);
outb(0x21, 0x20);
outb(0xA1, 0x28);
outb(0x21, 0x04);
outb(0xA1, 0x02);
outb(0x21, 0x01);
outb(0xA1, 0x01);
outb(0x21, 0x0);
outb(0xA1, 0x0);
memset((u8int*)&idt_entries, 0, sizeof(idt_entry_t)*256);
isr_init(); // Interruptions - entries 0-31
irq_init(); // IRQs - entries 32-47
idt_flush((u32int)&idt_ptr);
}
static void init_idt()
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (u32int)&idt_entries;
memset(&idt_entries, 0, sizeof(idt_entry_t) * 256);
// Remap the irq table
outb(0x20, 0x11);
outb(0xA0, 0x11);
outb(0x21, 0x20);
outb(0xA1, 0x28);
outb(0x21, 0x04);
outb(0xA1, 0x02);
outb(0x21, 0x01);
outb(0xA1, 0x01);
outb(0x21, 0x0);
outb(0xA1, 0x0);
idt_set_gate( 0, (u32int)isr0 , 0x08, 0x8E);
idt_set_gate( 1, (u32int)isr1 , 0x08, 0x8E);
idt_set_gate( 2, (u32int)isr2 , 0x08, 0x8E);
idt_set_gate( 3, (u32int)isr3 , 0x08, 0x8E);
idt_set_gate( 4, (u32int)isr4 , 0x08, 0x8E);
idt_set_gate( 5, (u32int)isr5 , 0x08, 0x8E);
idt_set_gate( 6, (u32int)isr6 , 0x08, 0x8E);
idt_set_gate( 7, (u32int)isr7 , 0x08, 0x8E);
idt_set_gate( 8, (u32int)isr8 , 0x08, 0x8E);
idt_set_gate( 9, (u32int)isr9 , 0x08, 0x8E);
idt_set_gate(10, (u32int)isr10, 0x08, 0x8E);
idt_set_gate(11, (u32int)isr11, 0x08, 0x8E);
idt_set_gate(12, (u32int)isr12, 0x08, 0x8E);
idt_set_gate(13, (u32int)isr13, 0x08, 0x8E);
idt_set_gate(14, (u32int)isr14, 0x08, 0x8E);
idt_set_gate(15, (u32int)isr15, 0x08, 0x8E);
idt_set_gate(16, (u32int)isr16, 0x08, 0x8E);
idt_set_gate(17, (u32int)isr17, 0x08, 0x8E);
idt_set_gate(18, (u32int)isr18, 0x08, 0x8E);
idt_set_gate(19, (u32int)isr19, 0x08, 0x8E);
idt_set_gate(20, (u32int)isr20, 0x08, 0x8E);
idt_set_gate(21, (u32int)isr21, 0x08, 0x8E);
idt_set_gate(22, (u32int)isr22, 0x08, 0x8E);
idt_set_gate(23, (u32int)isr23, 0x08, 0x8E);
idt_set_gate(24, (u32int)isr24, 0x08, 0x8E);
idt_set_gate(25, (u32int)isr25, 0x08, 0x8E);
idt_set_gate(26, (u32int)isr26, 0x08, 0x8E);
idt_set_gate(27, (u32int)isr27, 0x08, 0x8E);
idt_set_gate(28, (u32int)isr28, 0x08, 0x8E);
idt_set_gate(29, (u32int)isr29, 0x08, 0x8E);
idt_set_gate(30, (u32int)isr30, 0x08, 0x8E);
idt_set_gate(31, (u32int)isr31, 0x08, 0x8E);
idt_set_gate(32, (u32int)irq0, 0x08, 0x8E);
idt_set_gate(33, (u32int)irq1, 0x08, 0x8E);
idt_set_gate(34, (u32int)irq2, 0x08, 0x8E);
idt_set_gate(35, (u32int)irq3, 0x08, 0x8E);
idt_set_gate(36, (u32int)irq4, 0x08, 0x8E);
idt_set_gate(37, (u32int)irq5, 0x08, 0x8E);
idt_set_gate(38, (u32int)irq6, 0x08, 0x8E);
idt_set_gate(39, (u32int)irq7, 0x08, 0x8E);
idt_set_gate(40, (u32int)irq8, 0x08, 0x8E);
idt_set_gate(41, (u32int)irq9, 0x08, 0x8E);
idt_set_gate(42, (u32int)irq10, 0x08, 0x8E);
idt_set_gate(43, (u32int)irq11, 0x08, 0x8E);
idt_set_gate(44, (u32int)irq12, 0x08, 0x8E);
idt_set_gate(45, (u32int)irq13, 0x08, 0x8E);
idt_set_gate(46, (u32int)irq14, 0x08, 0x8E);
idt_set_gate(47, (u32int)irq15, 0x08, 0x8E);
idt_flush((u32int)&idt_ptr);
}
static void idt_init(){
i_ptr.limit = sizeof(struct w_idte) * 256 -1;
i_ptr.base = (w_uint32)&idt_entries;
zero_mem(&idt_entries, sizeof(struct w_idte) * 256);
/* Remap IRQ table */
out_byte(0x20, 0x11);
out_byte(0xA0, 0x11);
out_byte(0x21, 0x20);
out_byte(0xA1, 0x28);
out_byte(0x21, 0x04);
out_byte(0xA1, 0x02);
out_byte(0x21, 0x01);
out_byte(0xA1, 0x01);
out_byte(0x21, 0x0);
out_byte(0xA1, 0x0);
set_idt( 0, (w_uint32)isr0 , SEG_KERNEL_CODE, 0x8E);
set_idt( 1, (w_uint32)isr1 , SEG_KERNEL_CODE, 0x8E);
set_idt( 2, (w_uint32)isr2 , SEG_KERNEL_CODE, 0x8E);
set_idt( 3, (w_uint32)isr3 , SEG_KERNEL_CODE, 0x8E);
set_idt( 4, (w_uint32)isr4 , SEG_KERNEL_CODE, 0x8E);
set_idt( 5, (w_uint32)isr5 , SEG_KERNEL_CODE, 0x8E);
set_idt( 6, (w_uint32)isr6 , SEG_KERNEL_CODE, 0x8E);
set_idt( 7, (w_uint32)isr7 , SEG_KERNEL_CODE, 0x8E);
set_idt( 8, (w_uint32)isr8 , SEG_KERNEL_CODE, 0x8E);
set_idt( 9, (w_uint32)isr9 , SEG_KERNEL_CODE, 0x8E);
set_idt(10, (w_uint32)isr10, SEG_KERNEL_CODE, 0x8E);
set_idt(11, (w_uint32)isr11, SEG_KERNEL_CODE, 0x8E);
set_idt(12, (w_uint32)isr12, SEG_KERNEL_CODE, 0x8E);
set_idt(13, (w_uint32)isr13, SEG_KERNEL_CODE, 0x8E);
set_idt(14, (w_uint32)isr14, SEG_KERNEL_CODE, 0x8E);
set_idt(15, (w_uint32)isr15, SEG_KERNEL_CODE, 0x8E);
set_idt(16, (w_uint32)isr16, SEG_KERNEL_CODE, 0x8E);
set_idt(17, (w_uint32)isr17, SEG_KERNEL_CODE, 0x8E);
set_idt(18, (w_uint32)isr18, SEG_KERNEL_CODE, 0x8E);
set_idt(19, (w_uint32)isr19, SEG_KERNEL_CODE, 0x8E);
set_idt(20, (w_uint32)isr20, SEG_KERNEL_CODE, 0x8E);
set_idt(21, (w_uint32)isr21, SEG_KERNEL_CODE, 0x8E);
set_idt(22, (w_uint32)isr22, SEG_KERNEL_CODE, 0x8E);
set_idt(23, (w_uint32)isr23, SEG_KERNEL_CODE, 0x8E);
set_idt(24, (w_uint32)isr24, SEG_KERNEL_CODE, 0x8E);
set_idt(25, (w_uint32)isr25, SEG_KERNEL_CODE, 0x8E);
set_idt(26, (w_uint32)isr26, SEG_KERNEL_CODE, 0x8E);
set_idt(27, (w_uint32)isr27, SEG_KERNEL_CODE, 0x8E);
set_idt(28, (w_uint32)isr28, SEG_KERNEL_CODE, 0x8E);
set_idt(29, (w_uint32)isr29, SEG_KERNEL_CODE, 0x8E);
set_idt(30, (w_uint32)isr30, SEG_KERNEL_CODE, 0x8E);
set_idt(31, (w_uint32)isr31, SEG_KERNEL_CODE, 0x8E);
set_idt(32, (w_uint32)irq0, SEG_KERNEL_CODE, 0x8E);
set_idt(33, (w_uint32)irq1, SEG_KERNEL_CODE, 0x8E);
set_idt(34, (w_uint32)irq2, SEG_KERNEL_CODE, 0x8E);
set_idt(35, (w_uint32)irq3, SEG_KERNEL_CODE, 0x8E);
set_idt(36, (w_uint32)irq4, SEG_KERNEL_CODE, 0x8E);
set_idt(37, (w_uint32)irq5, SEG_KERNEL_CODE, 0x8E);
set_idt(38, (w_uint32)irq6, SEG_KERNEL_CODE, 0x8E);
set_idt(39, (w_uint32)irq7, SEG_KERNEL_CODE, 0x8E);
set_idt(40, (w_uint32)irq8, SEG_KERNEL_CODE, 0x8E);
set_idt(41, (w_uint32)irq9, SEG_KERNEL_CODE, 0x8E);
set_idt(42, (w_uint32)irq10, SEG_KERNEL_CODE, 0x8E);
set_idt(43, (w_uint32)irq11, SEG_KERNEL_CODE, 0x8E);
set_idt(44, (w_uint32)irq12, SEG_KERNEL_CODE, 0x8E);
set_idt(45, (w_uint32)irq13, SEG_KERNEL_CODE, 0x8E);
set_idt(46, (w_uint32)irq14, SEG_KERNEL_CODE, 0x8E);
set_idt(47, (w_uint32)irq15, SEG_KERNEL_CODE, 0x8E);
idt_flush(&i_ptr);
}
void init_idt(void)
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (unsigned int)&idt_entries;
/* Initialise the IDT and handlers to 0 */
memset(&idt_entries, 0, sizeof(idt_entry_t) * 256);
/* Remap the IRQ table since they share common interrupt numbers as
* CPU-generated interrupts.
*/
outb(0x20, 0x11);
outb(0xA0, 0x11);
outb(0x21, 0x20);
outb(0xA1, 0x28);
outb(0x21, 0x04);
outb(0xA1, 0x02);
outb(0x21, 0x01);
outb(0xA1, 0x01);
outb(0x21, 0x0);
outb(0xA1, 0x0);
/* Register an interrupt vector for each possible trap */
idt_set_gate(0, (unsigned int)isr0, 0x08, 0x8E);
idt_set_gate(1, (unsigned int)isr1, 0x08, 0x8E);
idt_set_gate(2, (unsigned int)isr2, 0x08, 0x8E);
idt_set_gate(3, (unsigned int)isr3, 0x08, 0x8E);
idt_set_gate(4, (unsigned int)isr4, 0x08, 0x8E);
idt_set_gate(5, (unsigned int)isr5, 0x08, 0x8E);
idt_set_gate(6, (unsigned int)isr6, 0x08, 0x8E);
idt_set_gate(7, (unsigned int)isr7, 0x08, 0x8E);
idt_set_gate(8, (unsigned int)isr8, 0x08, 0x8E);
idt_set_gate(9, (unsigned int)isr9, 0x08, 0x8E);
idt_set_gate(10, (unsigned int)isr10, 0x08, 0x8E);
idt_set_gate(11, (unsigned int)isr11, 0x08, 0x8E);
idt_set_gate(12, (unsigned int)isr12, 0x08, 0x8E);
idt_set_gate(13, (unsigned int)isr13, 0x08, 0x8E);
idt_set_gate(14, (unsigned int)isr14, 0x08, 0x8E);
idt_set_gate(15, (unsigned int)isr15, 0x08, 0x8E);
idt_set_gate(16, (unsigned int)isr16, 0x08, 0x8E);
idt_set_gate(17, (unsigned int)isr17, 0x08, 0x8E);
idt_set_gate(18, (unsigned int)isr18, 0x08, 0x8E);
idt_set_gate(19, (unsigned int)isr19, 0x08, 0x8E);
idt_set_gate(20, (unsigned int)isr20, 0x08, 0x8E);
idt_set_gate(21, (unsigned int)isr21, 0x08, 0x8E);
idt_set_gate(22, (unsigned int)isr22, 0x08, 0x8E);
idt_set_gate(23, (unsigned int)isr23, 0x08, 0x8E);
idt_set_gate(24, (unsigned int)isr24, 0x08, 0x8E);
idt_set_gate(25, (unsigned int)isr25, 0x08, 0x8E);
idt_set_gate(26, (unsigned int)isr26, 0x08, 0x8E);
idt_set_gate(27, (unsigned int)isr27, 0x08, 0x8E);
idt_set_gate(28, (unsigned int)isr28, 0x08, 0x8E);
idt_set_gate(29, (unsigned int)isr29, 0x08, 0x8E);
idt_set_gate(30, (unsigned int)isr30, 0x08, 0x8E);
idt_set_gate(31, (unsigned int)isr31, 0x08, 0x8E);
idt_set_gate(SYSCALL, (unsigned int)isr128, 0x08, 0x8E);
/* Register an interrupt vector for each IRQ */
idt_set_gate(32, (unsigned int)irq0, 0x08, 0x8E);
idt_set_gate(33, (unsigned int)irq1, 0x08, 0x8E);
idt_set_gate(34, (unsigned int)irq2, 0x08, 0x8E);
idt_set_gate(35, (unsigned int)irq3, 0x08, 0x8E);
idt_set_gate(36, (unsigned int)irq4, 0x08, 0x8E);
idt_set_gate(37, (unsigned int)irq5, 0x08, 0x8E);
idt_set_gate(38, (unsigned int)irq6, 0x08, 0x8E);
idt_set_gate(39, (unsigned int)irq7, 0x08, 0x8E);
idt_set_gate(40, (unsigned int)irq8, 0x08, 0x8E);
idt_set_gate(41, (unsigned int)irq9, 0x08, 0x8E);
idt_set_gate(42, (unsigned int)irq10, 0x08, 0x8E);
idt_set_gate(43, (unsigned int)irq11, 0x08, 0x8E);
idt_set_gate(44, (unsigned int)irq12, 0x08, 0x8E);
idt_set_gate(45, (unsigned int)irq13, 0x08, 0x8E);
idt_set_gate(46, (unsigned int)irq14, 0x08, 0x8E);
idt_set_gate(47, (unsigned int)irq15, 0x08, 0x8E);
idt_flush((unsigned int)&idt_ptr); /* declared in flush.s */
memset(&interrupt_handlers, 0, sizeof(isr_t) * 256);
}
void init_idt()
{
idt_ptr.size = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (u32int)&idt_entries;
// Master PIC
outb(0x20, 0x11);
outb(0x21, 0x20);
outb(0x21, 0x04);
outb(0x21, 0x01);
outb(0x21, 0x00);
// Slave PIC
outb(0xA0, 0x11);
outb(0xA1, 0x28);
outb(0xA1, 0x02);
outb(0xA1, 0x01);
outb(0xA1, 0x00);
idt_set(0, (u32int)isr0, 0x08, 0x8E);
idt_set(1, (u32int)isr1, 0x08, 0x8E);
idt_set(2, (u32int)isr2, 0x08, 0x8E);
idt_set(3, (u32int)isr3, 0x08, 0x8E);
idt_set(4, (u32int)isr4, 0x08, 0x8E);
idt_set(5, (u32int)isr5, 0x08, 0x8E);
idt_set(6, (u32int)isr6, 0x08, 0x8E);
idt_set(7, (u32int)isr7, 0x08, 0x8E);
idt_set(8, (u32int)isr8, 0x08, 0x8E);
idt_set(9, (u32int)isr9, 0x08, 0x8E);
idt_set(10, (u32int)isr10, 0x08, 0x8E);
idt_set(11, (u32int)isr11, 0x08, 0x8E);
idt_set(12, (u32int)isr12, 0x08, 0x8E);
idt_set(13, (u32int)isr13, 0x08, 0x8E);
idt_set(14, (u32int)isr14, 0x08, 0x8E);
idt_set(15, (u32int)isr15, 0x08, 0x8E);
idt_set(16, (u32int)isr16, 0x08, 0x8E);
idt_set(17, (u32int)isr17, 0x08, 0x8E);
idt_set(18, (u32int)isr18, 0x08, 0x8E);
idt_set(19, (u32int)isr19, 0x08, 0x8E);
idt_set(20, (u32int)isr20, 0x08, 0x8E);
idt_set(21, (u32int)isr21, 0x08, 0x8E);
idt_set(22, (u32int)isr22, 0x08, 0x8E);
idt_set(23, (u32int)isr23, 0x08, 0x8E);
idt_set(24, (u32int)isr24, 0x08, 0x8E);
idt_set(25, (u32int)isr25, 0x08, 0x8E);
idt_set(26, (u32int)isr26, 0x08, 0x8E);
idt_set(27, (u32int)isr27, 0x08, 0x8E);
idt_set(28, (u32int)isr28, 0x08, 0x8E);
idt_set(29, (u32int)isr29, 0x08, 0x8E);
idt_set(30, (u32int)isr30, 0x08, 0x8E);
idt_set(31, (u32int)isr31, 0x08, 0x8E);
idt_set(32, (u32int)irq0, 0x08, 0x8E);
idt_set(33, (u32int)irq1, 0x08, 0x8E);
idt_set(34, (u32int)irq2, 0x08, 0x8E);
idt_set(35, (u32int)irq3, 0x08, 0x8E);
idt_set(36, (u32int)irq4, 0x08, 0x8E);
idt_set(37, (u32int)irq5, 0x08, 0x8E);
idt_set(38, (u32int)irq6, 0x08, 0x8E);
idt_set(39, (u32int)irq7, 0x08, 0x8E);
idt_set(40, (u32int)irq8, 0x08, 0x8E);
idt_set(41, (u32int)irq9, 0x08, 0x8E);
idt_set(42, (u32int)irq10, 0x08, 0x8E);
idt_set(43, (u32int)irq11, 0x08, 0x8E);
idt_set(44, (u32int)irq12, 0x08, 0x8E);
idt_set(45, (u32int)irq13, 0x08, 0x8E);
idt_set(46, (u32int)irq14, 0x08, 0x8E);
idt_set(47, (u32int)irq15, 0x08, 0x8E);
idt_set(128, (u32int)isr128, 0x08, 0xEE);
idt_flush((u32int)&idt_ptr);
}
/* start up IDT */
static void init_idt( void )
{
idt_ptr.limit = sizeof(idt_entry_t)*256-1;
idt_ptr.base = (uint32_t)&idt_ents;
/* we have to zero everything out */
memset(&idt_ents[0],0,sizeof(idt_entry_t)*256);
irq_clearhandlers();
isr_clearhandlers();
/* remap PICs so IRQs use IDT gates 32-47 */
/* this code will look confusing, sorry for the inconvenience */
printk(" Remapping PIC (IRQs on IDT gates 32-47)\n");
outport_b(0x20,0x11);
outport_b(0xA0,0x11);
outport_b(0x21,0x20);
outport_b(0xA1,0x28);
outport_b(0x21,0x04);
outport_b(0xA1,0x02);
outport_b(0x21,0x01);
outport_b(0xA1,0x01);
outport_b(0x21,0x00);
outport_b(0xA1,0x00);
/* setting up gates */
/* ISRs */
printk(" Interrupt Service Routines\n");
idt_setgate(0,(uint32_t)isr0,0x08,0x8E);
idt_setgate(1,(uint32_t)isr1,0x08,0x8E);
idt_setgate(2,(uint32_t)isr2,0x08,0x8E);
idt_setgate(3,(uint32_t)isr3,0x08,0x8E);
idt_setgate(4,(uint32_t)isr4,0x08,0x8E);
idt_setgate(5,(uint32_t)isr5,0x08,0x8E);
idt_setgate(6,(uint32_t)isr6,0x08,0x8E);
idt_setgate(7,(uint32_t)isr7,0x08,0x8E);
idt_setgate(8,(uint32_t)isr8,0x08,0x8E);
idt_setgate(9,(uint32_t)isr9,0x08,0x8E);
idt_setgate(10,(uint32_t)isr10,0x08,0x8E);
idt_setgate(11,(uint32_t)isr11,0x08,0x8E);
idt_setgate(12,(uint32_t)isr12,0x08,0x8E);
idt_setgate(13,(uint32_t)isr13,0x08,0x8E);
idt_setgate(14,(uint32_t)isr14,0x08,0x8E);
idt_setgate(15,(uint32_t)isr15,0x08,0x8E);
idt_setgate(16,(uint32_t)isr16,0x08,0x8E);
idt_setgate(17,(uint32_t)isr17,0x08,0x8E);
idt_setgate(18,(uint32_t)isr18,0x08,0x8E);
idt_setgate(19,(uint32_t)isr19,0x08,0x8E);
idt_setgate(20,(uint32_t)isr20,0x08,0x8E);
idt_setgate(21,(uint32_t)isr21,0x08,0x8E);
idt_setgate(22,(uint32_t)isr22,0x08,0x8E);
idt_setgate(23,(uint32_t)isr23,0x08,0x8E);
idt_setgate(24,(uint32_t)isr24,0x08,0x8E);
idt_setgate(25,(uint32_t)isr25,0x08,0x8E);
idt_setgate(26,(uint32_t)isr26,0x08,0x8E);
idt_setgate(27,(uint32_t)isr27,0x08,0x8E);
idt_setgate(28,(uint32_t)isr28,0x08,0x8E);
idt_setgate(29,(uint32_t)isr29,0x08,0x8E);
idt_setgate(30,(uint32_t)isr30,0x08,0x8E);
idt_setgate(31,(uint32_t)isr31,0x08,0x8E);
/* IRQs */
printk(" Interrupt Requests\n");
idt_setgate(32,(uint32_t)irq0,0x08,0x8E);
idt_setgate(33,(uint32_t)irq1,0x08,0x8E);
idt_setgate(34,(uint32_t)irq2,0x08,0x8E);
idt_setgate(35,(uint32_t)irq3,0x08,0x8E);
idt_setgate(36,(uint32_t)irq4,0x08,0x8E);
idt_setgate(37,(uint32_t)irq5,0x08,0x8E);
idt_setgate(38,(uint32_t)irq6,0x08,0x8E);
idt_setgate(39,(uint32_t)irq7,0x08,0x8E);
idt_setgate(40,(uint32_t)irq8,0x08,0x8E);
idt_setgate(41,(uint32_t)irq9,0x08,0x8E);
idt_setgate(42,(uint32_t)irq10,0x08,0x8E);
idt_setgate(43,(uint32_t)irq11,0x08,0x8E);
idt_setgate(44,(uint32_t)irq12,0x08,0x8E);
idt_setgate(45,(uint32_t)irq13,0x08,0x8E);
idt_setgate(46,(uint32_t)irq14,0x08,0x8E);
idt_setgate(47,(uint32_t)irq15,0x08,0x8E);
/* Syscalls */
printk(" Syscalls\n");
idt_setgate(128,(uint32_t)isr128,0x08,0x8E);
/* flush~ */
printk(" Flushing IDT\n");
idt_flush((uint32_t)&idt_ptr);
}
void init_idt()
{
bzero((uint8_t *)&interrupt_handlers, sizeof(interrupt_handler_t) * 256);
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32_t)&idt_entries;
bzero((uint8_t *)&idt_entries, sizeof(idt_entry_t) * 256);
idt_set_gate( 0, (uint32_t)isr0, 0x08, 0x8E);
idt_set_gate( 1, (uint32_t)isr1, 0x08, 0x8E);
idt_set_gate( 2, (uint32_t)isr2, 0x08, 0x8E);
idt_set_gate( 3, (uint32_t)isr3, 0x08, 0x8E);
idt_set_gate( 4, (uint32_t)isr4, 0x08, 0x8E);
idt_set_gate( 5, (uint32_t)isr5, 0x08, 0x8E);
idt_set_gate( 6, (uint32_t)isr6, 0x08, 0x8E);
idt_set_gate( 7, (uint32_t)isr7, 0x08, 0x8E);
idt_set_gate( 8, (uint32_t)isr8, 0x08, 0x8E);
idt_set_gate( 9, (uint32_t)isr9, 0x08, 0x8E);
idt_set_gate(10, (uint32_t)isr10, 0x08, 0x8E);
idt_set_gate(11, (uint32_t)isr11, 0x08, 0x8E);
idt_set_gate(12, (uint32_t)isr12, 0x08, 0x8E);
idt_set_gate(13, (uint32_t)isr13, 0x08, 0x8E);
idt_set_gate(14, (uint32_t)isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32_t)isr15, 0x08, 0x8E);
idt_set_gate(16, (uint32_t)isr16, 0x08, 0x8E);
idt_set_gate(17, (uint32_t)isr17, 0x08, 0x8E);
idt_set_gate(18, (uint32_t)isr18, 0x08, 0x8E);
idt_set_gate(19, (uint32_t)isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32_t)isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32_t)isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32_t)isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32_t)isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32_t)isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32_t)isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32_t)isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32_t)isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32_t)isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32_t)isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32_t)isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32_t)isr31, 0x08, 0x8E);
idt_set_gate(32, (uint32_t)irq0, 0x08, 0x8E);
idt_set_gate(33, (uint32_t)irq1, 0x08, 0x8E);
idt_set_gate(34, (uint32_t)irq2, 0x08, 0x8E);
idt_set_gate(35, (uint32_t)irq3, 0x08, 0x8E);
idt_set_gate(36, (uint32_t)irq4, 0x08, 0x8E);
idt_set_gate(37, (uint32_t)irq5, 0x08, 0x8E);
idt_set_gate(38, (uint32_t)irq6, 0x08, 0x8E);
idt_set_gate(39, (uint32_t)irq7, 0x08, 0x8E);
idt_set_gate(40, (uint32_t)irq8, 0x08, 0x8E);
idt_set_gate(41, (uint32_t)irq9, 0x08, 0x8E);
idt_set_gate(42, (uint32_t)irq10, 0x08, 0x8E);
idt_set_gate(43, (uint32_t)irq11, 0x08, 0x8E);
idt_set_gate(44, (uint32_t)irq12, 0x08, 0x8E);
idt_set_gate(45, (uint32_t)irq13, 0x08, 0x8E);
idt_set_gate(46, (uint32_t)irq14, 0x08, 0x8E);
idt_set_gate(47, (uint32_t)irq15, 0x08, 0x8E);
idt_set_gate(255, (uint32_t)isr255, 0x08, 0x8E);
idt_flush((uint32_t)&idt_ptr);
outb(0x20, 0x11); //initialze master
outb(0xA0, 0x11); //initialze slave
outb(0x21, 0x20); //set master's IRQ starts from 32
outb(0xA1, 0x28); //set slave's IRQ starts from 40
outb(0x21, 0x04); //set master's IR2 line connects with slave
outb(0xA1, 0x02); //set slave's output line connects with master's IR2 line
outb(0x21, 0x01); //work as 8086
outb(0xA1, 0x01);
outb(0x21, 0x00); //enable interrupt
outb(0xA1, 0x00);
}
static void init_idt()
{
idt_ptr.limit = sizeof(idt_entry_t) * 256 -1;
idt_ptr.base = (uint32_t)&idt_entries;
memset(&idt_entries, 0, sizeof(idt_entry_t)*256);
idt_set_gate( 0, (uint32_t)isr0 , 0x08, 0x8E);
idt_set_gate( 1, (uint32_t)isr1 , 0x08, 0x8E);
idt_set_gate( 2, (uint32_t)isr2 , 0x08, 0x8E);
idt_set_gate( 3, (uint32_t)isr3 , 0x08, 0x8E);
idt_set_gate( 4, (uint32_t)isr4 , 0x08, 0x8E);
idt_set_gate( 5, (uint32_t)isr5 , 0x08, 0x8E);
idt_set_gate( 6, (uint32_t)isr6 , 0x08, 0x8E);
idt_set_gate( 7, (uint32_t)isr7 , 0x08, 0x8E);
idt_set_gate( 8, (uint32_t)isr8 , 0x08, 0x8E);
idt_set_gate( 9, (uint32_t)isr9 , 0x08, 0x8E);
idt_set_gate( 10, (uint32_t)isr10 , 0x08, 0x8E);
idt_set_gate( 11, (uint32_t)isr11 , 0x08, 0x8E);
idt_set_gate( 12, (uint32_t)isr12 , 0x08, 0x8E);
idt_set_gate( 13, (uint32_t)isr13 , 0x08, 0x8E);
idt_set_gate( 14, (uint32_t)isr14 , 0x08, 0x8E);
idt_set_gate( 15, (uint32_t)isr15 , 0x08, 0x8E);
idt_set_gate( 16, (uint32_t)isr16 , 0x08, 0x8E);
idt_set_gate( 17, (uint32_t)isr17 , 0x08, 0x8E);
idt_set_gate( 18, (uint32_t)isr18 , 0x08, 0x8E);
idt_set_gate( 19, (uint32_t)isr19 , 0x08, 0x8E);
idt_set_gate( 20, (uint32_t)isr20 , 0x08, 0x8E);
idt_set_gate( 21, (uint32_t)isr21 , 0x08, 0x8E);
idt_set_gate( 22, (uint32_t)isr22 , 0x08, 0x8E);
idt_set_gate( 23, (uint32_t)isr23 , 0x08, 0x8E);
idt_set_gate( 24, (uint32_t)isr24 , 0x08, 0x8E);
idt_set_gate( 25, (uint32_t)isr25 , 0x08, 0x8E);
idt_set_gate( 26, (uint32_t)isr26 , 0x08, 0x8E);
idt_set_gate( 27, (uint32_t)isr27 , 0x08, 0x8E);
idt_set_gate( 28, (uint32_t)isr28 , 0x08, 0x8E);
idt_set_gate( 29, (uint32_t)isr29 , 0x08, 0x8E);
idt_set_gate( 30, (uint32_t)isr30 , 0x08, 0x8E);
idt_set_gate( 31, (uint32_t)isr31 , 0x08, 0x8E);
outb(0x20, 0x11);
io_wait();
outb(0xA0, 0x11);
io_wait();
outb(0x21, 0x20);
io_wait();
outb(0xA1, 0x28);
io_wait();
outb(0x21, 0x04);
io_wait();
outb(0xA1, 0x02);
io_wait();
outb(0x21, 0x01);
io_wait();
outb(0xA1, 0x01);
io_wait();
outb(0x21, 0x0);
io_wait();
outb(0xA1, 0x0);
io_wait();
idt_set_gate( 32, (uint32_t)isr32 , 0x08, 0x8E);
idt_set_gate( 33, (uint32_t)isr33 , 0x08, 0x8E);
idt_set_gate( 34, (uint32_t)isr34 , 0x08, 0x8E);
idt_set_gate( 35, (uint32_t)isr35 , 0x08, 0x8E);
idt_set_gate( 36, (uint32_t)isr36 , 0x08, 0x8E);
idt_set_gate( 37, (uint32_t)isr37 , 0x08, 0x8E);
idt_set_gate( 38, (uint32_t)isr38 , 0x08, 0x8E);
idt_set_gate( 39, (uint32_t)isr39 , 0x08, 0x8E);
idt_set_gate( 40, (uint32_t)isr40 , 0x08, 0x8E);
idt_set_gate( 41, (uint32_t)isr41 , 0x08, 0x8E);
idt_set_gate( 42, (uint32_t)isr42 , 0x08, 0x8E);
idt_set_gate( 43, (uint32_t)isr43 , 0x08, 0x8E);
idt_set_gate( 44, (uint32_t)isr44 , 0x08, 0x8E);
idt_set_gate( 45, (uint32_t)isr45 , 0x08, 0x8E);
idt_set_gate( 46, (uint32_t)isr46 , 0x08, 0x8E);
idt_set_gate( 47, (uint32_t)isr47 , 0x08, 0x8E);
idt_flush((uint32_t)&idt_ptr);
kprintf("IDT:: Finished init of IDT AND it's in memory! :D\n");
}
// 初始化中断描述符表
void init_idt()
{
// 重新映射 IRQ 表
// 两片级联的 Intel 8259A 芯片
// 主片端口 0x20 0x21
// 从片端口 0xA0 0xA1
// 初始化主片、从片
// 0001 0001
outb(0x20, 0x11);
outb(0xA0, 0x11);
// 设置主片 IRQ 从 0x20(32) 号中断开始
outb(0x21, 0x20);
// 设置从片 IRQ 从 0x28(40) 号中断开始
outb(0xA1, 0x28);
// 设置主片 IR2 引脚连接从片
outb(0x21, 0x04);
// 告诉从片输出引脚和主片 IR2 号相连
outb(0xA1, 0x02);
// 设置主片和从片按照 8086 的方式工作
outb(0x21, 0x01);
outb(0xA1, 0x01);
// 设置主从片允许中断
outb(0x21, 0x0);
outb(0xA1, 0x0);
bzero((uint8_t *)&interrupt_handlers, sizeof(interrupt_handler_t) * 256);
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32_t)&idt_entries;
bzero((uint8_t *)&idt_entries, sizeof(idt_entry_t) * 256);
// 0-32: 用于 CPU 的中断处理
idt_set_gate( 0, (uint32_t)isr0, 0x08, 0x8E);
idt_set_gate( 1, (uint32_t)isr1, 0x08, 0x8E);
idt_set_gate( 2, (uint32_t)isr2, 0x08, 0x8E);
idt_set_gate( 3, (uint32_t)isr3, 0x08, 0x8E);
idt_set_gate( 4, (uint32_t)isr4, 0x08, 0x8E);
idt_set_gate( 5, (uint32_t)isr5, 0x08, 0x8E);
idt_set_gate( 6, (uint32_t)isr6, 0x08, 0x8E);
idt_set_gate( 7, (uint32_t)isr7, 0x08, 0x8E);
idt_set_gate( 8, (uint32_t)isr8, 0x08, 0x8E);
idt_set_gate( 9, (uint32_t)isr9, 0x08, 0x8E);
idt_set_gate(10, (uint32_t)isr10, 0x08, 0x8E);
idt_set_gate(11, (uint32_t)isr11, 0x08, 0x8E);
idt_set_gate(12, (uint32_t)isr12, 0x08, 0x8E);
idt_set_gate(13, (uint32_t)isr13, 0x08, 0x8E);
idt_set_gate(14, (uint32_t)isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32_t)isr15, 0x08, 0x8E);
idt_set_gate(16, (uint32_t)isr16, 0x08, 0x8E);
idt_set_gate(17, (uint32_t)isr17, 0x08, 0x8E);
idt_set_gate(18, (uint32_t)isr18, 0x08, 0x8E);
idt_set_gate(19, (uint32_t)isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32_t)isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32_t)isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32_t)isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32_t)isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32_t)isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32_t)isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32_t)isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32_t)isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32_t)isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32_t)isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32_t)isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32_t)isr31, 0x08, 0x8E);
idt_set_gate(32, (uint32_t)irq0, 0x08, 0x8E);
idt_set_gate(33, (uint32_t)irq1, 0x08, 0x8E);
idt_set_gate(34, (uint32_t)irq2, 0x08, 0x8E);
idt_set_gate(35, (uint32_t)irq3, 0x08, 0x8E);
idt_set_gate(36, (uint32_t)irq4, 0x08, 0x8E);
idt_set_gate(37, (uint32_t)irq5, 0x08, 0x8E);
idt_set_gate(38, (uint32_t)irq6, 0x08, 0x8E);
idt_set_gate(39, (uint32_t)irq7, 0x08, 0x8E);
idt_set_gate(40, (uint32_t)irq8, 0x08, 0x8E);
idt_set_gate(41, (uint32_t)irq9, 0x08, 0x8E);
idt_set_gate(42, (uint32_t)irq10, 0x08, 0x8E);
idt_set_gate(43, (uint32_t)irq11, 0x08, 0x8E);
idt_set_gate(44, (uint32_t)irq12, 0x08, 0x8E);
idt_set_gate(45, (uint32_t)irq13, 0x08, 0x8E);
idt_set_gate(46, (uint32_t)irq14, 0x08, 0x8E);
idt_set_gate(47, (uint32_t)irq15, 0x08, 0x8E);
// 255 将来用于实现系统调用
idt_set_gate(255, (uint32_t)isr255, 0x08, 0x8E);
// 更新设置中断描述符表
idt_flush((uint32_t)&idt_ptr);
}
//初始化中断描述符表
void init_idt()
{
//初始化主片，从片
outb(0x20, 0x11);
outb(0xA0, 0x11);
outb(0x21, 0x20);
outb(0xA1, 0x28);
outb(0x21, 0x04);
outb(0xA1, 0x02);
outb(0x21, 0x01);
outb(0xA1, 0x01);
outb(0x21, 0x0);
outb(0xA1, 0x0);
idt_set_gate(32, (uint32)irq0, 0x08, 0x8E);
idt_set_gate(33, (uint32)irq1, 0x08, 0x8E);
idt_set_gate(34, (uint32)irq2, 0x08, 0x8E);
idt_set_gate(35, (uint32)irq3, 0x08, 0x8E);
idt_set_gate(36, (uint32)irq4, 0x08, 0x8E);
idt_set_gate(37, (uint32)irq5, 0x08, 0x8E);
idt_set_gate(38, (uint32)irq6, 0x08, 0x8E);
idt_set_gate(39, (uint32)irq7, 0x08, 0x8E);
idt_set_gate(40, (uint32)irq8, 0x08, 0x8E);
idt_set_gate(41, (uint32)irq9, 0x08, 0x8E);
idt_set_gate(42, (uint32)irq10, 0x08, 0x8E);
idt_set_gate(43, (uint32)irq11, 0x08, 0x8E);
idt_set_gate(44, (uint32)irq12, 0x08, 0x8E);
idt_set_gate(45, (uint32)irq13, 0x08, 0x8E);
idt_set_gate(46, (uint32)irq14, 0x08, 0x8E);
idt_set_gate(47, (uint32)irq15, 0x08, 0x8E);
bzer((uint8*)&interrupt_handlers, sizeof(interrupt_handler_t) * 256);
idt_ptr.limit = sizeof(idt_entry_t) * 256 - 1;
idt_ptr.base = (uint32)&idt_entries;
bzer((uint8 *)&idt_entries, sizeof(idt_entry_t) * 256);
idt_set_gate( 0, (uint32)isr0, 0x08, 0x8E);
idt_set_gate( 1, (uint32)isr1, 0x08, 0x8E);
idt_set_gate( 2, (uint32)isr2, 0x08, 0x8E);
idt_set_gate( 3, (uint32)isr3, 0x08, 0x8E);
idt_set_gate( 4, (uint32)isr4, 0x08, 0x8E);
idt_set_gate( 5, (uint32)isr5, 0x08, 0x8E);
idt_set_gate( 6, (uint32)isr6, 0x08, 0x8E);
idt_set_gate( 7, (uint32)isr7, 0x08, 0x8E);
idt_set_gate( 8, (uint32)isr8, 0x08, 0x8E);
idt_set_gate( 9, (uint32)isr9, 0x08, 0x8E);
idt_set_gate(10, (uint32)isr10, 0x08, 0x8E);
idt_set_gate(11, (uint32)isr11, 0x08, 0x8E);
idt_set_gate(12, (uint32)isr12, 0x08, 0x8E);
idt_set_gate(13, (uint32)isr13, 0x08, 0x8E);
idt_set_gate(14, (uint32)isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32)isr15, 0x08, 0x8E);
idt_set_gate(16, (uint32)isr16, 0x08, 0x8E);
idt_set_gate(17, (uint32)isr17, 0x08, 0x8E);
idt_set_gate(18, (uint32)isr18, 0x08, 0x8E);
idt_set_gate(19, (uint32)isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32)isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32)isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32)isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32)isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32)isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32)isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32)isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32)isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32)isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32)isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32)isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32)isr31, 0x08, 0x8E);
//实现系统调用的
idt_set_gate(255, (uint32)isr255, 0x08, 0x8E);
//更新设置中断描述符表
idt_flush((uint32)&idt_ptr);
}
/* Installs the IDT */
static void idt_init() {
/* Sets the special IDT pointer up */
idt_ptr.limit = sizeof(idt_entry_t) * 256 -1;
idt_ptr.base = (uint32_t)&idt_entries;
/* Clear out the entire IDT, initializing it to zeros */
memset(&idt_entries, 0, sizeof(idt_entry_t)*256);
/* Normally, IRQs 0 to 7 are mapped to entries 8 to 15. This
* is a problem in protected mode, because IDT entry 8 is a
* Double Fault! Without remapping, every time IRQ0 fires,
* you get a Double Fault Exception, which is NOT actually
* what's happening. We send commands to the Programmable
* Interrupt Controller (PICs - also called the 8259's) in
* order to make IRQ0 to 15 be remapped to IDT entries 32 to
* 47 */
io_outb(0x20, 0x11);
io_outb(0xA0, 0x11);
io_outb(0x21, 0x20);
io_outb(0xA1, 0x28);
io_outb(0x21, 0x04);
io_outb(0xA1, 0x02);
io_outb(0x21, 0x01);
io_outb(0xA1, 0x01);
io_outb(0x21, 0x0);
io_outb(0xA1, 0x0);
/* Add any new ISRs to the IDT here using idt_set_gate */
idt_set_gate(IRQ_DE, (uint32_t)isr0 , 0x08, 0x8E);
idt_set_gate(IRQ_DB, (uint32_t)isr1 , 0x08, 0x8E);
idt_set_gate(IRQ_NI, (uint32_t)isr2 , 0x08, 0x8E);
idt_set_gate(IRQ_BP, (uint32_t)isr3 , 0x08, 0x8E);
idt_set_gate(IRQ_OF, (uint32_t)isr4 , 0x08, 0x8E);
idt_set_gate(IRQ_BR, (uint32_t)isr5 , 0x08, 0x8E);
idt_set_gate(IRQ_UD, (uint32_t)isr6 , 0x08, 0x8E);
idt_set_gate(IRQ_NM, (uint32_t)isr7 , 0x08, 0x8E);
idt_set_gate(IRQ_DF, (uint32_t)isr8 , 0x08, 0x8E);
idt_set_gate(IRQ_CO, (uint32_t)isr9 , 0x08, 0x8E);
idt_set_gate(IRQ_TS, (uint32_t)isr10, 0x08, 0x8E);
idt_set_gate(IRQ_NP, (uint32_t)isr11, 0x08, 0x8E);
idt_set_gate(IRQ_SS, (uint32_t)isr12, 0x08, 0x8E);
idt_set_gate(IRQ_GP, (uint32_t)isr13, 0x08, 0x8E);
idt_set_gate(IRQ_PF, (uint32_t)isr14, 0x08, 0x8E);
idt_set_gate(15, (uint32_t)isr15, 0x08, 0x8E);
idt_set_gate(IRQ_MF, (uint32_t)isr16, 0x08, 0x8E);
idt_set_gate(IRQ_AC, (uint32_t)isr17, 0x08, 0x8E);
idt_set_gate(IRQ_MC, (uint32_t)isr18, 0x08, 0x8E);
idt_set_gate(IRQ_XM, (uint32_t)isr19, 0x08, 0x8E);
idt_set_gate(20, (uint32_t)isr20, 0x08, 0x8E);
idt_set_gate(21, (uint32_t)isr21, 0x08, 0x8E);
idt_set_gate(22, (uint32_t)isr22, 0x08, 0x8E);
idt_set_gate(23, (uint32_t)isr23, 0x08, 0x8E);
idt_set_gate(24, (uint32_t)isr24, 0x08, 0x8E);
idt_set_gate(25, (uint32_t)isr25, 0x08, 0x8E);
idt_set_gate(26, (uint32_t)isr26, 0x08, 0x8E);
idt_set_gate(27, (uint32_t)isr27, 0x08, 0x8E);
idt_set_gate(28, (uint32_t)isr28, 0x08, 0x8E);
idt_set_gate(29, (uint32_t)isr29, 0x08, 0x8E);
idt_set_gate(30, (uint32_t)isr30, 0x08, 0x8E);
idt_set_gate(31, (uint32_t)isr31, 0x08, 0x8E);
idt_set_gate(IRQ_PIT, (uint32_t)isr32, 0x08, 0x8E);
idt_set_gate(IRQ_KBD, (uint32_t)isr33, 0x08, 0x8E);
idt_set_gate(IRQ_CASCADE, (uint32_t)isr34, 0x08, 0x8E);
idt_set_gate(IRQ_COM2, (uint32_t)isr35, 0x08, 0x8E);
idt_set_gate(IRQ_COM1, (uint32_t)isr36, 0x08, 0x8E);
idt_set_gate(IRQ_SOUND, (uint32_t)isr37, 0x08, 0x8E);
idt_set_gate(IRQ_SDA, (uint32_t)isr38, 0x08, 0x8E);
idt_set_gate(IRQ_PP, (uint32_t)isr39, 0x08, 0x8E);
idt_set_gate(IRQ_RTC, (uint32_t)isr40, 0x08, 0x8E);
idt_set_gate(41, (uint32_t)isr41, 0x08, 0x8E);
idt_set_gate(42, (uint32_t)isr42, 0x08, 0x8E);
idt_set_gate(43, (uint32_t)isr43, 0x08, 0x8E);
idt_set_gate(IRQ_MOUSE, (uint32_t)isr44, 0x08, 0x8E);
idt_set_gate(IRQ_FPU, (uint32_t)isr45, 0x08, 0x8E);
idt_set_gate(IRQ_ATAP, (uint32_t)isr46, 0x08, 0x8E);
idt_set_gate(IRQ_ATAS, (uint32_t)isr47, 0x08, 0x8E);
idt_set_gate(IRQ_SYSCALL, (uint32_t)isr128, 0x08, 0x8E);
/* Points the processor's internal register to the new IDT */
idt_flush((uint32_t)&idt_ptr);
}
