static int sis_read_2(int custom, int idx)
{
uint8_t val1;
uint8_t val2;
if (custom >= 0) {
if (idx+1 > sisregs[custom].length) {
return 0;
} else {
inSISIDXREG(sisregs[custom].idx_base, idx++, val1);
inSISIDXREG(sisregs[custom].idx_base, idx, val2);
}
} else {
val1 = inSISREG(idx++);
val2 = inSISREG(idx);
}
return (val2<<8) | val1;
}
static void sis_ddc2_delay(unsigned short delaytime)
{
unsigned short i;
int temp;
for (i = 0; i < delaytime; i++) {
inSISIDXREG(SISSR, 0x05, temp);
}
}
/* read function */
static int sis_read_1(int custom, int idx)
{
uint8_t val;
if (custom >= 0) {
if (idx > sisregs[custom].length)
return 0;
else
inSISIDXREG(sisregs[custom].idx_base, idx, val);
} else {
val = inSISREG(idx);
}
return val;
}
static int sis_read_4(int custom, int idx)
{
uint8_t val1;
uint8_t val2;
uint8_t val3;
uint8_t val4;
if (custom >= 0) {
if (idx+3 > sisregs[custom].length) {
return 0;
} else {
inSISIDXREG(sisregs[custom].idx_base, idx++, val1);
inSISIDXREG(sisregs[custom].idx_base, idx++, val2);
inSISIDXREG(sisregs[custom].idx_base, idx++, val3);
inSISIDXREG(sisregs[custom].idx_base, idx, val4);
}
} else {
val1 = inSISREG(idx++);
val2 = inSISREG(idx++);
val3 = inSISREG(idx++);
val4 = inSISREG(idx);
}
return (val4<<24) | (val3<<16) | (val2<<8) | val1;
}
static int sis_do_sense(int tempbl, int tempbh, int tempcl, int tempch)
{
int temp;
outSISIDXREG(SISPART4, 0x11, tempbl);
temp = tempbh | tempcl;
setSISIDXREG(SISPART4, 0x10, 0xe0, temp);
//usleep(200000);
sis_ddc2_delay(0x1000);
tempch &= 0x7f;
inSISIDXREG(SISPART4, 0x03, temp);
temp ^= 0x0e;
temp &= tempch;
return temp == tempch;
}
static void sis_detect_crt1(void)
{
unsigned char CR32;
unsigned char CRT1Detected = 0;
unsigned char OtherDevices = 0;
if (!(sis_vbflags & VB_VIDEOBRIDGE)) {
sis_crt1_off = 0;
return;
}
inSISIDXREG(SISCR, 0x32, CR32);
if (CR32 & 0x20)
CRT1Detected = 1;
if (CR32 & 0x5F)
OtherDevices = 1;
if (sis_crt1_off == -1) {
if (!CRT1Detected) {
/* BIOS detected no CRT1. */
/* If other devices exist, switch it off */
if (OtherDevices)
sis_crt1_off = 1;
else
sis_crt1_off = 0;
} else {
/* BIOS detected CRT1, leave/switch it on */
sis_crt1_off = 0;
}
}
if (sis_verbose > 0) {
mp_msg(MSGT_VO, MSGL_STATUS, "[SiS] %sCRT1 connection detected\n",
sis_crt1_off ? "No " : "");
}
}
/* sense connected devices on 30x bridge */
static void sis_sense_30x(void)
{
unsigned char backupP4_0d, backupP2_00, biosflag;
unsigned char testsvhs_tempbl, testsvhs_tempbh;
unsigned char testsvhs_tempcl, testsvhs_tempch;
unsigned char testcvbs_tempbl, testcvbs_tempbh;
unsigned char testcvbs_tempcl, testcvbs_tempch;
unsigned char testvga2_tempbl, testvga2_tempbh;
unsigned char testvga2_tempcl, testvga2_tempch;
int myflag, result = 0, i, j, haveresult;
inSISIDXREG(SISPART4, 0x0d, backupP4_0d);
outSISIDXREG(SISPART4, 0x0d, (backupP4_0d | 0x04));
inSISIDXREG(SISPART2, 0x00, backupP2_00);
outSISIDXREG(SISPART2, 0x00, (backupP2_00 | 0x1c));
sis_do_sense(0, 0, 0, 0);
if (sis_vga_engine == SIS_300_VGA) {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0xd1;
testsvhs_tempbh = 0x00;
testsvhs_tempbl = 0xb9;
testcvbs_tempbh = 0x00;
testcvbs_tempbl = 0xb3;
biosflag = 0;
if (sis_vbflags & (VB_301B | VB_302B | VB_301LV | VB_302LV)) {
testvga2_tempbh = 0x01;
testvga2_tempbl = 0x90;
testsvhs_tempbh = 0x01;
testsvhs_tempbl = 0x6b;
testcvbs_tempbh = 0x01;
testcvbs_tempbl = 0x74;
}
inSISIDXREG(SISPART4, 0x01, myflag);
if (myflag & 0x04) {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0xfd;
testsvhs_tempbh = 0x00;
testsvhs_tempbl = 0xdd;
testcvbs_tempbh = 0x00;
testcvbs_tempbl = 0xee;
}
testvga2_tempch = 0x0e;
testvga2_tempcl = 0x08;
testsvhs_tempch = 0x06;
testsvhs_tempcl = 0x04;
testcvbs_tempch = 0x08;
testcvbs_tempcl = 0x04;
if (sis_device_id == DEVICE_SIS_300) {
inSISIDXREG(SISSR, 0x3b, myflag);
if (!(myflag & 0x01)) {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0x00;
testvga2_tempch = 0x00;
testvga2_tempcl = 0x00;
}
}
} else {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0xd1;
testsvhs_tempbh = 0x00;
testsvhs_tempbl = 0xb9;
testcvbs_tempbh = 0x00;
testcvbs_tempbl = 0xb3;
biosflag = 0;
if (sis_vbflags & (VB_301B | VB_302B | VB_301LV | VB_302LV)) {
if (sis_vbflags & (VB_301B | VB_302B)) {
testvga2_tempbh = 0x01;
testvga2_tempbl = 0x90;
testsvhs_tempbh = 0x01;
testsvhs_tempbl = 0x6b;
testcvbs_tempbh = 0x01;
testcvbs_tempbl = 0x74;
} else {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0x00;
testsvhs_tempbh = 0x02;
testsvhs_tempbl = 0x00;
testcvbs_tempbh = 0x01;
testcvbs_tempbl = 0x00;
}
}
if (sis_vbflags & (VB_301 | VB_301B | VB_302B)) {
inSISIDXREG(SISPART4, 0x01, myflag);
if (myflag & 0x04) {
testvga2_tempbh = 0x00;
testvga2_tempbl = 0xfd;
testsvhs_tempbh = 0x00;
testsvhs_tempbl = 0xdd;
testcvbs_tempbh = 0x00;
testcvbs_tempbl = 0xee;
}
}
if (sis_vbflags & (VB_301LV | VB_302LV)) {
/* TW: No VGA2 or SCART on LV bridges */
testvga2_tempbh = 0x00;
testvga2_tempbl = 0x00;
testvga2_tempch = 0x00;
testvga2_tempcl = 0x00;
testsvhs_tempch = 0x04;
testsvhs_tempcl = 0x08;
testcvbs_tempch = 0x08;
testcvbs_tempcl = 0x08;
} else {
testvga2_tempch = 0x0e;
testvga2_tempcl = 0x08;
testsvhs_tempch = 0x06;
testsvhs_tempcl = 0x04;
testcvbs_tempch = 0x08;
testcvbs_tempcl = 0x04;
}
}
/* XXX: ?? andSISIDXREG(SISCR, 0x32, ~0x14); */
/* pSiS->postVBCR32 &= ~0x14; */
/* scan for VGA2/SCART */
if (testvga2_tempch || testvga2_tempcl ||
testvga2_tempbh || testvga2_tempbl) {
haveresult = 0;
for (j = 0; j < 10; j++) {
result = 0;
for (i = 0; i < 3; i++) {
if (sis_do_sense(testvga2_tempbl, testvga2_tempbh,
testvga2_tempcl, testvga2_tempch))
result++;
}
if ((result == 0) || (result >= 2))
break;
}
if (result) {
if (biosflag & 0x01) {
if (sis_verbose > 1) {
mp_msg(MSGT_VO, MSGL_STATUS,
"[SiS] SiS30x: Detected TV connected to SCART output\n");
}
sis_vbflags |= TV_SCART;
orSISIDXREG(SISCR, 0x32, 0x04);
/*pSiS->postVBCR32 |= 0x04; */
} else {
if (sis_verbose > 1) {
mp_msg(MSGT_VO, MSGL_STATUS,
"[SiS] SiS30x: Detected secondary VGA connection\n");
}
sis_vbflags |= VGA2_CONNECTED;
orSISIDXREG(SISCR, 0x32, 0x10);
/*pSiS->postVBCR32 |= 0x10; */
}
}
}
/* scanning for TV */
/* XXX: ?? andSISIDXREG(SISCR, 0x32, ~0x03); */
/* pSiS->postVBCR32 &= ~0x03; */
result = sis_do_sense(testsvhs_tempbl, testsvhs_tempbh,
testsvhs_tempcl, testsvhs_tempch);
haveresult = 0;
for (j = 0; j < 10; j++) {
result = 0;
for (i = 0; i < 3; i++) {
if (sis_do_sense(testsvhs_tempbl, testsvhs_tempbh,
testsvhs_tempcl, testsvhs_tempch))
result++;
}
if ((result == 0) || (result >= 2))
break;
}
if (result) {
if (sis_verbose > 1) {
mp_msg(MSGT_VO, MSGL_STATUS,
"[SiS] SiS30x: Detected TV connected to SVIDEO output\n");
}
/* TW: So we can be sure that there IS a SVIDEO output */
sis_vbflags |= TV_SVIDEO;
orSISIDXREG(SISCR, 0x32, 0x02);
//pSiS->postVBCR32 |= 0x02;
}
if ((biosflag & 0x02) || (!(result))) {
haveresult = 0;
for (j = 0; j < 10; j++) {
result = 0;
for (i = 0; i < 3; i++) {
if (sis_do_sense(testcvbs_tempbl, testcvbs_tempbh,
testcvbs_tempcl, testcvbs_tempch))
result++;
}
if ((result == 0) || (result >= 2))
break;
}
if (result) {
if (sis_verbose > 1) {
mp_msg(MSGT_VO, MSGL_STATUS,
"[SiS] SiS30x: Detected TV connected to COMPOSITE output\n");
}
sis_vbflags |= TV_AVIDEO;
orSISIDXREG(SISCR, 0x32, 0x01);
//pSiS->postVBCR32 |= 0x01;
}
}
sis_do_sense(0, 0, 0, 0);
outSISIDXREG(SISPART2, 0x00, backupP2_00);
outSISIDXREG(SISPART4, 0x0d, backupP4_0d);
}
static void sis_detect_tv(void)
{
unsigned char SR16, SR38, CR32, CR38 = 0, CR79;
int temp = 0;
if (!(sis_vbflags & VB_VIDEOBRIDGE))
return;
inSISIDXREG(SISCR, 0x32, CR32);
inSISIDXREG(SISSR, 0x16, SR16);
inSISIDXREG(SISSR, 0x38, SR38);
switch (sis_vga_engine) {
case SIS_300_VGA:
if (sis_device_id == DEVICE_SIS_630_VGA)
temp = 0x35;
break;
case SIS_315_VGA:
temp = 0x38;
break;
}
if (temp) {
inSISIDXREG(SISCR, temp, CR38);
}
if (CR32 & 0x47)
sis_vbflags |= CRT2_TV;
if (CR32 & 0x04)
sis_vbflags |= TV_SCART;
else if (CR32 & 0x02)
sis_vbflags |= TV_SVIDEO;
else if (CR32 & 0x01)
sis_vbflags |= TV_AVIDEO;
else if (CR32 & 0x40)
sis_vbflags |= (TV_SVIDEO | TV_HIVISION);
else if ((CR38 & 0x04) && (sis_vbflags & (VB_301LV | VB_302LV)))
sis_vbflags |= TV_HIVISION_LV;
else if ((CR38 & 0x04) && (sis_vbflags & VB_CHRONTEL))
sis_vbflags |= (TV_CHSCART | TV_PAL);
else if ((CR38 & 0x08) && (sis_vbflags & VB_CHRONTEL))
sis_vbflags |= (TV_CHHDTV | TV_NTSC);
if (sis_vbflags & (TV_SCART | TV_SVIDEO | TV_AVIDEO | TV_HIVISION)) {
if (sis_vga_engine == SIS_300_VGA) {
/* TW: Should be SR38 here as well, but this
* does not work. Looks like a BIOS bug (2.04.5c).
*/
if (SR16 & 0x20)
sis_vbflags |= TV_PAL;
else
sis_vbflags |= TV_NTSC;
} else if ((sis_device_id == DEVICE_SIS_550_VGA)) {
inSISIDXREG(SISCR, 0x79, CR79);
if (CR79 & 0x08) {
inSISIDXREG(SISCR, 0x79, CR79);
CR79 >>= 5;
}
if (CR79 & 0x01) {
sis_vbflags |= TV_PAL;
if (CR38 & 0x40)
sis_vbflags |= TV_PALM;
else if (CR38 & 0x80)
sis_vbflags |= TV_PALN;
} else
sis_vbflags |= TV_NTSC;
} else if ((sis_device_id == DEVICE_SIS_650_VGA)) {
static void
SIS6326ResetVideo(ScrnInfoPtr pScrn)
{
SISPtr pSiS = SISPTR(pScrn);
/* Unlock registers */
#ifdef UNLOCK_ALWAYS
sisSaveUnlockExtRegisterLock(pSiS, NULL, NULL);
#endif
if(getvideoreg(pSiS, Index_VI6326_Passwd) != 0xa1) {
setvideoreg(pSiS, Index_VI6326_Passwd, 0x86);
if(getvideoreg(pSiS, Index_VI6326_Passwd) != 0xa1)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Xv: Video password could not unlock video registers\n");
}
/* Initialize the overlay ----------------------------------- */
switch(pSiS->Chipset) {
case PCI_CHIP_SIS5597:
/* Disable overlay (D[1]) & capture (D[0]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x03);
/* What do these do? (Datasheet names these bits "reserved") */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x18);
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x0c);
/* Select YUV format (D[6]) and "gfx + video" mode (D[4]), odd polarity? (D[7]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x40, 0xD0);
/* No interrupt, no filter, disable dithering */
setvideoregmask(pSiS, Index_VI6326_Control_Misc1, 0x00, 0x7A);
/* Disable Brooktree support (D[6]) and system memory framebuffer (D[7]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc3, 0x00, 0xC0);
/* Disable video decimation (has a really strange effect if enabled) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc6, 0x00, 0x80);
break;
case PCI_CHIP_SIS6326:
/* Disable overlay (D[1]) & capture (D[0]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x03);
/* What do these do? (Datasheet names these bits "reserved") */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x18);
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x0c);
/* Select YUV format (D[6]) and "gfx + video" mode (D[4]), odd polarity? (D[7]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x40, 0xD0);
/* No interrupt, no filter, disable dithering */
setvideoregmask(pSiS, Index_VI6326_Control_Misc1, 0x00, 0x7A);
/* Disable VMI (D[4:3]), Brooktree support (D[6]) and system memory framebuffer (D[7]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc3, 0x00, 0xF8);
/* Disable video decimation */
setvideoregmask(pSiS, Index_VI6326_Control_Misc6, 0x00, 0x80);
break;
case PCI_CHIP_SIS530:
setvideoregmask(pSiS, Index_VI6326_Control_Misc4, 0x40, 0x40);
/* Disable overlay (D[1]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x02);
/* What do D[3:2] do? (Datasheet names these bits "reserved") */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x18);
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x00, 0x0c);
/* Select YUV format (D[6]) and "gfx + video" mode (D[4]) */
setvideoregmask(pSiS, Index_VI6326_Control_Misc0, 0x40, 0x50);
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Internal error: SiS6326ResetVideo() called with invalid chipset (%x)\n",
pSiS->Chipset);
return;
}
/* Clear format selection */
setvideoregmask(pSiS, Index_VI6326_Control_Misc1, 0x00, 0x04);
if(pSiS->oldChipset >= OC_SIS5597) {
setvideoregmask(pSiS, Index_VI6326_Control_Misc4, 0x00, 0x05);
}
/* Select RGB Chromakey format (D[2]=0), CCIR 601 UV data format (D[1]=0) */
/* D[1]: 1 = 2's complement, 0 = CCIR 601 format */
setvideoregmask(pSiS, Index_VI6326_Control_Misc3, 0x00, 0x06);
/* Reset contrast control */
setvideoregmask(pSiS, Index_VI6326_Contrast_Enh_Ctrl, 0x04, 0x1F);
/* Set threshold */
if(pSiS->oldChipset < OC_SIS6326) {
CARD8 temp;
inSISIDXREG(SISSR, 0x33, temp); /* Synchronous DRAM Timing? */
if(temp & 0x01) temp = 0x50;
else temp = 0;
setvideoreg(pSiS, Index_VI6326_Play_Threshold_Low, temp);
setvideoreg(pSiS, Index_VI6326_Play_Threshold_High, temp);
} else {
CARD8 temp;
setvideoreg(pSiS, Index_VI6326_Play_Threshold_Low, 0x00);
setvideoreg(pSiS, Index_VI6326_Play_Threshold_High, 0x00);
inSISIDXREG(SISSR, 0x33, temp); /* Are we using SGRAM Timing? */
if(temp & 0x01) temp = 0x10;
else temp = 0;
setvideoregmask(pSiS, Index_VI6326_Control_Misc4, temp, 0x10);
}
/* set default properties for overlay ------------------------------- */
setvideoregmask(pSiS, Index_VI6326_Contrast_Enh_Ctrl, 0x04, 0x07);
setvideoreg(pSiS, Index_VI6326_Brightness, 0x20);
if(pSiS->oldChipset < OC_SIS6205A || pSiS->oldChipset > OC_SIS82204) {
setvideoregmask(pSiS, Index_VI6326_AlphaGraph, 0x00, 0xF8);
setvideoregmask(pSiS, Index_VI6326_AlphaVideo, 0xF8, 0xF8);
} else {
setvideoregmask(pSiS, Index_VI6326_AlphaGraph, 0x00, 0xE1);
setvideoregmask(pSiS, Index_VI6326_AlphaVideo, 0xE1, 0xE1);
}
}
static CARD8 getvideoreg(SISPtr pSiS, CARD8 reg)
{
CARD8 ret;
inSISIDXREG(SISCR, reg, ret);
return ret;
}
