int main (void)
{
char ch;
printf("\n\rRunning the twr_spi_demo project.\n\r");
printf("This demo shows the SPI communication with DMA transfer.\n\r\n\r");
printf("It is targeted for the Freescale KL25 tower card and accompanying \n\r");
printf("Elevator cards. In addition, you will need access to the B side expansion port \n\r");
printf("as all pin numbers are with respect to the B side expansion port.\n\r\n\r");
printf("SPI1 will be configured as a master and SPI0 will be configured as slave!\n\r");
printf("Please make the following connections and then input a character to continue:\n\r\n\r");
printf("NOTE: All pin numbers are with respect to the B side expansion port of the primary Elevator card.\n\r");
printf("Connect PTE2 (pin 7) to PTD1 (pin 48) -- SPI_CLK \n\r");
printf("Connect PTE4 (pin 9) to PTD0 (pin 46) -- SPI_CS \n\r");
printf("Connect PTE1 (pin 10) to PTD2 (pin 45) -- SPI_MOSI \n\r");
printf("Connect PTE0 (pin 11) to PTD3 (pin 44) -- SPI_MISO \n\r\n\r");
ch = in_char();
while(1)
{
spi1_dma_master_spi0_slave();
printf("\n\rPlease input char for next test!\n\r\n\r");
ch = in_char();
ch = ch + 1; // Dummy usage to suppress warning.
}
}
/*
* Counting example using the LPO clock and the prescale feature
*
* Sets compare value to 250. Thus when using the 1Khz LPO clock with
* LPTMR0_PSR[PRESCALE]=0x4, it will take 8 seconds for Timer Compare Flag
* to be set. (1Khz clock/32=31.25Hz clock)
*
* If prescaler was not used, then timer would only wait .25 seconds.
*
*/
void lptmr_prescale()
{
int compare_value=250; //value must be less than 0xFFFF or 65535
printf("\n\n****************************\n");
printf("LPTMR Time Counting Example with Prescaler\n");
//Reset LPTMR module
lptmr_clear_registers();
/* Configure LPTMR */
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR=LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PRESCALE(0x4); //Use LPO clock and divide by 32
printf("LPTMR using LPO clock with PRESCALE=4 and compare value=250 (8 seconds)\n");
printf("Press a key to start counter\n");
in_char(); //wait for keyboard press
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPTMR with default settings
//Wait for Timer Compare Flag to be set
while((LPTMR0_CSR & LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
printf("Current value of counter register CNR is %d\n",LPTMR0_CNR);
}
printf("Waited for %d counts\n",compare_value);
printf("End of Time Counting Example with Prescale\n");
printf("****************************\n\n");
}
static int next_char (void)
{
int c = in_char();
if (c != EOF)
out_char(c);
return c;
}
void main (void)
{
char ch;
printf("\nRunning RTC example!!\n");
printf("This example generates an interrupt every second!\n");
/* Parameters:
* seconds Start value of seconds register
* alarm Time in seconds of first alarm. Set to 0xFFFFFFFF to effectively disable alarm
* c_interval Interval at which to apply time compensation can range from 1 second (0x0) to 256 (0xFF)
* c_value Compensation value ranges from -127 32kHz cycles to +128 32 kHz cycles
* 80h Time prescaler register overflows every 32896 clock cycles.
* FFh Time prescaler register overflows every 32769 clock cycles.
* 00h Time prescaler register overflows every 32768 clock cycles.
* 01h Time prescaler register overflows every 32767 clock cycles.
* 7Fh Time prescaler register overflows every 32641 clock cycles.
* interrupt TRUE or FALSE
*/
rtc_init(0, 0, 0, 0, TRUE);
while(1)
{
ch = in_char();
out_char(ch);
}
}
/*
* LPO Clock Example (PSC=0x1)
*
* Test is pre-scaled to wait for 10 seconds. In reality it might be slightly off because
* of the trim values for the LPO clock.
*/
void lptmr_lpo_input()
{
unsigned int compare_value=4000; //4 second delay with the 1khz LPO clock
printf("\n\n****************************\n");
printf("LPO Clock Source Example\n");
//Reset LPTMR module
lptmr_clear_registers();
/* Configure LPTMR */
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR=LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //Use LPO clock with bypass enabled
printf("LPTMR using LPO clock with no prescale, and compare value=4000 (4 seconds)\n");
printf("Press a key to start counter\n");
in_char();
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT with default settings
printf("Counting...\n\n");
//Wait for Timer Compare Flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
//printf("Current value of counter register CNR is %d\n",LPTMR0_CNR);
}
printf("4 seconds should have passed\n");
printf("End of LPO Clock Source Example\n");
printf("****************************\n\n");
}
char *
get_line (char *line)
{
int pos;
int ch;
pos = 0;
ch = (int)in_char();
while ( (ch != 0x0D /* CR */) &&
(ch != 0x0A /* LF/NL */) &&
(pos < UIF_MAX_LINE))
{
switch (ch)
{
case 0x08: /* Backspace */
case 0x7F: /* Delete */
if (pos > 0)
{
pos -= 1;
out_char(0x08); /* backspace */
out_char(' ');
out_char(0x08); /* backspace */
}
break;
default:
if ((pos+1) < UIF_MAX_LINE)
{
if ((ch > 0x1f) && (ch < 0x80))
{
line[pos++] = (char)ch;
out_char((char)ch);
}
}
break;
}
ch = (int)in_char();
}
line[pos] = '\0';
out_char(0x0D); /* CR */
out_char(0x0A); /* LF */
return line;
}
void main (void)
{
char ch;
printf("\nHello World!!\n");
while(1)
{
ch = in_char();
out_char(ch);
}
}
int main (void)
{
char ch;
#ifdef CMSIS // If we are conforming to CMSIS, we need to call start here
start();
#endif
printf("\n\rRunning the sda project.\n\r");
while(1)
{
ch = in_char();
out_char(ch);
}
}
void main (void)
{
Display_Intro();
init_I2C();
port_config();
DISABLE_USB_5V; // Disable USB 5v (for Host support)
if(MAX3353_Init())
printf("\nMAX3353 not Present\n");
else
printf("\nMAX3353 Present\n");
MAX3353_ISR();
while(1)
{
in_char();
#if 0 //CW
enter_vlps();
#endif //kevin
//enter_stop();
mcg_pbe_2_pee();
if(FLAG_CHK(_MAX3353,gu8ISR_Flags))
{
if(gu8MAX3353StatusRegister & ID_GND_EVENT)
{
ENABLE_USB_5V;
printf("\nID-GND --> Changing to HOST mode (Enabling 5V)");
}
if(gu8MAX3353StatusRegister & ID_FLOAT_EVENT)
{
DISABLE_USB_5V;
printf("\nID-FLOAT --> Changing to DEVICE mode (Disabling 5V)");
}
if(gu8MAX3353StatusRegister & VBUS_HIGH_EVENT)
printf("\nVBUS is Up");
if(gu8MAX3353StatusRegister & VBUS_LOW_EVENT)
printf("\nVBUS is Down");
FLAG_CLR(_MAX3353,gu8ISR_Flags);
}
}
}
/*
* External Reference Clock Example(PSC=0x3)
*
* TWR-K60N512 uses a 50MHz external clock
* TWR-K40X256 uses a 8MHz external clock
*
* Test is pre-scaled to wait for 10 seconds in both cases by adjusting
* the compare value.
*/
void lptmr_external_clk_input()
{
unsigned int compare_value;
printf("\n\n****************************\n");
printf("External Clock Source Example\n");
//Reset LPTMR module
lptmr_clear_registers();
/* Turn on external reference clock */
MCG_C2&=~MCG_C2_EREFS_MASK; //allow extal to drive
OSC_CR |= OSC_CR_ERCLKEN_MASK; // selects EXTAL to drive XOSCxERCLK
//Determine compare value based on which board is being used
#if (defined(K60_CLK))
compare_value=7630; //~10 seconds with prescale=0xF and 50MHz clock
#else
compare_value=1220; //~10 seconds with prescale=0xF and 8MHz clock
#endif
/* Configure LPTMR */
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR=LPTMR_PSR_PCS(0x3)|LPTMR_PSR_PRESCALE(0xF); //Use external clock divided by 65536
printf("LPTMR using external clock with PRESCALE=0xF, and compare value=%d (10 seconds)\n",compare_value);
printf("Press a key to start counter\n");
in_char();
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT with default settings
printf("Counting...\n\n");
//Wait for Timer Compare Flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
//printf("Current value of counter register CNR is %d\n",LPTMR0_CNR);
}
printf("Timer should have waited for 10 seconds\n");
printf("End of External Clock Example\n");
printf("****************************\n\n");
}
/*
* 32kHz Input Clock Test (PSC=0x2)
* The 32kHz clock (ERCLK32K) can come from two clock sources.
* If SOPT1[OSC32KSEL]=1, then it uses 32kHz RTC crystal connected to XTAL32
* This is what the code below tests
* If SOPT1[OSC32KSEL]=0, then it uses 32kHz System oscillator, and reguires
* that the main system clock be a 32kHz crystal. The tower board does not
* support that feature.
*
* Test is pre-scaled to wait for 8 seconds.
*/
void lptmr_32khz_input()
{
unsigned int compare_value=32768; //4 second delay with prescale=1
printf("\n\n****************************\n");
printf("32 Khz Clock Source Example\n");
//Reset LPTMR module
lptmr_clear_registers();
/*
* Configure to use 32Khz clock from RTC clock
*/
printf("Test using RTC OSC\n");
SIM_SCGC6|=SIM_SCGC6_RTC_MASK; //Enable RTC registers
RTC_CR|=RTC_CR_OSCE_MASK; //Turn on RTC oscillator
SIM_SOPT1|=SIM_SOPT1_OSC32KSEL_MASK; //Select RTC OSC as source for ERCLK32K
/* Configure LPTMR */
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR=LPTMR_PSR_PCS(0x2)|LPTMR_PSR_PRESCALE(0x1); //Use 32khz clock (ERCLK32K) and divide source by 4
printf("LPTMR using 32Khz clock with PRESCALE=0x1, and compare value=32768 (4 seconds)\n");
printf("Press a key to start counter\n");
in_char();
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT with default settings
printf("Counting...\n\n");
//Wait for Timer Compare Flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
//printf("Current value of counter register CNR is %d\n",LPTMR0_CNR);
}
printf("4 seconds should have passed\n");
printf("End of 32 Khz Clock Source Example\n");
printf("****************************\n\n");
}
/*
* Internal Reference Clock (PSC=0x0)
* The Internal Reference Clock can come from two clock sources.
* If MCG_C2[IRCS]=0, then uses slow internal clock (32kHz)
* If MCG_C2[IRCS]=1, then uses fast internal clock (2Mhz)
*
* This example uses fast internal clock. It is pre-scaled to wait for 4 seconds.
* Because of trim values, it may be slightly faster or slower than this.
*/
void lptmr_internal_ref_input()
{
unsigned int compare_value=15625; //4 seconds with prescale=8 and 2Mhz fast clock
printf("\n\n****************************\n");
printf("Internal Reference Clock Example\n");
//Reset LPTMR module
lptmr_clear_registers();
/* Ensure Internal Reference Clock is Enabled */
MCG_C1|=MCG_C1_IRCLKEN_MASK;
//Enable fast internal ref clock by setting MCG_C2[IRCS]=1
//If wanted to use 32Khz slow mode, set MCG_C2[IRCS]=0 instead
MCG_C2|=MCG_C2_IRCS_MASK;
/* Configure LPTMR */
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR=LPTMR_PSR_PCS(0x0)|LPTMR_PSR_PRESCALE(0x8); //Use internal clock prescaled by 512
printf("LPTMR using fast internal ref clock with PRESCALE=0x8, and compare value=15625 (4 seconds)\n");
printf("Press a key to start counter\n");
in_char();
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT with default settings
printf("Counting...\n\n");
//Wait for Timer Compare Flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
//printf("Current value of counter register CNR is %d\n",LPTMR0_CNR);
}
printf("4 seconds should have passed\n");
printf("End of Internal reference Clock Source Example\n");
printf("****************************\n\n");
}
/*
* Timer will trigger interrupt after 5 seconds
*/
void lptmr_interrupt(void)
{
int compare_value=5000; //value must be less than 0xFFFF
LPTMR_INTERRUPT=0; //Clear global variable
//Reset LPTMR module
//lptmr_clear_registers();
printf("\n\n****************************\n");
printf("LPTMR Interrupt Example\n");
/* Enable LPT Interrupt in NVIC*/
enable_irq(85); //LPTMR Vector is 101. IRQ# is 101-16=85
/* Configure LPT */
LPTMR0_CMR = LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_PSR = LPTMR_PSR_PCS(0x1) | LPTMR_PSR_PBYP_MASK; //Use LPO clock and bypass prescale
LPTMR0_CSR = LPTMR_CSR_TIE_MASK; //Enable LPT interrupt
printf("LPTMR using LPO clock with no prescale, and compare value=5000 (5 seconds)\n");
printf("Press a key to start counter\n");
in_char(); //wait for keyboard press
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK; //Turn on LPTMR and start counting
printf("Counting...\n\n");
/* Wait for the global variable to be set in LPTMR ISR */
while(LPTMR_INTERRUPT == 0)
{}
printf("Timer should have waited for 5 seconds\n");
LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK; //Turn off LPT to avoid more interrupts
printf("End of LPTMR Interrupt Example\n");
printf("****************************\n\n");
//Reset LPTMR module
//lptmr_clear_registers();
}
int main (void)
{
char ch;
uint16 u16cnt=0;
#ifdef CMSIS // If we are conforming to CMSIS, we need to call start here
start();
#endif
/*LCD Init*/
vfnLCD_Init();
/*Turn On All LCD segments*/
vfnLCD_Set_Display();
/*Turn Off All LCD segments*/
vfnLCD_Clear_Display();
/*Turn On FREESCALE segment*/
_FREESCALE_ON();
printf("\n\rRunning the TWRPI_sLCD project.\n\r");
/* Assign the counter value to the buffer*/
sprintf(s8DispBuffer,"%04d",u16cnt);
vfnLCD_Write_Msg_GoTo(s8DispBuffer,4,0); //Display formatted buffer
while(1)
{
ch = in_char();
out_char(ch);
u16cnt++;
if(u16cnt>1999) u16cnt=0;
/* Assign the counter value to the buffer*/
sprintf(s8DispBuffer,"%04d",u16cnt);
vfnLCD_Write_Msg_GoTo(s8DispBuffer,4,0); //Display formatted buffer
}
}
int main (void)
{
char ch,aux1 ,aux2;
int UsbDetected = FALSE;
#ifdef CMSIS // If we are conforming to CMSIS, we need to call start here
start();
#endif
vfnMcuConfig();
printf("\n\rRunning the FRDMKL46_Demo project.\n\r");
vfnLCD_Init();
gpio_init();
Pit_init();
TSI_Init();
usb_init();
next_task(vfn_led_test);
accel_init();
mag_init();
eCompassInit();
adc_init();
tpm_init(); //Green LED 50%SIM_SCGC5_PORTC_MASK
// character test
vfnLCD_Write_Msg("8888");
_LCD_DP1_ON();
_LCD_DP2_ON();
_LCD_DP3_ON();
_LCD_COL_ON();
while(1)
{
#ifdef FRDM_REVA
if (uart_getchar_present(UART1_BASE_PTR))
#else
if (uart0_getchar_present(UART0_BASE_PTR))
#endif
{
ch = in_char();
printf("\n\r Received char = %c \n\r",ch);
if (ch==' ')
{
printf("\n\r light_sensor = %i",adc_light_sensor);
// printf("\n\r Yaw =%4d Pitch =%4d Roll =%4d \r", APhi6DOF, AThe6DOF, APsi6DOF);
printf("\n\r Yaw =%4d Pitch =%4d Roll =%4d \r", APsi6DOF, APhi6DOF, AThe6DOF);
printf("\n\r tsi %%= %03i ", AbsolutePercentegePosition);
}
}
if (input_rise(SW1_ON, &aux1))
{
printf("\n\r SW1 \n\r");
}
if (input_rise(SW2_ON, &aux2))
{
printf("\n\r SW2 \n\r ");
}
ptr_next_task(); // do the actual function
TSI_SliderRead();
usb_service();
if (gu8USB_State == uENUMERATED && !UsbDetected)
{
// next_task(vfn_rgb_test);
UsbDetected = TRUE;
}
adc_light_sensor = adc_read(3);
}
}
/*
* Counts pulses found on LPTMR0_ALT1 and LPTMR0_ALT2.
* LPTMR0_ALT3 not supported on TWR-K60N512 or TWR-K40X256
*
* LPTMR0_ALT1 is pin PORTA19 (ALT6)
* On TWR-K40X256, PORT19 is connected to XTAL and thus should not be
* driven by an external source, as it will conflict with the crystal clock
* on the board.
* On TWR-K60N512, PORTA19 is conected to pin 18 on J15
*
* LPTMR0_ALT2 is pin PORTC5 (ALT4).
* On TWR-K40X256, PORTC5 is connected to pin 18 on J15
* On TWR-K60N512, PORTC5 is conected A70 on TWR-ELEV
*
*
*
*/
void lptmr_pulse_counter(char pin_select)
{
unsigned int compare_value=1000;
char input;
printf("\n\n****************************\n");
printf("LPTMR Pulse Counting Example on LPTMR_ALT%d\n\n",pin_select);
//Reset LPTMR module
lptmr_clear_registers();
//Set up GPIO
if(pin_select==LPTMR_ALT1)
{
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK; //Turn on PORTA clock
PORTA_PCR19=PORT_PCR_MUX(0x6); //Use ALT6 on PTA19
printf("Testing ALT1 pin on PORTA19\n");
printf("\tTWR-K40X256: ALT1 is connected to XTAL and should not be driven\n");
printf("\tTWR-K60N512: ALT1 is conected to pin 18 on J15\n");
}
else if(pin_select==LPTMR_ALT2)
{
SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; //Turn on PORTC clock
PORTC_PCR5=PORT_PCR_MUX(0x4); //Use ALT4 on PTC5
printf("Testing ALT2 pin on PORTC5\n");
printf("\tTWR-K40X256: ALT2 is connected to pin 18 on J15\n");
printf("\tTWR-K60N512: ALT2 is conected A70 on TWR-ELEV\n");
}
else
{
printf("Invalid pin selected\n");
printf("****************************\n");
return;
}
/* Test requires external hardware. Need to confirm if want to run test or not */
printf("\nThis test requires a function generator, or another way of producing a pulse signal on the pin specified above. ");
printf("Please connect that device to the specified pin (Except if using ALT1 on the TWR-K40X256)\n\n");
printf("If you would like to continue with this example, press \"y\". To skip press any other key\n");
input=in_char(); //wait for keyboard press
printf("\n");
if(input!='y' && input!='Y')
{
printf("Exiting LPTMR Pulse Counting Example on LPTMR_ALT%d\n",pin_select);
printf("****************************\n");
return;
}
LPTMR0_PSR=LPTMR_PSR_PCS(0x1)|LPTMR_PSR_PBYP_MASK; //Use LPO clock but bypass glitch filter
LPTMR0_CMR=LPTMR_CMR_COMPARE(compare_value); //Set compare value
LPTMR0_CSR=LPTMR_CSR_TPS(pin_select)|LPTMR_CSR_TMS_MASK; //Set LPT to use the pin selected, and put in pulse count mode, on rising edge (default)
printf("Press any key to start pulse counter\n");
in_char(); //wait for keyboard press
LPTMR0_CSR|=LPTMR_CSR_TEN_MASK; //Turn on LPT
//Wait for compare flag to be set
while((LPTMR0_CSR&LPTMR_CSR_TCF_MASK)==0)
{
//This may not get proper counter data if the CNR is read at the same time it is incremented
printf("Current value of pulse count register CNR is %d\n",LPTMR0_CNR);
}
printf("Detected %d pulses on LPTMR_ALT%d\n",compare_value,pin_select);
printf("End of Pulse Counting Example\n");
printf("****************************\n");
}
void main (void)
{
char ch;
uint32 timeout;
SCB_SHCSR|=SCB_SHCSR_BUSFAULTENA_MASK|SCB_SHCSR_MEMFAULTENA_MASK|SCB_SHCSR_USGFAULTENA_MASK;
printf("\nRunning FlexMem demo!!\n");
/* Partition the memory to enable FlexMem mode */
if ( partition_flash( EEPROM_16_16, DFLASH_SIZE_128) )
{
/* Device has been partitioned for the first time, so this
* means the counters have not been initialized yet. We'll
* zero them out now.
*/
*((uint32 *)(LONGWORD_COUNTER_ADDR)) = 0x0;
/* Wait for the command to complete */
while(!(FTFL_FCNFG & FTFL_FCNFG_EEERDY_MASK));
*((uint16 *)(WORD_COUNTER_ADDR)) = 0x0;
/* Wait for the command to complete */
while(!(FTFL_FCNFG & FTFL_FCNFG_EEERDY_MASK));
*((uint8 *)(BYTE_COUNTER_ADDR)) = 0x0;
/* Wait for the command to complete */
while(!(FTFL_FCNFG & FTFL_FCNFG_EEERDY_MASK));
}
/* Display the initial counter values */
printf("\nlongword counter = 0x%08X", *(uint32 *)(LONGWORD_COUNTER_ADDR));
printf("\nword counter = 0x%04X", *(uint16 *)(WORD_COUNTER_ADDR));
printf("\nbyte counter = 0x%02X", *(uint8 *)(BYTE_COUNTER_ADDR));
/* Initialize the PIT timer to generate an interrupt every 15s */
/* Enable the clock to the PIT module */
SIM_SCGC6 |= SIM_SCGC6_PIT_MASK;
/* Enable the PIT timer module */
PIT_MCR &= ~PIT_MCR_MDIS_MASK;
/* Calculate the timeout value to get a 15s interval */
timeout = 15 * periph_clk_khz * 1000;
PIT_LDVAL0 = timeout;
/* Enable the timer and enable interrupts */
PIT_TCTRL0 |= PIT_TCTRL_TEN_MASK | PIT_TCTRL_TIE_MASK;
/* Enable the PIT timer interrupt in the NVIC */
enable_irq(68);
while(1)
{
ch = in_char();
out_char(ch);
}
}
uint8_t Hw_Trig_Test(void)
{
// Notes:
// PDB settings : continous mode, started by sotware trigger.
// This means that once the software "pulls the trigger" by setting a certain bit, the PDB starts counting
// and handing out four triggers per cycle of its counter.
// PDB settings: CH0_DLY0, CH0_DLY1 , CH1_DLY0, CH1_DLY1
// set to different values to distinguish effect on ADCx_Ry register
// need to provide 4 different voltages to convert at two ADC0 and two ADC1 input channels
// PDB counter clock prescaled to allow time for printf's and slow down things to they are visible, each trigger.
// Using adiclk= BUS , and adidiv/4 to get 12,5MHz on Tower demonstration.
// visibility of PDB start trigger is obtained by generating a toggling edge on
// GPIOxx with PDBisr set to trigger immediatly at zero value of PDB counter.
// Conversion end of each ADC and channel within the ADC ( A,B ) will be done by
// toggling second GPIO pin inside ADCisr ( this pin is also reset by PDB isr )
// GPIO PIN to low voltage .. this macro sets the PIN low.
PIN_LOW
// Initialize PIN1 and PIN2 GPIO outputs
Init_Gpio2();
// Disable ADC and PDB interrupts
disable_irq(ADC0_irq_no) ; // not ready for this interrupt yet. Plug vector first.
disable_irq(ADC1_irq_no) ; // not ready for this interrupt yet. Plug vector first.
disable_irq(PDB_irq_no) ; // not ready for this interrupt yet. Plug vector first.
// Dynamic interrupt vector modification whilst those interruts are disabled
__VECTOR_RAM[73] = (uint32)adc0_isr; // plug isr into vector table in case not there already
__VECTOR_RAM[74] = (uint32)adc1_isr; // plug isr into vector table in case not there already
__VECTOR_RAM[88] = (uint32)pdb_isr; // plug isr into vector table in case not there already
// The System Integration Module largely determines the role of the different ball map locations on Kinetis.
// When an external pin is used, the System Integration Module should be consulted and invoked as needed.
// System integration module registers start with SIM_
// Turn on the ADC0 and ADC1 clocks as well as the PDB clocks to test ADC triggered by PDB
SIM_SCGC6 |= (SIM_SCGC6_ADC0_MASK );
SIM_SCGC3 |= (SIM_SCGC3_ADC1_MASK );
SIM_SCGC6 |= SIM_SCGC6_PDB_MASK ;
// Configure System Integration Module for defaults as far as ADC
SIM_SOPT7 &= ~(SIM_SOPT7_ADC1ALTTRGEN_MASK | // selects PDB not ALT trigger
SIM_SOPT7_ADC1PRETRGSEL_MASK |
SIM_SOPT7_ADC0ALTTRGEN_MASK | // selects PDB not ALT trigger
SIM_SOPT7_ADC0ALTTRGEN_MASK) ;
SIM_SOPT7 = SIM_SOPT7_ADC0TRGSEL(0); // applies only in case of ALT trigger, in which case
// PDB external pin input trigger for ADC
SIM_SOPT7 = SIM_SOPT7_ADC1TRGSEL(0); // same for both ADCs
/////////////////////////////////////////////////////////////////////////////////////////
//PDB configured below 以下是PDB配置
// Configure the Peripheral Delay Block (PDB):
// enable PDB, pdb counter clock = busclock / 20 , continous triggers, sw trigger , and use prescaler too
PDB0_SC = PDB_SC_CONT_MASK // Contintuous, rather than one-shot, mode
| PDB_SC_PDBEN_MASK // PDB enabled
| PDB_SC_PDBIE_MASK // PDB Interrupt Enable
| PDB_SC_PRESCALER(0x5) // Slow down the period of the PDB for testing
| PDB_SC_TRGSEL(0xf) // Trigger source is Software Trigger to be invoked in this file
| PDB_SC_MULT(2); // Multiplication factor 20 for the prescale divider for the counter clock
// the software trigger, PDB_SC_SWTRIG_MASK is not triggered at this time.
PDB0_IDLY = 0x0000; // need to trigger interrupt every counter reset which happens when modulus reached
PDB0_MOD = 0xffff; // largest period possible with the slections above, so slow you can see each conversion.
// channel 0 pretrigger 0 and 1 enabled and delayed
PDB0_CH0C1 = PDB_C1_EN(0x01)
| PDB_C1_TOS(0x01)
| PDB_C1_EN(0x02)
| PDB_C1_TOS(0x02) ;
PDB0_CH0DLY0 = ADC0_DLYA ;
PDB0_CH0DLY1 = ADC0_DLYB ;
// channel 1 pretrigger 0 and 1 enabled and delayed
PDB0_CH1C1 = PDB_C1_EN(0x01)
| PDB_C1_TOS(0x01)
| PDB_C1_EN(0x02)
| PDB_C1_TOS(0x02) ;
PDB0_CH1DLY0 = ADC1_DLYA ;
PDB0_CH1DLY1 = ADC1_DLYB ;
PDB0_SC = PDB_SC_CONT_MASK // Contintuous, rather than one-shot, mode
| PDB_SC_PDBEN_MASK // PDB enabled
| PDB_SC_PDBIE_MASK // PDB Interrupt Enable
| PDB_SC_PRESCALER(0x5) // Slow down the period of the PDB for testing
| PDB_SC_TRGSEL(0xf) // Trigger source is Software Trigger to be invoked in this file
| PDB_SC_MULT(2) // Multiplication factor 20 for the prescale divider for the counter clock
| PDB_SC_LDOK_MASK; // Need to ok the loading or it will not load certain regsiters!
// the software trigger, PDB_SC_SWTRIG_MASK is not triggered at this time.
//PDB configured above 以上是PDB配置
/////////////////////////////////////////////////////////////////////////////////////////
//ADC configured below 以下是ADC配置
// setup the initial ADC default configuration
Master_Adc_Config.CONFIG1 = ADLPC_NORMAL
| ADC_CFG1_ADIV(ADIV_4)
| ADLSMP_LONG
| ADC_CFG1_MODE(MODE_16)
| ADC_CFG1_ADICLK(ADICLK_BUS);
Master_Adc_Config.CONFIG2 = MUXSEL_ADCA
| ADACKEN_DISABLED
| ADHSC_HISPEED
| ADC_CFG2_ADLSTS(ADLSTS_20) ;
Master_Adc_Config.COMPARE1 = 0x1234u ; // can be anything
Master_Adc_Config.COMPARE2 = 0x5678u ; // can be anything
// since not using
// compare feature
Master_Adc_Config.STATUS2 = ADTRG_HW
| ACFE_DISABLED
| ACFGT_GREATER
| ACREN_ENABLED
| DMAEN_DISABLED
| ADC_SC2_REFSEL(REFSEL_EXT);
Master_Adc_Config.STATUS3 = CAL_OFF
| ADCO_SINGLE
| AVGE_ENABLED
| ADC_SC3_AVGS(AVGS_32);
Master_Adc_Config.PGA = PGAEN_DISABLED
| PGACHP_NOCHOP
| PGALP_NORMAL
| ADC_PGA_PGAG(PGAG_64);
Master_Adc_Config.STATUS1A = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31);
Master_Adc_Config.STATUS1B = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31);
// Configure ADC as it will be used, but becuase ADC_SC1_ADCH is 31,
// the ADC will be inactive. Channel 31 is just disable function.
// There really is no channel 31.
ADC_Config_Alt(ADC0_BASE_PTR, &Master_Adc_Config); // config ADC
// Calibrate the ADC in the configuration in which it will be used:
ADC_Cal(ADC0_BASE_PTR); // do the calibration
// The structure still has the desired configuration. So restore it.
// Why restore it? The calibration makes some adjustments to the
// configuration of the ADC. The are now undone:
// config the ADC again to desired conditions
ADC_Config_Alt(ADC0_BASE_PTR, &Master_Adc_Config);
// REPEAT for BOTH ADC's. However we will only 'use' the results from
// the ADC wired to the Potentiometer on the Kinetis Tower Card.
// Repeating for ADC1:
ADC_Config_Alt(ADC1_BASE_PTR, &Master_Adc_Config); // config ADC
ADC_Cal(ADC1_BASE_PTR); // do the calibration
// ADC_Read_Cal(ADC1_BASE_PTR,&CalibrationStore[0]); // store the cal
// config the ADC again to default conditions
ADC_Config_Alt(ADC1_BASE_PTR, &Master_Adc_Config);
// *****************************************************************************
// ADC0 and ADC1 using the PDB trigger in ping pong
// *****************************************************************************
// use interrupts, single ended mode, and real channel numbers now:
Master_Adc_Config.STATUS1A = AIEN_ON | DIFF_SINGLE | ADC_SC1_ADCH(ADC0_CHANA);
Master_Adc_Config.STATUS1B = AIEN_ON | DIFF_SINGLE | ADC_SC1_ADCH(ADC0_CHANB);
ADC_Config_Alt(ADC0_BASE_PTR, &Master_Adc_Config); // config ADC0
Master_Adc_Config.STATUS1A = AIEN_ON | DIFF_SINGLE | ADC_SC1_ADCH(ADC1_CHANA);
Master_Adc_Config.STATUS1B = AIEN_ON | DIFF_SINGLE | ADC_SC1_ADCH(ADC1_CHANB);
ADC_Config_Alt(ADC1_BASE_PTR, &Master_Adc_Config); // config ADC1
// Note that three different balls are being sampled:
// ADC0_CHANA not used in this demo, but readings are shown
// ADC0_CHANB not used in this demo, but readings are shown
// ADC1_CHANA POT channel set the same as the following for demo: 20
// ADC1_CHANB POT channel set the same as the above for demo: 20
// The potentiometer is only on ADC1. That is the one used
// to calculate the change of the potentiometer below.
while(char_present()) in_char(); // flush terminal buffer
printf ("\n\n\n");
printf("********************************************************\n");
printf("* Running ADC0 & ADC1 HARDWARE TRIGGER by PDB *\n");
printf("* The one PDB is triggering both ADC0 and ADC1 *\n");
printf("* ADC1 A,B is the POT. Vary the POT setting. *\n");
printf("* Hit any key to exit (ADC0 readings not used) *\n");
printf("********************************************************\n");
printf ("\n\n");
// Enable the ADC and PDB interrupts in NVIC
enable_irq(ADC0_irq_no) ; // ready for this interrupt.
enable_irq(ADC1_irq_no) ; // ready for this interrupt.
enable_irq(PDB_irq_no) ; // ready for this interrupt.
// In case previous test did not end with interrupts enabled, enable used ones.
EnableInterrupts ;
cycle_flags=0;
PDB0_SC |= PDB_SC_SWTRIG_MASK ; // kick off the PDB - just once
//The system is now working!!!! The PDB is *continuously* triggering ADC
// conversions. Now, to display the results! The line above
// was the SOFTWARE TRIGGER...
// The demo will continue as long as no character is pressed on the terminal.
while(!char_present()) // as long as no operater intervention, keep running this:
{
while( cycle_flags != ( ADC0A_DONE | ADC0B_DONE | ADC1A_DONE | ADC1B_DONE )); // wait for one complete cycle
printf("R0A=%6d R0B=%6d R1A=%6d R1B=%6d POT=%6d\r",
result0A,result0B,result1A,result1B, exponentially_filtered_result1);
}
// disable the PDB
PDB0_SC = 0 ;
// Disable the ADC and PDB interrupts in NVIC
disable_irq(ADC0_irq_no) ; // through with this interrupt.
disable_irq(ADC1_irq_no) ; // through with this interrupt.
disable_irq(PDB_irq_no) ; // through with this interrupt.
printf ("\n\n\n");
printf("********************************************************\n");
printf("* Demonstration ended at operator request *\n");
printf("* ADC0 & ADC1 PDB TRIGGER DEMO COMPLETE *\n");
printf("********************************************************\n");
printf ("\n\n");
return 0;
}
int main (void)
{
uint32_t execution_cycle; //actual execution cycle
char ch;
#ifdef CMSIS // If we are conforming to CMSIS, we need to call start here
start();
#endif
printf("\n\rRunning the LQRUG_bme_ex2 project.\n\r");
if (RCM_SRS0 & RCM_SRS0_WAKEUP_MASK)
{
printf("Wakeup initialization flow\n\r");
systick_init();
cnt_start_value = SYST_CVR;
Init_BME_GPIO();
ADC_BME_Trigger();
//Set LPTMR to timeout about 1 second
Lptmr_BME_Init(1000, LPOCLK);
ADC_BME_Init();
Calibrate_BME_ADC();
ADC_BME_Init();
ADC_Start(ADC0_CHANB);
// Enable the ADC interrupt in NVIC
#ifdef CMSIS
enable_irq(ADC0_IRQn) ; // ready for this interrupt.
enable_irq(LPTimer_IRQn);
#else
enable_irq(ADC0_irq_no) ; // ready for this interrupt.
enable_irq(LPTMR0_irq_no);
#endif
cnt_end_value = SYST_CVR;
execution_cycle = cnt_start_value - cnt_end_value - overhead;
systick_disable();
#ifdef DEBUG_PRINT
printf("Systick start value: 0x%x\n\r", cnt_start_value);
printf("Systick end value: 0x%x\n\r", cnt_end_value);
printf("Actual execution cycle for initialization phase in normal C code: 0x%x\n\r", execution_cycle);
#endif
}
else
{
printf("Normal initialization flow\n\r"); //make sure the two printf has the same characters to output
systick_init();
cnt_start_value = SYST_CVR;
Init_GPIO();
ADC_Trigger();
//Set LPTMR to timeout about 1 second
Lptmr_Init(1000, LPOCLK);
ADC_Init();
Calibrate_ADC();
ADC_Init();
ADC_Start(ADC0_CHANB);
// Enable the ADC interrupt in NVIC
#ifdef CMSIS
enable_irq(ADC0_IRQn) ; // ready for this interrupt.
enable_irq(LPTimer_IRQn);
#else
enable_irq(ADC0_irq_no) ; // ready for this interrupt.
enable_irq(LPTMR0_irq_no);
#endif
cnt_end_value = SYST_CVR;
execution_cycle = cnt_start_value - cnt_end_value - overhead;
systick_disable();
#ifdef DEBUG_PRINT
printf("Systick start value: 0x%x\n\r", cnt_start_value);
printf("Systick end value: 0x%x\n\r", cnt_end_value);
printf("Actual execution cycle for initialization phase in normal C code: 0x%x\n\r", execution_cycle);
#endif
}
Lptmr_Start();
#ifndef FREEDOM
printf("ADC conversion for potentiometer started, press any key to stop ADC conversion\n\r");
#else
printf("No potentiometer or LED on FREEDOM board, press any key to stop ADC conversion\n\r");
#endif
while(!char_present())
{
#ifndef FREEDOM
if (cycle_flags == ADC0A_DONE)
{
printf("\r R0A=%8d",result0A);
cycle_flags &= ~ADC0A_DONE ;
}
#endif
}
in_char(); //Read out any available characters
ADC_Stop();
printf("ADC conversion stopped, press 'l' to enter VLLS1 mode\n\r");
#ifndef FREEDOM
printf("Press SW3 or SW4(Reset button) on TWR-KL25Z48M to exit VLLS1 mode\n\r");
#else
printf("Press SW1(Reset button) on FREEDOM board to exit VLLS1 mode\n\r");
#endif
while(1)
{
ch = in_char();
//out_char(ch);
if(ch != 'l')
printf("Incorrect character input, Press 'l' to enter VLLS1 mode\n\r");
else
break;
}
llwu_configure(0x0080/*PTC3*/, LLWU_PIN_FALLING, 0x0);
/* Configure SW3 - init for GPIO PTC3/LLWU_P7/UART1_RX/FTM0_CH2/CLKOUT*/
PORTC_PCR3 = ( PORT_PCR_MUX(1) |
PORT_PCR_PE_MASK |
PORT_PCR_PFE_MASK |
PORT_PCR_PS_MASK);
enter_vlls1();
}
