void init_desc(void)
{
// IDT entries
ISR_ENTRY(0); ISR_ENTRY(1); ISR_ENTRY(2); ISR_ENTRY(3); ISR_ENTRY(4); ISR_ENTRY(5);
ISR_ENTRY(6); ISR_ENTRY(7); ISR_ENTRY(8); ISR_ENTRY(9); ISR_ENTRY(10); ISR_ENTRY(11);
ISR_ENTRY(12); ISR_ENTRY(13); ISR_ENTRY(14); ISR_ENTRY(15); ISR_ENTRY(16); ISR_ENTRY(17);
ISR_ENTRY(18); ISR_ENTRY(19); ISR_ENTRY(20); ISR_ENTRY(21); ISR_ENTRY(22); ISR_ENTRY(23);
ISR_ENTRY(24); ISR_ENTRY(25); ISR_ENTRY(26); ISR_ENTRY(27); ISR_ENTRY(28); ISR_ENTRY(29);
ISR_ENTRY(30); ISR_ENTRY(31);
SYSG((u32)isr128, this_cpu.idt[0x80]);// SYStem Call goes here
ISR_ENTRY(255);
IRQ_ENTRY(0); IRQ_ENTRY(1); IRQ_ENTRY(2); IRQ_ENTRY(3); IRQ_ENTRY(4); IRQ_ENTRY(5);
IRQ_ENTRY(6); IRQ_ENTRY(7); IRQ_ENTRY(8); IRQ_ENTRY(9); IRQ_ENTRY(10); IRQ_ENTRY(11);
IRQ_ENTRY(12); IRQ_ENTRY(13); IRQ_ENTRY(14); IRQ_ENTRY(15);
write_tss(&this_cpu.gdt[GDT_TSS_ENTRY], __KERNEL_DS, 0x0);
this_cpu.idt_ptr.limit = IDT_ENTRY_NUM * sizeof(struct idt_desc_struct);
this_cpu.idt_ptr.base = (u32)&(this_cpu.idt);
gdt_flush((u32)&(this_cpu.gdt_ptr));
init_8259A();
irq_enable(2);
memset((u8 *)&interrupt_handlers , 0, sizeof(interrupt_handlers));
idt_flush((u32)&(this_cpu.idt_ptr));
tss_flush();
}
void kernel(){
setup_idt();
clean_screen();
print_mem_info();
mm_init();
init_8259A();
*(int*)0xf0000000 = 0; //cause pf interrupt
//asm volatile("int $0xff");
while(1);
}
/*=======================================================
init_prot()
========================================================*/
PUBLIC void init_prot()
{
init_8259A();
//初始化异常 （中断门 没有陷阱门）
init_idt_desc( INT_VECTOR_DIVIDE, DA_386IGate, divide_error, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_DEBUG, DA_386IGate, single_step_exception, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_NMI, DA_386IGate, nmi, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_BREAKPOINT, DA_386IGate, breakpoint_exception, PRIVILEGE_USER);
init_idt_desc( INT_VECTOR_OVERFLOW, DA_386IGate , overflow, PRIVILEGE_USER);
init_idt_desc( INT_VECTOR_BOUNDS, DA_386IGate, bounds_check, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_INVAL_OP, DA_386IGate, inval_opcode, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_COPROC_NOT, DA_386IGate, copr_not_available, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_DOUBLE_FAULT, DA_386IGate, double_fault, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_COPROC_SEG, DA_386IGate, copr_seg_overrun, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_INVAL_TSS, DA_386IGate, inval_tss, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_SEG_NOT, DA_386IGate, segment_not_present, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_STACK_FAULT, DA_386IGate, stack_exception, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_PROTECTION, DA_386IGate, general_protection, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_PAGE_FAULT, DA_386IGate, page_fault, PRIVILEGE_KRNL);
init_idt_desc( INT_VECTOR_COPROC_ERR, DA_386IGate, copr_error, PRIVILEGE_KRNL);
/*初始化中断*/
init_idt_desc(INT_VECTOR_IRQ0 + 0, DA_386IGate , hint00 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 1, DA_386IGate , hint01 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 2, DA_386IGate , hint02 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 3, DA_386IGate , hint03 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 4, DA_386IGate , hint04 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 5, DA_386IGate , hint05 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 6, DA_386IGate , hint06 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 7, DA_386IGate , hint07 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 0, DA_386IGate , hint08 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 1, DA_386IGate , hint09 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 2, DA_386IGate , hint10 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 3, DA_386IGate , hint11 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 4, DA_386IGate , hint12 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 5, DA_386IGate , hint13 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 6, DA_386IGate , hint14 , PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 7, DA_386IGate , hint15 , PRIVILEGE_KRNL);
/* 填充 GDT 中的 TSS */
memset(&tss,0,sizeof(tss));
tss.ss0 = SELECTOR_KERNEL_DS;
init_descriptor(&gdt[INDEX_TSS],
vir2phys(seg2phys(SELECTOR_KERNEL_DS),&tss),
sizeof(tss) - 1, DA_386TSS);
tss.iobase = sizeof(tss); /*没有I/O许可位图*/
/*填充 GDT 中进程的 LDT的描述符 */
init_descriptor(&gdt[INDEX_LDT_FIRST],
vir2phys(seg2phys(SELECTOR_KERNEL_DS),proc_table[0].ldts),
LDT_SIZE * sizeof(DESCRIPTOR) - 1, DA_LDT);
}
void intr_init(void) {
idt_init();
stub_init();
isr_int();
init_8259A();
enable_intr();
}
int
main(int argc, char **argv, char **env, struct callvectors *cv)
{
char str[256];
char **ev;
int i;
unsigned stat;
callvec = cv;
printf("\n\nHello! This is the 'hello' program!\n\n");
init_8259A(0);
*(volatile char *)0xbfd00021=0;
*(volatile char *)0xbfd000a1=0;
// linux_outb(0x60,0x64);
// linux_outb(0x2,0x60);
// asm("mfc0 $2,$12;\r\nor $2,0xf01;\r\n mtc0 $2,$12\r\n":::"$2");
asm("mfc0 %0,$12;":"=r"(stat));
stat|=0x1|(1<<13);
asm("mtc0 %0,$12;"::"r"(stat));
asm("mfc0 %0,$12;":"=r"(stat));
printf("stat=%x\n",stat);
printf("time is %d:%d:%d\n",CMOS_READ(0x4),CMOS_READ(0x2),CMOS_READ(0x0));
#if 0
CMOS_WRITE(CMOS_READ(0x4),5);
CMOS_WRITE(CMOS_READ(0x2),3);
CMOS_WRITE(CMOS_READ(0x0),1);
CMOS_WRITE(CMOS_READ(0xb)|(7<<4),0xb);
#endif
gets(str);
return 0;
printf("It was invoked with:\n");
for (i = 0; i < argc; i++) {
printf("Arg %2d: %s\n", i, argv[i]);
}
printf("\nEnvironment setup = \n");
ev = env;
while(*ev) {
printf("\t%s\n", *ev);
ev++;
}
printf("\n\n");
printf("Type '<ctl>C' to stop the program\n");
gets(str);
printf("Ehhh.. you typed '%s'\n", str);
return(0);
}
static int acpi_pm_finish(suspend_state_t pm_state)
{
u32 acpi_state = acpi_suspend_states[pm_state];
acpi_leave_sleep_state(acpi_state);
acpi_disable_wakeup_device(acpi_state);
/* reset firmware waking vector */
acpi_set_firmware_waking_vector((acpi_physical_address) 0);
if (init_8259A_after_S1) {
printk("Broken toshiba laptop -> kicking interrupts\n");
init_8259A(0);
}
return 0;
}
static void acpi_pm_finish(void)
{
u32 acpi_state = acpi_target_sleep_state;
acpi_disable_wakeup_device(acpi_state);
acpi_leave_sleep_state(acpi_state);
/* reset firmware waking vector */
acpi_set_firmware_waking_vector((acpi_physical_address) 0);
acpi_target_sleep_state = ACPI_STATE_S0;
#ifdef CONFIG_X86
if (init_8259A_after_S1) {
printk("Broken toshiba laptop -> kicking interrupts\n");
init_8259A(0);
}
#endif
}
/*======================================================================*
init_prot
*----------------------------------------------------------------------*
* 作用：初始化IDT和8529
*======================================================================*/
PUBLIC void init_prot()
{
init_8259A();
// 全部初始化成中断门(没有陷阱门)
init_idt_desc(INT_VECTOR_DIVIDE, DA_386IGate, divide_error, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DEBUG, DA_386IGate, single_step_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_NMI, DA_386IGate, nmi, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BREAKPOINT, DA_386IGate, breakpoint_exception, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_OVERFLOW, DA_386IGate, overflow, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_BOUNDS, DA_386IGate, bounds_check, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_OP, DA_386IGate, inval_opcode, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_NOT, DA_386IGate, copr_not_available, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DOUBLE_FAULT, DA_386IGate, double_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_SEG, DA_386IGate, copr_seg_overrun, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_TSS, DA_386IGate, inval_tss, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_SEG_NOT, DA_386IGate, segment_not_present, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_STACK_FAULT, DA_386IGate, stack_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PROTECTION, DA_386IGate, general_protection, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PAGE_FAULT, DA_386IGate, page_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_ERR, DA_386IGate, copr_error, PRIVILEGE_KRNL);
// Master 8529A产生的中断
init_idt_desc(INT_VECTOR_IRQ0 + 0, DA_386IGate, hwint00, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 1, DA_386IGate, hwint01, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 2, DA_386IGate, hwint02, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 3, DA_386IGate, hwint03, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 4, DA_386IGate, hwint04, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 5, DA_386IGate, hwint05, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 6, DA_386IGate, hwint06, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 7, DA_386IGate, hwint07, PRIVILEGE_KRNL);
// Slave 8529A产生的中断
init_idt_desc(INT_VECTOR_IRQ8 + 0, DA_386IGate, hwint08, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 1, DA_386IGate, hwint09, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 2, DA_386IGate, hwint10, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 3, DA_386IGate, hwint11, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 4, DA_386IGate, hwint12, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 5, DA_386IGate, hwint13, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 6, DA_386IGate, hwint14, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 7, DA_386IGate, hwint15, PRIVILEGE_KRNL);
}
void __init__ (void)
{
int i;
change_gdt ();
disp_pos = 0;
for (i = 0; i < 80 * 25; i ++) /*一个Oooo...的清屏....*/
printk (" ");
disp_pos = 0;
printk ("we have changed the gdt!\n");
init_8259A ();
printk ("8259A have been inited!\n");
init_idt ();
printk ("idt have been inited!\n");
printk ("set the timer interrupt open\n");
init_first_thread ();
op_8259A (0xfe, 0xff);
}
/**
* acpi_system_restore_state - OS-specific restoration of state
* @state: sleep state we're exiting
*
* Note that if we're coming back from S4, the memory image should have
* already been loaded from the disk and is already in place. (Otherwise how
* else would we be here?).
*/
acpi_status
acpi_system_restore_state(
u32 state)
{
/*
* We should only be here if we're coming back from STR or STD.
* And, in the case of the latter, the memory image should have already
* been loaded from disk.
*/
if (state > ACPI_STATE_S1) {
acpi_restore_state_mem();
/* Do _early_ resume for irqs. Required by
* ACPI specs.
*/
/* TBD: call arch dependant reinitialization of the
* interrupts.
*/
#ifdef CONFIG_X86
init_8259A(0);
#endif
/* wait for power to come back */
mdelay(1000);
}
/* Be really sure that irqs are disabled. */
ACPI_DISABLE_IRQS();
/* Wait a little again, just in case... */
mdelay(1000);
/* enable interrupts once again */
ACPI_ENABLE_IRQS();
/* turn all the devices back on */
if (state > ACPI_STATE_S1)
pm_send_all(PM_RESUME, (void *)0);
return AE_OK;
}
static void __init init_ISA_irqs(void)
{
int i;
init_bsp_APIC();
init_8259A(0);
for (i = 0; i < NR_IRQS_LEGACY; i++) {
struct irq_desc *desc = irq_to_desc(i);
desc->status = IRQ_DISABLED;
desc->action = NULL;
desc->depth = 1;
/*
* 16 old-style INTA-cycle interrupts:
*/
set_irq_chip_and_handler_name(i, &i8259A_chip,
handle_level_irq, "XT");
}
}
PUBLIC void init_prot()
{
init_8259A();
/* 全部初始化为中断门 */
init_idt_desc(INT_VECTOR_DIVIDE, DA_386IGate, divide_error, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DEBUG, DA_386IGate, single_step_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_NMI, DA_386IGate, nmi, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BREAKPOINT, DA_386IGate, breakpoint_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_OVERFLOW, DA_386IGate, overflow, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BOUNDS, DA_386IGate, bounds_check, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_OP, DA_386IGate, invalid_opcode, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_NOT, DA_386IGate, copr_not_available, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DOUBLE_FAULT, DA_386IGate, double_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_SEG, DA_386IGate, copr_seg_overrun, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_TSS, DA_386IGate, invalid_tss, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_SEG_NOT, DA_386IGate, segment_not_present, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_STACK_FAULT, DA_386IGate, stack_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PROTECTION, DA_386IGate, general_protection, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PAGE_FAULT, DA_386IGate, page_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_ERR, DA_386IGate, copr_error, PRIVILEGE_KRNL);
/* 初始化8259A的处理程序 */
init_idt_desc(INT_VECTOR_IRQ0 + 0, DA_386IGate, hwint_00, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 1, DA_386IGate, hwint_01, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 2, DA_386IGate, hwint_02, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 3, DA_386IGate, hwint_03, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 4, DA_386IGate, hwint_04, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 5, DA_386IGate, hwint_05, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 6, DA_386IGate, hwint_06, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 7, DA_386IGate, hwint_07, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 0, DA_386IGate, hwint_08, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 1, DA_386IGate, hwint_09, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 2, DA_386IGate, hwint_10, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 3, DA_386IGate, hwint_11, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 4, DA_386IGate, hwint_12, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 5, DA_386IGate, hwint_13, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 6, DA_386IGate, hwint_14, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 7, DA_386IGate, hwint_15, PRIVILEGE_KRNL);
}
PUBLIC void init_prot()
{
init_8259A();
/* 全部初始化为中断门 */
init_idt_desc(INT_VECTOR_DIVIDE, DA_386IGate, divide_error, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DEBUG, DA_386IGate, single_step_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_NMI, DA_386IGate, nmi, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BREAKPOINT, DA_386IGate, breakpoint_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_OVERFLOW, DA_386IGate, overflow, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BOUNDS, DA_386IGate, bounds_check, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_OP, DA_386IGate, invalid_opcode, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_NOT, DA_386IGate, copr_not_available, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DOUBLE_FAULT, DA_386IGate, double_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_SEG, DA_386IGate, copr_seg_overrun, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_TSS, DA_386IGate, invalid_tss, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_SEG_NOT, DA_386IGate, segment_not_present, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_STACK_FAULT, DA_386IGate, stack_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PROTECTION, DA_386IGate, general_protection, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PAGE_FAULT, DA_386IGate, page_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_ERR, DA_386IGate, copr_error, PRIVILEGE_KRNL);
}
void
init_port(void)
{
init_8259A();
/* all initialize as interrupt gate */
init_idt_desc(INT_VECTOR_DIVIDE, DA_386IGATE,
divide_error, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_DEBUG, DA_386IGATE,
single_step_exception, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_NMI, DA_386IGATE,
nmi, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_BREAKPOINT, DA_386IGATE,
breakpoint_exception, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_OVERFLOW, DA_386IGATE,
overflow, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_BOUNDS, DA_386IGATE,
bounds_check, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_INVAL_OP, DA_386IGATE,
inval_opcode, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_COPROC_NOT, DA_386IGATE,
copr_not_available, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_DOUBLE_FAULT, DA_386IGATE,
double_fault, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_COPROC_SEG, DA_386IGATE,
copr_seg_overrun, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_INVAL_TSS, DA_386IGATE,
inval_tss, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_SEG_NOT, DA_386IGATE,
segment_not_present, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_STACK_FAULT, DA_386IGATE,
stack_exception, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_PROTECTION, DA_386IGATE,
general_protection, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_PAGE_FAULT, DA_386IGATE,
page_fault, PRIVILEGE_KERNAL);
init_idt_desc(INT_VECTOR_COPROC_ERR, DA_386IGATE,
copr_error, PRIVILEGE_KERNAL);
}
void __init init_ISA_irqs (void)
{
int i;
#ifdef CONFIG_X86_LOCAL_APIC
init_bsp_APIC();
#endif
init_8259A(0);
/*
* 16 old-style INTA-cycle interrupts:
*/
for (i = 0; i < 16; i++) {
/* first time call this irq_desc */
struct irq_desc *desc = irq_to_desc(i);
desc->status = IRQ_DISABLED;
desc->action = NULL;
desc->depth = 1;
set_irq_chip_and_handler_name(i, &i8259A_chip,
handle_level_irq, "XT");
}
}
//--------------------------------------------------------------------------
// init_prot
//--------------------------------------------------------------------------
void init_prot()
{
init_8259A();
// 全部初始化成中断门(没有陷阱门)
init_idt_desc(INT_VECTOR_DIVIDE, DA_386IGate,
divide_error, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DEBUG, DA_386IGate,
single_step_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_NMI, DA_386IGate,
nmi, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_BREAKPOINT, DA_386IGate,
breakpoint_exception, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_OVERFLOW, DA_386IGate,
overflow, PRIVILEGE_USER);
init_idt_desc(INT_VECTOR_BOUNDS, DA_386IGate,
bounds_check, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_OP, DA_386IGate,
inval_opcode, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_NOT, DA_386IGate,
copr_not_available, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_DOUBLE_FAULT, DA_386IGate,
double_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_SEG, DA_386IGate,
copr_seg_overrun, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_INVAL_TSS, DA_386IGate,
inval_tss, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_SEG_NOT, DA_386IGate,
segment_not_present, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_STACK_FAULT, DA_386IGate,
stack_exception, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PROTECTION, DA_386IGate,
general_protection, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_PAGE_FAULT, DA_386IGate,
page_fault, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_COPROC_ERR, DA_386IGate,
copr_error, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 0, DA_386IGate,
hwint00, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 1, DA_386IGate,
hwint01, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 2, DA_386IGate,
hwint02, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 3, DA_386IGate,
hwint03, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 4, DA_386IGate,
hwint04, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 5, DA_386IGate,
hwint05, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 6, DA_386IGate,
hwint06, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ0 + 7, DA_386IGate,
hwint07, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 0, DA_386IGate,
hwint08, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 1, DA_386IGate,
hwint09, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 2, DA_386IGate,
hwint10, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 3, DA_386IGate,
hwint11, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 4, DA_386IGate,
hwint12, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 5, DA_386IGate,
hwint13, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 6, DA_386IGate,
hwint14, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_IRQ8 + 7, DA_386IGate,
hwint15, PRIVILEGE_KRNL);
init_idt_desc(INT_VECTOR_SYS_CALL, DA_386IGate,
sys_call, PRIVILEGE_USER);
//填充 GDT 中 TSS 这个描述符
memset(&tss, 0, sizeof(tss));
tss.ss0 = SELECTOR_KERNEL_DS;
init_descriptor(&gdt[INDEX_TSS],
vir2phys(seg2phys(SELECTOR_KERNEL_DS), &tss),
sizeof(tss) - 1,
DA_386TSS);
tss.iobase = sizeof(tss); // 没有I/O许可位图
// 填充 GDT 中进程的 LDT 的描述符
int i;
PROCESS* p_proc = proc_table;
u16 selector_ldt = INDEX_LDT_FIRST << 3;
for(i=0;i<NR_TASKS;i++){
init_descriptor(&gdt[selector_ldt>>3],
vir2phys(seg2phys(SELECTOR_KERNEL_DS),
proc_table[i].ldts),
LDT_SIZE * sizeof(DESCRIPTOR) - 1,
DA_LDT);
p_proc++;
selector_ldt += 1 << 3;
}
}
/* 构建idt */
void setup_idt()
{
init_8259A();
init_idt();
enable_interrupt();
}
/*
* This is the PIIX4-based 8259 that is wired up indirectly to Cobalt
* -- not the manner expected by the code in i8259.c.
*
* there is a 'master' physical interrupt source that gets sent to
* the CPU. But in the chipset there are various 'virtual' interrupts
* waiting to be handled. We represent this to Linux through a 'master'
* interrupt controller type, and through a special virtual interrupt-
* controller. Device drivers only see the virtual interrupt sources.
*/
static unsigned int startup_piix4_master_irq(unsigned int irq)
{
init_8259A(0);
return startup_cobalt_irq(irq);
}
void init_trap()
{
int i;
init_8259A();
//soft interrupt
set_trap_gate(INT_VECTOR_DIVIDE,divide_error);
set_trap_gate(INT_VECTOR_DEBUG, single_step_exception);
set_trap_gate(INT_VECTOR_NMI, nmi);
set_system_gate(INT_VECTOR_BREAKPOINT, breakpoint_exception);
set_system_gate(INT_VECTOR_OVERFLOW, overflow);
set_system_gate(INT_VECTOR_BOUNDS, bounds_check);
set_trap_gate(INT_VECTOR_INVAL_OP, inval_opcode);
set_trap_gate(INT_VECTOR_COPROC_NOT, copr_not_available);
set_trap_gate(INT_VECTOR_DOUBLE_FAULT, double_fault);
set_trap_gate(INT_VECTOR_COPROC_SEG, copr_seg_overrun);
set_trap_gate(INT_VECTOR_INVAL_TSS, inval_tss);
set_trap_gate(INT_VECTOR_SEG_NOT, segment_not_present);
set_trap_gate(INT_VECTOR_STACK_FAULT, stack_exception);
set_trap_gate(INT_VECTOR_PROTECTION, general_protection);
set_trap_gate(INT_VECTOR_PAGE_FAULT, page_fault);
set_trap_gate(INT_VECTOR_COPROC_ERR, copr_error);
// hard interrupt IRQ0-IRQ15
set_intr_gate(INT_VECTOR_IRQ0 + 0, clock_intr); //clock interrupt
set_intr_gate(INT_VECTOR_IRQ0 + 1, kb_intr); //keyboard interrupt
set_intr_gate(INT_VECTOR_IRQ0 + 2, hwint02);
set_intr_gate(INT_VECTOR_IRQ0 + 3, hwint03);
set_intr_gate(INT_VECTOR_IRQ0 + 4, hwint04);
set_intr_gate(INT_VECTOR_IRQ0 + 5, hwint05);
set_intr_gate(INT_VECTOR_IRQ0 + 6, hwint06);
set_intr_gate(INT_VECTOR_IRQ0 + 7, hwint07);
set_intr_gate(INT_VECTOR_IRQ8 + 0, hwint08);
set_intr_gate(INT_VECTOR_IRQ8 + 1, hwint09);
set_intr_gate(INT_VECTOR_IRQ8 + 2, hwint10);
set_intr_gate(INT_VECTOR_IRQ8 + 3, hwint11);
set_intr_gate(INT_VECTOR_IRQ8 + 4, hwint12);
set_intr_gate(INT_VECTOR_IRQ8 + 5, hwint13);
set_intr_gate(INT_VECTOR_IRQ8 + 6, hd_intr);//hard disk interrupt
set_intr_gate(INT_VECTOR_IRQ8 + 7, hwint15);
//init 80 interrupt
set_syscall_gate(INT_VECTOR_SYS_CALL, sys_call);
memset((char *)&tss, 0, sizeof(tss));
tss.ss0 = SELECTOR_KERNEL_DS;
//¿¿TSS
init_descriptor(&gdt[INDEX_TSS],
vir2phys(seg2phys(SELECTOR_KERNEL_DS), &tss),
sizeof(tss) - 1,
DA_386TSS);
tss.iobase = sizeof(tss);
PROCESS* p_proc = proc_table;
t16 selector_ldt = INDEX_LDT_FIRST << 3;
//¿¿GDT¿¿¿¿¿¿¿LDT
for(i=0;i<NR_SYSTEM_PROCS + NR_USER_PROCS;i++)
{
init_descriptor(&gdt[selector_ldt>>3],
vir2phys(seg2phys(SELECTOR_KERNEL_DS), proc_table[i].ldts),
LDT_SIZE * sizeof(DESCRIPTOR) - 1,
DA_LDT);
p_proc++;
selector_ldt += 1 << 3;
}
}
