interrupt(TIMER0_A0_VECTOR) __attribute__ ((naked)) timer0_a0_isr(void) {
__enter_isr();
TA0_unset(0);
int_handler(0);
__exit_isr();
}
void *thrad_1(void *dummy) {
(void)dummy;
int sig, status, *status_ptr = &status;
sigset_t sigmask;
// blocking no signal
sigfillset(&sigmask);
pthread_sigmask(SIG_UNBLOCK, &sigmask, (sigset_t*)0);
sigwait(&sigmask, &sig);
switch (sig) {
case SIGINT: int_handler(sig); break;
default: break;
}
// blocked by tid2
printf("Thread %ld: sende SIGINT and %ld\n", (long)pthread_self(), (long)tid2);
pthread_kill(tid2, SIGINT);
// not blocked by tid2
printf("Thread %ld: sende SIGUSR1 and %ld\n", (long)pthread_self(), (long)tid2);
pthread_kill(tid2, SIGUSR1);
pthread_join(tid2, (void**)status_ptr);
printf("Thread %ld: Exit-Status = %d\n",(long)tid2, status);
printf("Thread %ld: wird beendet\n", (long)pthread_self());
pthread_exit(NULL);
}
static int
num_markers_handler(const config_t *c, const char *p, ConfigVar *v)
{
int result = int_handler(c, p, v);
phasespace_switch_to_marker_tracking();
return result;
}
static int
do_vm86(xf86Int10InfoPtr pInt)
{
int retval, signo;
xf86InterceptSignals(&signo);
retval = vm86_rep(VM86S);
xf86InterceptSignals(NULL);
if (signo >= 0) {
xf86DrvMsg(pInt->scrnIndex, X_ERROR,
"vm86() syscall generated signal %d.\n", signo);
dump_registers(pInt);
dump_code(pInt);
stack_trace(pInt);
return 0;
}
switch (VM86_TYPE(retval)) {
case VM86_UNKNOWN:
if (!vm86_GP_fault(pInt)) return 0;
break;
case VM86_STI:
xf86DrvMsg(pInt->scrnIndex, X_ERROR, "vm86_sti :-((\n");
dump_registers(pInt);
dump_code(pInt);
stack_trace(pInt);
return 0;
case VM86_INTx:
pInt->num = VM86_ARG(retval);
if (!int_handler(pInt)) {
xf86DrvMsg(pInt->scrnIndex, X_ERROR,
"Unknown vm86_int: 0x%X\n\n", VM86_ARG(retval));
dump_registers(pInt);
dump_code(pInt);
stack_trace(pInt);
return 0;
}
/* I'm not sure yet what to do if we can handle ints */
break;
case VM86_SIGNAL:
return 1;
/*
* we used to warn here and bail out - but now the sigio stuff
* always fires signals at us. So we just ignore them for now.
*/
xf86DrvMsg(pInt->scrnIndex, X_WARNING, "received signal\n");
return 0;
default:
xf86DrvMsg(pInt->scrnIndex, X_ERROR, "unknown type(0x%x)=0x%x\n",
VM86_ARG(retval), VM86_TYPE(retval));
dump_registers(pInt);
dump_code(pInt);
stack_trace(pInt);
return 0;
}
return 1;
}
static void
x86emu_do_int(int num)
{
Int10Current->num = num;
if (!int_handler(Int10Current)) {
X86EMU_halt_sys();
}
}
void
xf86ExecX86int10(xf86Int10InfoPtr pInt)
{
int sig = setup_int(pInt);
if (int_handler(pInt))
while(do_vm86(pInt)) {};
finish_int(pInt, sig);
}
interrupt(TIMERA0_VECTOR) __attribute__((naked)) timer_isr_ccr0(void)
{
__enter_isr();
if (overflow_interrupt[0] == timer_round) {
timer_unset(0);
int_handler(0);
}
__exit_isr();
}
void NMI_HandlerC(unsigned long *exception_args)
{
if (int_handler)
{
int_handler(exception_args);
}
else
{
hw_watchdog_handle_int(exception_args);
}
}
void
xf86ExecX86int10(xf86Int10InfoPtr pInt)
{
int sig = setup_int(pInt);
if (sig < 0)
return;
if (int_handler(pInt)) {
X86EMU_exec();
}
finish_int(pInt, sig);
}
interrupt(TIMER0_A1_VECTOR) __attribute__ ((naked)) timer0_a1_5_isr(void) {
__enter_isr();
short taiv = TA0IV;
short timer;
if (taiv & TAIFG) {
DEBUG("Overflow\n");
}
else {
timer = (taiv/2);
TA0_unset(timer);
int_handler(timer);
}
__exit_isr();
}
/**
* native timer signal handler
*
* set new system timer, call timer interrupt handler
*/
void hwtimer_isr_timer()
{
int i;
DEBUG("hwtimer_isr_timer()\n");
i = next_timer;
native_hwtimer_isset[next_timer] = 0;
schedule_timer();
if (native_hwtimer_irq[i] == 1) {
DEBUG("hwtimer_isr_timer(): calling hwtimer.int_handler(%i)\n", i);
int_handler(i);
}
else {
DEBUG("hwtimer_isr_timer(): this should not have happened");
}
}
/**
* native timer signal handler
*
* set new system timer, call timer interrupt handler
*/
void hwtimer_isr_timer(void)
{
DEBUG("hwtimer_isr_timer()\n");
if (next_timer == -1) {
DEBUG("hwtimer_isr_timer(): next_timer is invalid\n");
return;
}
if (native_hwtimer_isset[next_timer] == 1) {
native_hwtimer_isset[next_timer] = 0;
DEBUG("hwtimer_isr_timer(): calling hwtimer.int_handler(%i)\n", next_timer);
int_handler(next_timer);
}
else {
DEBUG("hwtimer_isr_timer(): this should not have happened\n");
}
schedule_timer();
}
interrupt(TIMERA1_VECTOR) __attribute__((naked)) timer_isr(void)
{
__enter_isr();
short taiv_reg = TAIV;
if (taiv_reg == 0x0A) {
/* TAIV = 0x0A means overflow */
DEBUG("Overflow\n");
timer_round++;
}
else {
short timer = taiv_reg >> 1;
/* check which CCR has been hit and if the overflow counter
for this timer has been reached (or exceeded);
there is indeed a race condition where an hwtimer
due to fire in the next round can be set after
the timer's counter has overflowed but *before*
timer_round incrementation has occured (when
interrupts are disabled for any reason), thus
effectively setting the timer one round in the past! */
int16_t round_delta = overflow_interrupt[timer] - timer_round;
/* in order to correctly handle timer_round overflow,
we must fire the timer when, for example,
timer_round == 0 and overflow_interrupt[timer] == 65535;
to that end, we compute the difference between the two
on a 16-bit signed integer: any difference >= +32768 will
thus overload to a negative number; we should then
correctly fire "overdue" timers whenever the case */
if (round_delta <= 0) {
timer_unset(timer);
int_handler(timer);
}
}
__exit_isr();
}