void omap3_intc_prepare_idle(void) { /* * Disable autoidle as it can stall interrupt controller, * cf. errata ID i540 for 3430 (all revisions up to 3.1.x) */ intc_writel(INTC_SYSCONFIG, 0); intc_writel(INTC_IDLE, INTC_IDLE_TURBO); }
static void intc_resume(void) { int i; for (i = 0; i < 64; i++) intc_writel(&intc0, INTPR0 + 4 * i, intc0.saved_ipr[i]); }
static void __init omap_irq_enable_protection(void) { u32 reg; reg = intc_readl(INTC_PROTECTION); reg |= INTC_PROTECTION_ENABLE; intc_writel(INTC_PROTECTION, reg); }
static void __init omap_irq_soft_reset(void) { unsigned long tmp; tmp = intc_readl(INTC_REVISION) & 0xff; pr_info("IRQ: Found an INTC at 0x%p (revision %ld.%ld) with %d interrupts\n", omap_irq_base, tmp >> 4, tmp & 0xf, omap_nr_irqs); tmp = intc_readl(INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ intc_writel(INTC_SYSCONFIG, tmp); while (!(intc_readl(INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; /* Enable autoidle */ intc_writel(INTC_SYSCONFIG, 1 << 0); }
void __init init_IRQ(void) { extern void _evba(void); extern void irq_level0(void); struct resource *regs; struct clk *pclk; unsigned int i; u32 offset, readback; regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0); if (!regs) { printk(KERN_EMERG "intc: no mmio resource defined\n"); goto fail; } pclk = clk_get(&at32_intc0_device.dev, "pclk"); if (IS_ERR(pclk)) { printk(KERN_EMERG "intc: no clock defined\n"); goto fail; } clk_enable(pclk); intc0.regs = ioremap(regs->start, regs->end - regs->start + 1); if (!intc0.regs) { printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n", (unsigned long)regs->start); goto fail; } /* * Initialize all interrupts to level 0 (lowest priority). The * priority level may be changed by calling * irq_set_priority(). * */ offset = (unsigned long)&irq_level0 - (unsigned long)&_evba; for (i = 0; i < NR_INTERNAL_IRQS; i++) { intc_writel(&intc0, INTPR0 + 4 * i, offset); readback = intc_readl(&intc0, INTPR0 + 4 * i); if (readback == offset) set_irq_chip_and_handler(i, &intc0.chip, handle_simple_irq); } /* Unmask all interrupt levels */ sysreg_write(SR, (sysreg_read(SR) & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M))); return; fail: panic("Interrupt controller initialization failed!\n"); }
static int intc_resume(struct sys_device *sdev) { struct intc *intc = container_of(sdev, struct intc, sysdev); int i; WARN_ON(!irqs_disabled()); for (i = 0; i < 64; i++) intc_writel(intc, INTPR0 + 4 * i, intc->saved_ipr[i]); return 0; }
static int intc_suspend(void) { int i; if (unlikely(!irqs_disabled())) { pr_err("intc_suspend: called with interrupts enabled\n"); return -EINVAL; } if (unlikely(!intc0.suspend_ipr)) { pr_err("intc_suspend: suspend_ipr not initialized\n"); return -EINVAL; } for (i = 0; i < 64; i++) { intc0.saved_ipr[i] = intc_readl(&intc0, INTPR0 + 4 * i); intc_writel(&intc0, INTPR0 + 4 * i, intc0.suspend_ipr); } return 0; }
static int intc_suspend(struct sys_device *sdev, pm_message_t state) { struct intc *intc = container_of(sdev, struct intc, sysdev); int i; if (unlikely(!irqs_disabled())) { pr_err("intc_suspend: called with interrupts enabled\n"); return -EINVAL; } if (unlikely(!intc->suspend_ipr)) { pr_err("intc_suspend: suspend_ipr not initialized\n"); return -EINVAL; } for (i = 0; i < 64; i++) { intc->saved_ipr[i] = intc_readl(intc, INTPR0 + 4 * i); intc_writel(intc, INTPR0 + 4 * i, intc->suspend_ipr); } return 0; }
void omap_intc_restore_context(void) { int i; intc_writel(INTC_SYSCONFIG, intc_context.sysconfig); intc_writel(INTC_PROTECTION, intc_context.protection); intc_writel(INTC_IDLE, intc_context.idle); intc_writel(INTC_THRESHOLD, intc_context.threshold); for (i = 0; i < omap_nr_irqs; i++) intc_writel(INTC_ILR0 + 0x4 * i, intc_context.ilr[i]); for (i = 0; i < INTCPS_NR_MIR_REGS; i++) intc_writel(INTC_MIR0 + 0x20 * i, intc_context.mir[i]); /* MIRs are saved and restore with other PRCM registers */ }
/* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(struct irq_data *d) { intc_writel(INTC_CONTROL, 0x1); }
void omap3_intc_resume_idle(void) { /* Re-enable autoidle */ intc_writel(INTC_SYSCONFIG, 1); intc_writel(INTC_IDLE, 0); }