static void per_cpu_smm_trigger(void)
{
const struct pattrs *pattrs = pattrs_get();
msr_t msr_value;
/* Need to make sure that all cores have microcode loaded. */
msr_value = rdmsr(MSR_IA32_BIOS_SIGN_ID);
if (msr_value.hi == 0)
intel_microcode_load_unlocked(pattrs->microcode_patch);
/* Relocate SMM space. */
smm_initiate_relocation();
/* Load microcode after SMM relocation. */
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
static void pre_smm_relocation(void *unused)
{
const struct pattrs *pattrs = pattrs_get();
msr_t msr_value;
/* Need to make sure that all cores have microcode loaded. */
msr_value = rdmsr(MSR_IA32_BIOS_SIGN_ID);
if (msr_value.hi == 0)
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
static void smm_relocate(void *unused)
{
const struct pattrs *pattrs = pattrs_get();
/* Load relocation and permanent handler. */
if (boot_cpu()) {
if (smm_load_handlers() < 0) {
printk(BIOS_ERR, "Error loading SMM handlers.\n");
return;
}
southcluster_smm_clear_state();
}
/* Relocate SMM space. */
smm_initiate_relocation();
/* Load microcode after SMM relocation. */
intel_microcode_load_unlocked(pattrs->microcode_patch);
}
