PRIVATE void estimate_cpu_freq(void)
{
u64_t tsc_delta;
u64_t cpu_freq;
irq_hook_t calib_cpu;
/* set the probe, we use the legacy timer, IRQ 0 */
put_irq_handler(&calib_cpu, CLOCK_IRQ, calib_cpu_handler);
/* just in case we are in an SMP single cpu fallback mode */
BKL_UNLOCK();
/* set the PIC timer to get some time */
intr_enable();
/* loop for some time to get a sample */
while(probe_ticks < PROBE_TICKS) {
intr_enable();
}
intr_disable();
/* just in case we are in an SMP single cpu fallback mode */
BKL_LOCK();
/* remove the probe */
rm_irq_handler(&calib_cpu);
tsc_delta = sub64(tsc1, tsc0);
cpu_freq = mul64(div64u64(tsc_delta, PROBE_TICKS - 1), make64(system_hz, 0));
cpu_set_freq(cpuid, cpu_freq);
cpu_info[cpuid].freq = div64u(cpu_freq, 1000000);
BOOT_VERBOSE(cpu_print_freq(cpuid));
}
int
kern_init(void) {
extern char edata[], end[];
memset(edata, 0, end - edata);
cons_init(); // init the console
const char *message = "(THU.CST) os is loading ...";
kprintf ("%s\n\n", message);
/* Only to initialize lcpu_count. */
mp_init ();
pmm_init(); // init physical memory management
pmm_init_ap ();
pic_init(); // init interrupt controller
vmm_init(); // init virtual memory management
sched_init(); // init scheduler
proc_init(); // init process table
sync_init(); // init sync struct
ide_init(); // init ide devices
swap_init(); // init swap
fs_init(); // init fs
clock_init(); // init clock interrupt
intr_enable(); // enable irq interrupt
cpu_idle(); // run idle process
}
void main( void )
{
errno = 0;
intr_disable();
intr_init();
hw_init();
/* print a banner */
printf( "%s %s\n", os_name, os_version );
memory_init();
device_init();
vfs_init();
/* new line after all initialisation messages */
printf("\n");
kb_init();
console_init();
intr_enable();
/* fire up the shell! */
for(;;) {
shell_start();
printf("Respawning shell\n");
}
}
/* Initialize the alarm object */
void
set_alarm (int64_t t)
{
struct thread *thrd;
struct alarm *alrm;
thrd = thread_current (); /* the current thread */
/* if t == 0 then do nothing */
if (t == 0)
return;
ASSERT (thrd->status == THREAD_RUNNING);
alrm = &thrd->alrm;
alrm->thrd = thrd;
alrm->ticks = t + timer_ticks (); /* set the tick count to t plus current timer ticks */
alrm->magic = ALARM_MAGIC;
/* add to alarm_list, critical section */
intr_disable ();
list_push_back (&alarm_list, &alrm->elem);
/* block the thread */
thread_block ();
intr_enable ();
}
void kmain(void)
{
//bsod();
intr_disable();
idt_init();
pic_init();
console_init();
if (keyboard_init())
goto error;
kprintf("kernel86\n");
intr_enable();
shell_do();
error:
kprintf("error");
while (1)
;
}
int
kern_init(void) {
extern char edata[], end[];
memset(edata, 0, end - edata);
cons_init(); // init the console
const char *message = "(THU.CST) os is loading ...";
cprintf("%s\n\n", message);
print_kerninfo();
grade_backtrace();
pic_init(); // init interrupt controller
idt_init(); // init interrupt descriptor table
pmm_init(); // init physical memory management
vmm_init(); // init virtual memory management
sched_init(); // init scheduler
proc_init(); // init process table
swap_init(); // init swap
fs_init(); // init fs
clock_init(); // init clock interrupt
intr_enable(); // enable irq interrupt
//LAB1: CAHLLENGE 1 If you try to do it, uncomment lab1_switch_test()
// user/kernel mode switch test
//lab1_switch_test();
cpu_idle(); // run idle process
}
/* Reboots the machine via the keyboard controller. */
void
shutdown_reboot (void)
{
printf ("Rebooting...\n");
#ifdef FILESYS
enum intr_level old_level = intr_enable ();
filesys_done ();
intr_set_level (old_level);
#endif
/* See [kbd] for details on how to program the keyboard
* controller. */
for (;;)
{
int i;
/* Poll keyboard controller's status byte until
* 'input buffer empty' is reported. */
for (i = 0; i < 0x10000; i++)
{
if ((inb (CONTROL_REG) & 0x02) == 0)
break;
timer_udelay (2);
}
timer_udelay (50);
/* Pulse bit 0 of the output port P2 of the keyboard controller.
* This will reset the CPU. */
outb (CONTROL_REG, 0xfe);
timer_udelay (50);
}
}
int __noreturn
kern_init(void) {
extern char edata[], end[];
memset(edata, 0, end - edata);
cons_init(); // init the console
const char *message = "(THU.CST) os is loading ...";
cprintf("%s\n\n", message);
print_kerninfo();
pmm_init(); // init physical memory management
pic_init(); // init interrupt controller
idt_init(); // init interrupt descriptor table
vmm_init(); // init virtual memory management
sched_init(); // init scheduler
proc_init(); // init process table
sync_init(); // init sync struct
ide_init(); // init ide devices
swap_init(); // init swap
fs_init(); // init fs
clock_init(); // init clock interrupt
intr_enable(); // enable irq interrupt
cpu_idle(); // run idle process
}
static bool lapic_tmr_init(tmr_cb_t master) {
if(intr_state())
fatal("interrupts may not be enabled in lapic_tmr_init()!\n");
_master = master;
// fastest possible rate: 0xB (1011) -> FSB tick rate. on modern
// systems, this should allow near nanoseconds resolution.
APIC_REG(APIC_REG_DIVIDE_CONFIG) = 0xB;
uint8_t old_rate = rtc_set_rate(RTC_RATE_128HZ);
rtc_calibrate(lapic_tmr_calibrate);
// enable interrupts for this to work, disable the again afterwards.
intr_enable(true);
// wait for calibration to finish.
while(!_lapic_hz)
asm volatile("hlt");
intr_disable();
rtc_set_rate(old_rate);
info("local apic timer calibrated to %ld hz\n", _lapic_hz);
intr_add(IRQ_LAPIC_TIMER, lapic_tmr_handler);
APIC_REG(APIC_REG_LVT_TIMER) = IRQ_LAPIC_TIMER;
return true;
}
void write_register(int reg_addr, int value)
{
intr_disable();
outb(RTC_INDEX, reg_addr);
outb(RTC_IO, value);
intr_enable();
}
int sys_exec(char* filename)
{
tid_t tid = process_execute(filename);
if(tid == -1) // process execute failed, return -1
return -1;
else // tid is valid
{
intr_disable();
thread_block(); // block myself, until child wakes me up
// with the exec_status, telling me if the elf load was successful
intr_enable();
struct thread* child = get_thread_from_tid(tid);
if(child)
{
// exec_status will be -1 if load failed, hence we return -1
// in such case
tid = child->exec_status;
child->parent_waiting_exec = 0;
// child had blocked itself, unblock it
thread_unblock(child);
}
return tid;
}
}
/**
* Once we're inside of idleproc_run(), we are executing in the context of the
* first process-- a real context, so we can finally begin running
* meaningful code.
*
* This is the body of process 0. It should initialize all that we didn't
* already initialize in kmain(), launch the init process (initproc_run),
* wait for the init process to exit, then halt the machine.
*
* @param arg1 the first argument (unused)
* @param arg2 the second argument (unused)
*/
static void *
idleproc_run(int arg1, void *arg2)
{
int status;
pid_t child;
dbg_print("Made it to idleproc_run\n");
/* create init proc */
kthread_t *initthr = initproc_create();
init_call_all();
GDB_CALL_HOOK(initialized);
/* Create other kernel threads (in order) */
#ifdef __VFS__
/* Once you have VFS remember to set the current working directory
* of the idle and init processes */
/* Here you need to make the null, zero, and tty devices using mknod */
/* You can't do this until you have VFS, check the include/drivers/dev.h
* file for macros with the device ID's you will need to pass to mknod */
#endif
/* Finally, enable interrupts (we want to make sure interrupts
* are enabled AFTER all drivers are initialized) */
intr_enable();
/* Run initproc */
sched_make_runnable(initthr);
/* Now wait for it */
child = do_waitpid(-1, 0, &status);
KASSERT(PID_INIT == child);
#ifdef __MTP__
kthread_reapd_shutdown();
#endif
#ifdef __VFS__
/* Shutdown the vfs: */
dbg_print("weenix: vfs shutdown...\n");
vput(curproc->p_cwd);
if (vfs_shutdown())
panic("vfs shutdown FAILED!!\n");
#endif
/* Shutdown the pframe system */
#ifdef __S5FS__
pframe_shutdown();
#endif
dbg_print("\nweenix: halted cleanly!\n");
GDB_CALL_HOOK(shutdown);
hard_shutdown();
return NULL;
}
static int
sef_cb_init(int type, sef_init_info_t * UNUSED(info))
{
int r;
if (type == SEF_INIT_LU) {
/* Restore the state. */
lu_state_restore();
}
/* look-up the endpoint for the bus driver */
bus_endpoint = i2cdriver_bus_endpoint(bus);
if (bus_endpoint == 0) {
log_warn(&log, "Couldn't find bus driver.\n");
return EXIT_FAILURE;
}
/* claim the device */
r = i2cdriver_reserve_device(bus_endpoint, address);
if (r != OK) {
log_warn(&log, "Couldn't reserve device 0x%x (r=%d)\n",
address, r);
return EXIT_FAILURE;
}
/* check that the chip / rev is reasonable */
r = check_revision();
if (r != OK) {
/* prevent user from using the driver with a different chip */
log_warn(&log, "Bad CHIPID\n");
return EXIT_FAILURE;
}
/* enable interrupts */
r = intr_enable();
if (r != OK) {
log_warn(&log, "Failed to enable interrupts.\n");
return EXIT_FAILURE;
}
/* enable power-off pin so the kernel can cut power to the SoC */
enable_pwr_off();
if (type != SEF_INIT_LU) {
/* sign up for updates about the i2c bus going down/up */
r = i2cdriver_subscribe_bus_updates(bus);
if (r != OK) {
log_warn(&log, "Couldn't subscribe to bus updates\n");
return EXIT_FAILURE;
}
i2cdriver_announce(bus);
log_debug(&log, "announced\n");
}
return OK;
}
void
apm_suspend(int state)
{
extern int perflevel;
int s;
#if NWSDISPLAY > 0
wsdisplay_suspend();
#endif /* NWSDISPLAY > 0 */
stop_periodic_resettodr();
config_suspend_all(DVACT_QUIESCE);
bufq_quiesce();
s = splhigh();
intr_disable();
cold = 2;
config_suspend_all(DVACT_SUSPEND);
suspend_randomness();
/* XXX
* Flag to disk drivers that they should "power down" the disk
* when we get to DVACT_POWERDOWN.
*/
boothowto |= RB_POWERDOWN;
config_suspend_all(DVACT_POWERDOWN);
boothowto &= ~RB_POWERDOWN;
/* Send machine to sleep */
apm_set_powstate(APM_DEV_ALLDEVS, state);
/* Wake up */
/* They say that some machines may require reinitializing the clocks */
i8254_startclock();
if (initclock_func == i8254_initclocks)
rtcstart(); /* in i8254 mode, rtc is profclock */
inittodr(time_second);
config_suspend_all(DVACT_RESUME);
cold = 0;
intr_enable();
splx(s);
resume_randomness(NULL, 0); /* force RNG upper level reseed */
bufq_restart();
config_suspend_all(DVACT_WAKEUP);
start_periodic_resettodr();
#if NWSDISPLAY > 0
wsdisplay_resume();
#endif /* NWSDISPLAY > 0 */
/* restore hw.setperf */
if (cpu_setperf != NULL)
cpu_setperf(perflevel);
}
int read_register(int reg_addr)
{
int r;
intr_disable();
outb(RTC_INDEX, reg_addr);
r= inb(RTC_IO);
intr_enable();
return r;
}
int sys_exit(int status) {
task_exit(CurrentTask, status);
/* this system call should never return.
at this point, the task is removed from the queue, so we're
just waiting out it's last cycle on the scheduler */
intr_enable();
while (1) {
}
return 0;
}
/*===========================================================================*
* profile_clock_stop *
*===========================================================================*/
PUBLIC void stop_profile_clock()
{
intr_disable();
arch_stop_profile_clock();
intr_enable();
/* Unregister interrupt handler. */
disable_irq(&profile_clock_hook);
rm_irq_handler(&profile_clock_hook);
}
void sched_start() {
// intialize heartbeat timer.
tmr_schedule(sched_schedule, SCHED_TIMESLICE_US, false);
info("waiting for scheduler to take over ...\n");
intr_enable(true);
// wait for the timer to take over. this thread is now stopped.
asm volatile("1: hlt; jmp 1b;");
}
int main(void) {
// register exception handlers
for (unsigned i = 0; i < 32; i++) {
exc_register(i, &fault_handler);
}
exc_register(8, &trap_handler);
exc_register(18, &intr_handler);
exc_register(19, &intr_handler);
exc_register(20, &intr_handler);
exc_register(21, &intr_handler);
// unmask interrupts
intr_unmask_all();
// clear pending flags
intr_clear_all_pending();
// enable interrupts
intr_enable();
// go to user mode
EXC_STATUS &= ~0x2;
// a that prints "@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_" N times and does some self-checking
volatile unsigned starts = 0;
volatile unsigned ends = 0;
volatile unsigned sent = 0;
for (unsigned k = 0; k < N; k++) {
starts++;
for (unsigned i = 0; i < 32; i++) {
putchar('@'+i);
sent+=i;
}
putchar('\n');
ends++;
if (sent != 496*(k+1) || starts != ends) {
LEDS = 0x55;
abort();
}
}
// disabling interrupts again only works in privileged mode
/* intr_disable(); */
// call exception vector number 8
trap(8);
// trigger illegal operation fault
asm volatile(".word 0xffffffff"); // illegal operation
// trigger illegal memory access fault, never reached
(*((volatile _IODEV unsigned *)0xffffffff)) = 0;
return 0;
}
static void
__context_initial_func(context_func_t func, int arg1, void *arg2)
{
apic_setipl(IPL_LOW);
intr_enable();
void *result = func(arg1, arg2);
kthread_exit(result);
panic("\nReturned from kthread_exit.\n");
}
int intr_unmask(irq_hook_t* hook){
if(hook->irq <= 32){ /* VIC1 */
*((volatile unsigned int *)reg_VIC1Addr+(hook->id)) = (unsigned int)hook->handler;
*((volatile unsigned int *)reg_VIC1Cntl+(hook->id)) = (hook->irq | 0x20);
VIC1IntEnable = (1<<(hook->irq));
VIC1VectAddr = 0xFF; /* write any value to update VIC1 priority table */
intr_enable();
return OK;
}
else if(hook->irq <= 64){ /* VIC2 */
*((volatile unsigned int *)reg_VIC2Addr+(hook->id)) = (unsigned int)hook->handler;
*((volatile unsigned int *)reg_VIC2Cntl+(hook->id)) = (hook->irq | 0x20);
VIC2IntEnable = (1<<(hook->irq-32));
VIC2VectAddr = 0xFF; /* write any value to update VIC2 priority table */
intr_enable();
return OK;
}
else{
return -1;
}
}
void
pci_unregister_irq (struct pci_dev *pd)
{
ASSERT (pd != NULL);
intr_disable ();
list_remove (&pd->int_peer);
intr_enable ();
pd->irq_handler = NULL;
pd->irq_handler_aux = NULL;
}
static void
configure_final(void *dummy)
{
intr_enable();
cninit_finish();
if (bootverbose)
printf("Device configuration finished.\n");
cold = 0;
}
void noc_receive() {
int id = get_cpuid();
done[id] = 0;
exc_register(18,&__data_resp_handler);
//exc_register(19,&__data_resp_handler);
intr_unmask_all();
intr_enable();
//puts("Interrupt handler setup");
while(done[id] != 1){;}
intr_disable();
return;
}
/* Starts preemptive thread scheduling by enabling interrupts.
Also creates the idle thread. */
void
thread_start (void)
{
/* Create the idle thread. */
struct semaphore idle_started;
sema_init (&idle_started, 0);
thread_create ("idle", PRI_MIN, idle, &idle_started);
/* Start preemptive thread scheduling. */
intr_enable ();
/* Wait for the idle thread to initialize idle_thread. */
sema_down (&idle_started);
}
/*===========================================================================*
* init_profile_clock *
*===========================================================================*/
PUBLIC void init_profile_clock(u32_t freq)
{
int r, irq;
intr_disable();
if((irq = arch_init_profile_clock(freq)) >= 0) {
/* Register interrupt handler for statistical system profiling. */
profile_clock_hook.proc_nr_e = CLOCK;
put_irq_handler(&profile_clock_hook, irq, profile_clock_handler);
enable_irq(&profile_clock_hook);
}
intr_enable();
}
void __noreturn
kern_init(void) {
//setup_exception_vector();
tlb_invalidate_all();
/*
unsigned base = 0xBE000000;
int i, j;
for (j = 10; j < 24; ++j) {
kprintf("\nj=%d\n\n\n", j);
for (i = 0; i < 10; ++i) {
int *addr = (int*)(base + i * 4 + (1 << j));
kprintf("0x%08x=0x%04x\n", addr, (*addr)&0xFFFF);
}
}
*/
pic_init(); // init interrupt controller
cons_init(); // init the console
clock_init(); // init clock interrupt
// panic("init");
check_initrd();
const char *message = "(THU.CST) os is loading ...\n\n";
kprintf(message);
print_kerninfo();
#if 0
kprintf("EX\n");
__asm__ volatile("syscall");
kprintf("EX RET\n");
#endif
pmm_init(); // init physical memory management
vmm_init(); // init virtual memory management
sched_init();
proc_init(); // init process table
ide_init();
fs_init();
intr_enable(); // enable irq interrupt
//*(int*)(0x00124) = 0x432;
//asm volatile("divu $1, $1, $1");
cpu_idle();
}
void task_init()
{
intr_disable();
curr[0] = kmalloc(sizeof(task));
curr[0]->pid = next_pid++;
zeromem(&(curr[0]->r), sizeof(all_regs));
curr[0]->next = curr[0]; // Закольцовываем
curr[0]->state = TASK_RUNNING;
alloc_pages_user(TLS_ADDR, sizeof(thread_ls));
curr[0]->tls = TLS_ADDR;
int i;
for (i = 0; i < MAX_OPEN_FILES; i++)
curr[0]->files[i] = 0;
intr_enable();
}
/* Sleeps for approximately TICKS timer ticks. Interrupts must
be turned on. */
void
timer_sleep (int64_t ticks)
{
int64_t start = timer_ticks ();
struct thread *t = thread_current();
t->wakeup_time = start + ticks;
ASSERT (intr_get_level () == INTR_ON);
intr_disable();
list_insert_ordered(&wait_list,&(t->timer_list_elem),compare_threads_by_wakeup_time,NULL);
intr_enable();
sema_down(&(t->sema));
}
/* Sleeps for approximately TICKS timer ticks. Interrupts must
be turned on. */
void
timer_sleep (int64_t ticks)
{
int64_t start = timer_ticks ();
struct thread *cur = thread_current ();
cur->wakeup_time = start + ticks;
ASSERT (intr_get_level () == INTR_ON);
intr_disable ();
list_insert_ordered (&wait_list, &cur->wait_elem, compare_threads_by_wakeup_time, NULL);
intr_enable ();
// Lastly block ourselves
sema_down(&cur->wait_sema);
}
