void debug_init()
{
io_output_pin(DEBUG_1);
io_output_pin(DEBUG_2);
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
#ifdef ENABLE_SERIAL
io_set_pin(SERIAL_DEBUG);
io_output_pin(SERIAL_DEBUG);
#endif // ENABLE_SERIAL
}
void debug_blink(uint8_t count)
{
io_enable_pin(DEBUG_1, false);
io_enable_pin(DEBUG_2, true);
_delay_ms(DEBUG_BLINK_DELAY * 2);
for (; count > 0; count--) {
io_enable_pin(DEBUG_2, false);
_delay_ms(DEBUG_BLINK_DELAY);
io_enable_pin(DEBUG_2, true);
_delay_ms(DEBUG_BLINK_DELAY);
}
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
_delay_ms(DEBUG_BLINK_DELAY * 2);
}
void debug_blink2(uint8_t count)
{
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
_delay_ms(DEBUG_BLINK_DELAY * 2);
bool b = false;
for (; count > 0; count--) {
io_enable_pin(DEBUG_1, b);
io_enable_pin(DEBUG_2, b);
_delay_ms(DEBUG_BLINK_DELAY);
b = !b;
}
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
_delay_ms(DEBUG_BLINK_DELAY * 2);
}
void debug_wait(void)
{
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
bool b = false;
while (true)
{
io_enable_pin(DEBUG_1, b);
io_enable_pin(DEBUG_2, !b);
_delay_ms(DEBUG_BLINK_DELAY);
b = !b;
}
io_enable_pin(DEBUG_1, true);
io_enable_pin(DEBUG_2, true);
}
bool ltc3675_enable_reg(ltc3675_regulator_t reg, bool on)
{
//debug_blink2(reg + 1);
debug_log_ex("3675 ", false);
debug_log_byte_ex(reg, true);
// Sub-address: index of regulator
// Data: <default reg contents> | <enable>
bool result = false;
switch (reg)
{
case LTC3675_REG_1: // Master
case LTC3675_REG_2: // Slave
#ifdef HARDWIRE_ENABLE
io_enable_pin(PWR_EN1, on);
//break;
#else
//debug_blink2(reg + 1);
if (_ltc3675_toggle_reg(LTC3675_REG_BUCK1, LTC3675_DEFAULT_BUCK_REG_VAL, on) == false) {
//debug_blink2(reg + 1);
return false;
}
//debug_blink2(reg + 1);
#endif // HARDWIRE_ENABLE
result = (_ltc3675_is_pgood(LTC3675_Buck1_PGood) == on);
break;
case LTC3675_REG_3: // Master
case LTC3675_REG_4: // Slave
#ifdef HARDWIRE_ENABLE
io_enable_pin(PWR_EN3, on);
//break;
#else
if (_ltc3675_toggle_reg(LTC3675_REG_BUCK3, LTC3675_DEFAULT_BUCK_REG_VAL, on) == false)
return false;
#endif // HARDWIRE_ENABLE
result = (_ltc3675_is_pgood(LTC3675_Buck3_PGood) == on);
break;
case LTC3675_REG_5: // I2C only
if (_ltc3675_toggle_reg(LTC3675_REG_BOOST, LTC3675_DEFAULT_BOOST_REG_VAL, on) == false) // (Boost address, Default reg contents | Enable)
return false;
result = (_ltc3675_is_pgood(LTC3675_Boost_PGood) == on);
break;
case LTC3675_REG_6: // Single
#ifdef HARDWIRE_ENABLE
io_enable_pin(PWR_EN5, on);
//break;
#else
if (_ltc3675_toggle_reg(LTC3675_REG_BUCK_BOOST, LTC3675_DEFAULT_BUCK_BOOST_REG_VAL, on) == false)
return false;
#endif // HARDWIRE_ENABLE
result = (_ltc3675_is_pgood(LTC3675_BuckBoost_PGood) == on);
break;
//default:
// return false;
}
_debug_log((result ? "+" : "-"));
return result;
}
/*
static void _i2c_abort(io_pin_t sda, io_pin_t scl)
{
_i2c_abort_ex(sda, scl, false);
}
*/
static bool _i2c_write_byte_ex(io_pin_t sda, io_pin_t scl, uint8_t value, bool pull_up)
{
// Assumes:
// SDA output is LOW
// SCL output is LOW
for (uint8_t i = 0; i < 8; ++i)
{
bool b = ((value & (0x01 << (7 - i))) != 0x00); // MSB first
if (b)
{
if (pull_up)
{
// io_set_pin(sda); // This is bad (will drive line for a moment), but more stable than letting line float
io_input_pin(sda);
io_set_pin(sda);
}
else
io_input_pin(sda); // Release HIGH
if (io_test_pin(sda) == false)
{
debug_log("I2C:WR ");
debug_log_hex(sda);
debug_blink_rev(1);
return false;
}
}
else
{
if (pull_up)
{
// if (io_is_output(sda))
io_clear_pin(sda);
// else
// {
io_output_pin(sda); // [This is bad (will drive line for a moment), but more stable than letting line float]
// io_clear_pin(sda);
// }
}
else
{
io_enable_pin(sda, false);
io_output_pin(sda); // Drive LOW
}
}
///////////////////////////////
io_input_pin(scl); // Release HIGH
if (pull_up)
io_set_pin(scl);
I2C_DELAY(I2C_DEFAULT_SCL_HIGH_PERIOD);
#ifdef I2C_ALLOW_CLOCK_STRETCH
uint8_t retries = I2C_DEFAULT_MAX_BUS_RETRIES;
while (io_test_pin(scl) == false) // Clock stretch requested?
{
I2C_DELAY(I2C_DEFAULT_BUS_WAIT);
if (--retries == 0)
{
io_input_pin(sda); // Release HIGH
if (pull_up)
io_set_pin(sda);
debug_log_ex("I2C:STRTCH ", false);
debug_log_hex(scl);
debug_blink_rev(2);
return false;
}
}
#endif // I2C_ALLOW_CLOCK_STRETCH
if (pull_up)
io_clear_pin(scl);
io_output_pin(scl); // Drive LOW
I2C_DELAY(I2C_DEFAULT_SCL_LOW_PERIOD);
}
io_input_pin(sda); // Release HIGH
if (pull_up)
io_set_pin(sda); // Assuming letting line float won't confuse slave when pulling line LOW for ACK
I2C_DELAY(I2C_DEFAULT_SCL_HIGH_PERIOD);
uint8_t retries = 0;
while ((_i2c_disable_ack_check == false) && (io_test_pin(sda)))
{
if (retries == I2C_DEFAULT_MAX_ACK_RETRIES)
{
debug_log_ex("I2C:ACK ", false);
debug_log_hex_ex(sda, false);
debug_log_hex(value);
debug_blink_rev(3);
return false; // Will abort and not release bus - done by caller
}
++retries;
I2C_DELAY(I2C_DEFAULT_RETRY_DELAY);
}
// Clock away acknowledge
// if (pull_up)
// io_set_pin(scl);
io_input_pin(scl); // Release HIGH
if (pull_up)
io_set_pin(scl);
I2C_DELAY(I2C_DEFAULT_SCL_HIGH_PERIOD);
if (pull_up)
io_clear_pin(scl);
io_output_pin(scl); // Drive LOW
// if (pull_up)
// io_clear_pin(scl);
I2C_DELAY(I2C_DEFAULT_SCL_LOW_PERIOD);
return true;
}
void gpio_config_analog(gpio_port port, gpio_pin pin) {
io_enable_pin(port, pin);
io_setup(port, pin, CLK_50MHZ, IN, AF0, PUSHPULL, NOPULL);
}
void gpio_config_in(gpio_port port, gpio_pin pin, io_speed speed) {
io_enable_pin(port, pin);
io_setup(port, pin, speed, IN, AF0, PUSHPULL, NOPULL);
}
void gpio_config_out(gpio_port port, gpio_pin pin, io_speed speed, gpio_outtype outtype, gpio_pull pull) {
io_enable_pin(port, pin);
io_setup(port, pin, speed, OUT, AF0, outtype, pull);
}
void gpio_config(gpio_port port, gpio_pin pin, io_speed speed, gpio_mode mode, gpio_af af, gpio_outtype outtype, gpio_pull pull) {
io_enable_pin(port, pin);
io_setup(port, pin, speed, mode, af, outtype, pull);
}
void debug_set(io_pin_t pin, bool enable)
{
io_enable_pin(pin, !enable);
}
