static void nv40_instmem_wr32(struct nouveau_object *object, u64 addr, u32 data) { struct nv04_instmem_priv *priv = (void *)object; #ifdef __NetBSD__ bus_space_write_4(priv->iomemt, priv->iomemh, addr, data); #else iowrite32_native(data, priv->iomem + addr); #endif }
void _nouveau_fifo_channel_wr32(struct nouveau_object *object, u64 addr, u32 data) { struct nouveau_fifo_chan *chan = (void *)object; #ifdef __NetBSD__ bus_space_write_4(chan->bst, chan->bsh, addr, data); #else iowrite32_native(data, chan->user + addr); #endif }
void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) { bool is_iomem; u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); mem = &mem[index]; if (is_iomem) iowrite32_native(val, (void __force __iomem *)mem); else *mem = val; }
static void nv40_instmem_wr32(struct nouveau_object *object, u64 addr, u32 data) { struct nv04_instmem_priv *priv = (void *)object; iowrite32_native(data, priv->iomem + addr); }
static void nouveau_barobj_wr32(struct nouveau_object *object, u64 addr, u32 data) { struct nouveau_barobj *barobj = (void *)object; iowrite32_native(data, barobj->iomem + addr); }
static void nvkm_gpuobj_wr32_fast(struct nvkm_gpuobj *gpuobj, u32 offset, u32 data) { iowrite32_native(data, gpuobj->map + offset); }