int fd_program_attach_asm(struct fd_program *program,
enum fd_shader_type type, const char *src)
{
struct fd_shader *shader = get_shader(program, type);
int sizedwords;
if (shader->ir)
ir3_shader_destroy(shader->ir);
memset(shader, 0, sizeof(*shader));
shader->ir = fd_asm_parse(src);
if (!shader->ir) {
ERROR_MSG("parse failed");
return -1;
}
sizedwords = ir3_shader_assemble(shader->ir, shader->bin,
ARRAY_SIZE(shader->bin), &shader->info);
if (sizedwords <= 0) {
ERROR_MSG("assembler failed");
return -1;
}
shader->sizedwords = sizedwords;
return 0;
}
static void dump_info(struct ir3_shader_variant *so, const char *str)
{
uint32_t *bin;
const char *type = ir3_shader_stage(so->shader);
bin = ir3_shader_assemble(so, so->shader->compiler->gpu_id);
debug_printf("; %s: %s\n", type, str);
ir3_shader_disasm(so, bin, stdout);
free(bin);
}
static void dump_info(struct ir3_shader_variant *so, const char *str)
{
uint32_t *bin;
const char *type = (so->type == SHADER_VERTEX) ? "VERT" : "FRAG";
// TODO make gpu_id configurable on cmdline
bin = ir3_shader_assemble(so, 320);
debug_printf("; %s: %s\n", type, str);
ir3_shader_disasm(so, bin);
free(bin);
}
static void
assemble_shader(struct pipe_context *pctx, struct fd3_shader_stateobj *so)
{
struct fd_context *ctx = fd_context(pctx);
uint32_t sz, *bin;
bin = ir3_shader_assemble(so->ir, &so->info);
sz = so->info.sizedwords * 4;
so->bo = fd_bo_new(ctx->screen->dev, sz,
DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
DRM_FREEDRENO_GEM_TYPE_KMEM);
memcpy(fd_bo_map(so->bo), bin, sz);
free(bin);
so->instrlen = so->info.sizedwords / 8;
so->constlen = so->info.max_const + 1;
}
