static int __init nt35582_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_wvga=lcd_panel_probe();
if((LCD_NT35582_TRULY_WVGA!=lcd_panel_wvga)&&
(LCD_NT35582_BYD_WVGA!=lcd_panel_wvga))
{
return 0;
}
MDDI_LCD_DEBUG("------nt35582_init------\n");
ret = platform_driver_register(&this_driver);
if (!ret) {
pinfo = &nt35582_panel_data.panel_info;
pinfo->xres = 480;
pinfo->yres = 800;
pinfo->type = MDDI_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR;
pinfo->wait_cycle = 0;
/* Set MDDI clk 192MHz,set 24bit per pixel,
* adjust the start of data to sync with vsync signal
*/
/* change 24bit into 16bit */
pinfo->bpp = 16;
pinfo->fb_num = 2;
pinfo->clk_rate = 192000000;
pinfo->clk_min = 192000000;
pinfo->clk_max = 192000000;
MDDI_LCD_DEBUG("%s: BYD LCD and Truly LCD,set MDDI_CLK=%d \n",__func__, pinfo->clk_rate);
#ifdef CONFIG_FB_MSM_DEFAULT_DEPTH_RGB565
pinfo->lcd.vsync_enable = FALSE;
#else
pinfo->lcd.vsync_enable = TRUE;
#endif
/* Reduce the fps,sync depend on the vsync signal*/
pinfo->lcd.refx100 = 4000;
pinfo->lcd.v_back_porch = 0;
pinfo->lcd.v_front_porch = 0;
pinfo->lcd.v_pulse_width = 22;
pinfo->lcd.hw_vsync_mode = TRUE;
pinfo->lcd.vsync_notifier_period = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
{
platform_driver_unregister(&this_driver);
MDDI_LCD_DEBUG("%s: Failed on platform_device_register(): rc=%d \n",__func__, ret);
}
}
return ret;
}
static int __init lcdc_s6d74a0_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
#ifdef CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM
//if (msm_fb_detect_client("lcdc_s6d74a0_hvga"))
// return 0;
#endif
LCD_DEBUG("ENTER lcdc_s6d74a0_panel_init\n");
lcd_panel_hvga = lcd_panel_probe();
if((LCD_S6D74A0_SAMSUNG_HVGA != lcd_panel_hvga) && \
(msm_fb_detect_client("lcdc_s6d74a0_hvga"))
)
{
return 0;
}
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &s6d74a0_panel_data.panel_info;
pinfo->xres = 320;
pinfo->yres = 480;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 24;
pinfo->fb_num = 2;
/*modify HVGA LCD pclk frequency to 8.192MHz*/
/*the pixel clk is different for different Resolution LCD*/
//pinfo->clk_rate = 24500000; /*for VGA pixel clk*/
//pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/
pinfo->clk_rate = 9660000;
//pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/
pinfo->lcdc.h_back_porch = 7;
pinfo->lcdc.h_front_porch = 4;
pinfo->lcdc.h_pulse_width = 4;
pinfo->lcdc.v_back_porch = 2;
pinfo->lcdc.v_front_porch = 4;
pinfo->lcdc.v_pulse_width = 2;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
LCD_DEBUG(" lcdc_s6d74a0_panel_init OK \n");
return ret;
}
static int __init nt35410_hvga_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_hvga = lcd_panel_probe();
if((LCD_NT35410_CHIMEI_HVGA != lcd_panel_hvga) && \
(msm_fb_detect_client(lCD_DRIVER_NAME))
)
{
return 0;
}
LCD_DEBUG(" lcd_type=%s, lcd_panel_hvga = %d\n", lCD_DRIVER_NAME, lcd_panel_hvga);
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &nt35410_hvga_panel_data.panel_info;
pinfo->xres = 320;
pinfo->yres = 480;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL;
pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL;
if(LCD_NT35410_CHIMEI_HVGA == lcd_panel_hvga)
{
pinfo->clk_rate = 9660 * 1000; /*for HVGA pixel clk*/
}
else
{
pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/
}
pinfo->lcdc.h_back_porch = 18;
pinfo->lcdc.h_front_porch = 30;
pinfo->lcdc.h_pulse_width = 4;
pinfo->lcdc.v_back_porch = 3;
pinfo->lcdc.v_front_porch = 55;
pinfo->lcdc.v_pulse_width = 3;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
static int __init hx8357a_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_qvga = lcd_panel_probe();
if((LCD_HX8357A_BYD_QVGA != lcd_panel_qvga) && \
(LCD_HX8368A_SEIKO_QVGA != lcd_panel_qvga) && \
(msm_fb_detect_client(lCD_DRIVER_NAME))
)
{
return 0;
}
LCD_DEBUG(" lcd_type=%s, lcd_panel_qvga = %d\n", lCD_DRIVER_NAME, lcd_panel_qvga);
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &hx8357a_panel_data.panel_info;
pinfo->xres = 320;
pinfo->yres = 240;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL;
pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL;
pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/
pinfo->lcdc.h_back_porch = 2;
pinfo->lcdc.h_front_porch = 2;
pinfo->lcdc.h_pulse_width = 2;
pinfo->lcdc.v_back_porch = 2;
pinfo->lcdc.v_front_porch = 2;
pinfo->lcdc.v_pulse_width = 2;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
static int __init lcdc_hx8357b_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_hvga = lcd_panel_probe();
printk(KERN_INFO "%s:lcd_panel_hvga = %d\n", __func__, lcd_panel_hvga);
if((LCD_HX8357B_TIANMA_HVGA != lcd_panel_hvga) && \
(msm_fb_detect_client("lcdc_hx8357b_tm"))
)
{
return 0;
}
ret = platform_driver_register(&this_driver);
printk(KERN_INFO "%s:register.ret = %d\n", __func__, ret);
if (ret)
return ret;
pinfo = &hx8357b_panel_data.panel_info;
pinfo->xres = 320;
pinfo->yres = 480;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
/*the pixel clk is different for different Resolution LCD*/
pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/
pinfo->lcdc.h_back_porch = 7;
pinfo->lcdc.h_front_porch = 5;
pinfo->lcdc.h_pulse_width = 4;
pinfo->lcdc.v_back_porch = 2;
pinfo->lcdc.v_front_porch = 4;
pinfo->lcdc.v_pulse_width = 2;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
static int __init lcdc_ili9325_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_qvga = lcd_panel_probe();
if((LCD_ILI9325_INNOLUX_QVGA != lcd_panel_qvga) && \
(LCD_ILI9325_BYD_QVGA != lcd_panel_qvga) && \
(LCD_ILI9325_WINTEK_QVGA != lcd_panel_qvga) && \
(msm_fb_detect_client("lcdc_ili9325_qvga"))
)
{
return 0;
}
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &ili9325_panel_data.panel_info;
pinfo->xres = 240;
pinfo->yres = 320;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
/*the pixel clk is different for different Resolution LCD*/
//pinfo->clk_rate = 24500000; /*for VGA pixel clk*/
pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/
pinfo->lcdc.h_back_porch = 5;
pinfo->lcdc.h_front_porch = 5;
pinfo->lcdc.h_pulse_width = 5;
pinfo->lcdc.v_back_porch = 3;
pinfo->lcdc.v_front_porch = 3;
pinfo->lcdc.v_pulse_width = 3;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
static int __init lcd_ili9331b_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_qvga = lcd_panel_probe();
if(LCD_ILI9331B_TIANMA_QVGA != lcd_panel_qvga)
{
return 0;
}
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &ili9331b_panel_data.panel_info;
pinfo->xres = 240;
pinfo->yres = 320;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
pinfo->clk_rate = 6125000; /*for QVGA pixel clk*/
pinfo->lcdc.h_back_porch = 7;
pinfo->lcdc.h_front_porch = 4;
pinfo->lcdc.h_pulse_width = 4;
pinfo->lcdc.v_back_porch = 1;
pinfo->lcdc.v_front_porch = 2;
pinfo->lcdc.v_pulse_width = 1;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
char *get_lcd_panel_name(void)
{
lcd_panel_type hw_lcd_panel = LCD_NONE;
char *pname = NULL;
hw_lcd_panel = lcd_panel_probe();
switch (hw_lcd_panel)
{
case LCD_S6D74A0_SAMSUNG_HVGA:
pname = "SAMSUNG S6D74A0";
break;
case LCD_ILI9325_INNOLUX_QVGA:
pname = "INNOLUX ILI9325";
break;
case LCD_ILI9325_BYD_QVGA:
pname = "BYD ILI9325";
break;
case LCD_ILI9325_WINTEK_QVGA:
pname = "WINTEK ILI9325";
break;
case LCD_SPFD5408B_KGM_QVGA:
pname = "KGM SPFD5408B";
break;
default:
pname = "UNKNOWN LCD";
break;
}
return pname;
}
static int __init hx8357a_hvga_panel_init(void)
{
int ret;
struct msm_panel_info *pinfo;
lcd_panel_hvga = lcd_panel_probe();
if((LCD_HX8357A_TRULY_HVGA != lcd_panel_hvga) && \
(LCD_HX8357A_WINTEK_HVGA != lcd_panel_hvga) && \
(msm_fb_detect_client(lCD_DRIVER_NAME))
)
{
return 0;
}
LCD_DEBUG(" lcd_type=%s, lcd_panel_hvga = %d\n", lCD_DRIVER_NAME, lcd_panel_hvga);
ret = platform_driver_register(&this_driver);
if (ret)
return ret;
pinfo = &hx8357a_hvga_panel_data.panel_info;
pinfo->xres = 320;
pinfo->yres = 480;
pinfo->type = LCDC_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->wait_cycle = 0;
pinfo->bpp = 18;
pinfo->fb_num = 2;
pinfo->bl_max = LCD_MAX_BACKLIGHT_LEVEL;
pinfo->bl_min = LCD_MIN_BACKLIGHT_LEVEL;
if(LCD_HX8357A_TRULY_HVGA == lcd_panel_hvga)
{
/*modify HVGA LCD pclk frequency to 16.384MHz*/
pinfo->clk_rate = 16384000; /*for HVGA pixel clk*/
}
else if(LCD_HX8357A_WINTEK_HVGA == lcd_panel_hvga)
{
/*modify HVGA LCD pclk frequency to 8.192MHz*/
pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/
}
else
{
/*default HVGA LCD pclk frequency to 8.192MHz*/
pinfo->clk_rate = 8192000; /*for HVGA pixel clk*/
}
pinfo->lcdc.h_back_porch = 7;
pinfo->lcdc.h_front_porch = 4;
pinfo->lcdc.h_pulse_width = 4;
pinfo->lcdc.v_back_porch = 2;
pinfo->lcdc.v_front_porch = 4;
pinfo->lcdc.v_pulse_width = 2;
pinfo->lcdc.border_clr = 0; /* blk */
pinfo->lcdc.underflow_clr = 0xff; /* blue */
pinfo->lcdc.hsync_skew = 0;
ret = platform_device_register(&this_device);
if (ret)
platform_driver_unregister(&this_driver);
return ret;
}
static int __init nt35510_init_type2(void)
{
int ret = 0;
struct msm_panel_info *pinfo = NULL;
bpp_type bpp = MDDI_OUT_16BPP;
mddi_type mddi_port_type = mddi_port_type_probe();
lcd_panel_wvga=lcd_panel_probe();
if(LCD_NT35510_ALPHA_SI_WVGA_TYPE2 != lcd_panel_wvga)
{
return 0;
}
MDDI_LCD_DEBUG("%s:------nt35510_init_type2------\n",__func__);
/* Select which bpp accroding MDDI port type */
if(MDDI_TYPE1 == mddi_port_type)
{
bpp = MDDI_OUT_16BPP;
}
else if(MDDI_TYPE2 == mddi_port_type)
{
bpp = MDDI_OUT_24BPP;
}
else
{
bpp = MDDI_OUT_16BPP;
}
ret = platform_driver_register(&this_driver);
if (!ret)
{
pinfo = &nt35510_panel_data_type2.panel_info;
pinfo->xres = 480;
pinfo->yres = 800;
pinfo->type = MDDI_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR;
pinfo->wait_cycle = 0;
pinfo->bpp = (uint32)bpp;
pinfo->fb_num = 2;
pinfo->clk_rate = 192000000;
pinfo->clk_min = 192000000;
pinfo->clk_max = 192000000;
pinfo->lcd.vsync_enable = TRUE;
pinfo->lcd.refx100 = 5500;
pinfo->lcd.v_back_porch = 0;
pinfo->lcd.v_front_porch = 0;
pinfo->lcd.v_pulse_width = 22;
pinfo->lcd.hw_vsync_mode = TRUE;
pinfo->lcd.vsync_notifier_period = 0;
pinfo->bl_max = 255;
ret = platform_device_register(&this_device);
if (ret)
{
platform_driver_unregister(&this_driver);
}
}
return ret;
}
/* < BU5D10320 lijianzhao 20100521 begin */
static int __init nt35582_init(void)
{
int ret;
struct msm_panel_info *pinfo;
/*<BU5D09397 lijuan 00152865, 20100506 begin*/
/*< DTS2010122802758 lijianzhao 20101229 begin */
lcd_panel_wvga=lcd_panel_probe();
if((LCD_NT35582_TRULY_WVGA!=lcd_panel_wvga)&&
(LCD_NT35582_BYD_WVGA!=lcd_panel_wvga))
{
return 0;
}
/* DTS2010122802758 lijianzhao 20101229 end >*/
/*BU5D09397 lijuan 00152865, 20100506 end>*/
MDDI_LCD_DEBUG("------nt35582_init------\n");
ret = platform_driver_register(&this_driver);
if (!ret) {
pinfo = &nt35582_panel_data.panel_info;
pinfo->xres = 480;
pinfo->yres = 800;
pinfo->type = MDDI_PANEL;
pinfo->pdest = DISPLAY_1;
pinfo->mddi.vdopkt = MDDI_DEFAULT_PRIM_PIX_ATTR;
pinfo->wait_cycle = 0;
/*< DTS2010071503480 lijianzhao 20100715 begin */
/* Set MDDI clk 192MHz,set 24bit per pixel,
* adjust the start of data to sync with vsync signal
*/
/*< DTS2010093000641 lijianzhao 20100930 begin */
/* change 24bit into 16bit */
pinfo->bpp = 16;
/* DTS2010093000641 lijianzhao 20100930 end >*/
pinfo->fb_num = 2;
/*< DTS2010080603169 lijianzhao 20100819 begin */
/* Remove the case:DTS2010080602421,BYD and Truly LCD use 192M clk */
pinfo->clk_rate = 192000000;
pinfo->clk_min = 192000000;
pinfo->clk_max = 192000000;
MDDI_LCD_DEBUG("%s: BYD LCD and Truly LCD,set MDDI_CLK=%d \n",__func__, pinfo->clk_rate);
pinfo->lcd.vsync_enable = TRUE;
/*< DTS2010111203128 lijianzhao 20101112 begin */
/* Reduce the fps,sync depend on the vsync signal*/
pinfo->lcd.refx100 = 4000;
/* DTS2010111203128 lijianzhao 20101112 end >*/
/* DTS2010080603169 lijianzhao 20100819 end >*/
pinfo->lcd.v_back_porch = 0;
pinfo->lcd.v_front_porch = 0;
pinfo->lcd.v_pulse_width = 22;
/* DTS2010071503480 lijianzhao 20100715 end >*/
pinfo->lcd.hw_vsync_mode = TRUE;
pinfo->lcd.vsync_notifier_period = 0;
/*<BU5D09482 sibingsong 20100507 begin*/
pinfo->bl_max = 255;
/*BU5D09482 sibingsong 20100507 end>*/
ret = platform_device_register(&this_device);
if (ret)
{
platform_driver_unregister(&this_driver);
MDDI_LCD_DEBUG("%s: Failed on platform_device_register(): rc=%d \n",__func__, ret);
}
}
return ret;
}
