/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
startrtclock();
#if NBIOS32 > 0
bios32_init();
platform_init();
#endif
x86_64_proc0_tss_ldt_init();
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
#ifdef INTRDEBUG
intr_printconfig();
#endif
#if NIOAPIC > 0
ioapic_enable();
#endif
#ifdef MULTIPROCESSOR
cpu_init_idle_lwps();
#endif
spl0();
lcr8(0);
}
/*
* Determine i/o configuration for a machine.
*/
void
cpu_configure(void)
{
#if NBIOS32 > 0
bios32_init();
#endif
x86_64_proc0_tss_ldt_init();
if (config_rootfound("mainbus", NULL) == NULL)
panic("configure: mainbus not configured");
intr_printconfig();
#if NIOAPIC > 0
lapic_set_lvt();
ioapic_enable();
#endif
#ifdef MULTIPROCESSOR
cpu_init_idle_pcbs();
#endif
lcr8(0);
spl0();
cold = 0;
/*
* At this point the RNG is running, and if FSXR is set we can
* use it. Here we setup a periodic timeout to collect the data.
*/
if (viac3_rnd_present) {
timeout_set(&viac3_rnd_tmo, viac3_rnd, &viac3_rnd_tmo);
viac3_rnd(&viac3_rnd_tmo);
}
if (has_rdrand) {
timeout_set(&rdrand_tmo, rdrand, &rdrand_tmo);
rdrand(&rdrand_tmo);
}
#ifdef CRYPTO
/*
* Also, if the chip has crypto available, enable it.
*/
if (amd64_has_xcrypt)
viac3_crypto_setup();
if (amd64_has_aesni)
aesni_setup();
#endif
}
/*
* The CPU ends up here when its ready to run
* This is called from code in mptramp.s; at this point, we are running
* in the idle pcb/idle stack of the new cpu. When this function returns,
* this processor will enter the idle loop and start looking for work.
*
* XXX should share some of this with init386 in machdep.c
*/
void
cpu_hatch(void *v)
{
struct cpu_info *ci = (struct cpu_info *)v;
int s;
cpu_init_msrs(ci);
cpu_probe_features(ci);
cpu_feature &= ci->ci_feature_flags;
#ifdef DEBUG
if (ci->ci_flags & CPUF_PRESENT)
panic("%s: already running!?", ci->ci_dev->dv_xname);
#endif
ci->ci_flags |= CPUF_PRESENT;
lapic_enable();
lapic_initclocks();
while ((ci->ci_flags & CPUF_GO) == 0)
delay(10);
#ifdef DEBUG
if (ci->ci_flags & CPUF_RUNNING)
panic("%s: already running!?", ci->ci_dev->dv_xname);
#endif
lcr0(ci->ci_idle_pcb->pcb_cr0);
cpu_init_idt();
lapic_set_lvt();
gdt_init_cpu(ci);
fpuinit(ci);
lldt(GSYSSEL(GLDT_SEL, SEL_KPL));
cpu_init(ci);
s = splhigh();
lcr8(0);
enable_intr();
microuptime(&ci->ci_schedstate.spc_runtime);
splx(s);
SCHED_LOCK(s);
cpu_switchto(NULL, sched_chooseproc());
}
/*
* The CPU ends up here when its ready to run
* This is called from code in mptramp.s; at this point, we are running
* in the idle pcb/idle stack of the new cpu. When this function returns,
* this processor will enter the idle loop and start looking for work.
*
* XXX should share some of this with init386 in machdep.c
*/
void
cpu_hatch(void *v)
{
struct cpu_info *ci = (struct cpu_info *)v;
int s;
cpu_init_msrs(ci);
#ifdef DEBUG
if (ci->ci_flags & CPUF_PRESENT)
panic("%s: already running!?", ci->ci_dev->dv_xname);
#endif
ci->ci_flags |= CPUF_PRESENT;
lapic_enable();
lapic_startclock();
if ((ci->ci_flags & CPUF_IDENTIFIED) == 0) {
/*
* We need to wait until we can identify, otherwise dmesg
* output will be messy.
*/
while ((ci->ci_flags & CPUF_IDENTIFY) == 0)
delay(10);
identifycpu(ci);
/* Signal we're done */
atomic_clearbits_int(&ci->ci_flags, CPUF_IDENTIFY);
/* Prevent identifycpu() from running again */
atomic_setbits_int(&ci->ci_flags, CPUF_IDENTIFIED);
}
while ((ci->ci_flags & CPUF_GO) == 0)
delay(10);
#ifdef DEBUG
if (ci->ci_flags & CPUF_RUNNING)
panic("%s: already running!?", ci->ci_dev->dv_xname);
#endif
lcr0(ci->ci_idle_pcb->pcb_cr0);
cpu_init_idt();
lapic_set_lvt();
gdt_init_cpu(ci);
fpuinit(ci);
lldt(0);
cpu_init(ci);
s = splhigh();
lcr8(0);
enable_intr();
microuptime(&ci->ci_schedstate.spc_runtime);
splx(s);
SCHED_LOCK(s);
cpu_switchto(NULL, sched_chooseproc());
}
