void decision_complete(void)
{
#if 0
msg_arrives.dec = 1;
if(status_gnss.ant_status == 2) {
led_mode(LED_MODE_GNSS_EANT);
} else if(geoinfo.mode != GEOM_NONE) {
status_gnss.valid = 1;
led_mode(LED_MODE_GNSS_VALID);
} else {
status_gnss.valid = 0;
if(geoinfo.sats.visible)
led_mode(LED_MODE_GNSS_RECV);
else
led_mode(LED_MODE_GNSS_OK);
}
#endif
Tgeo_packed pgeo;
geo_pack(&pgeo, &geoinfo);
#if 0
awc_send_msg(AWC_NAV, &pgeo, sizeof(pgeo));
DEBUG(GNSS, NORMAL, "GEO ");
DBGPRINTF_GEO(GNSS, NORMAL, &geoinfo);
DEBUGCRLF(GNSS, NORMAL);
#endif
}
unsigned char read_hv(unsigned char channel)
{
float xdata hv;
/* read voltage channel */
if (!adc_read(channel*2, &hv))
return 0;
/* convert to HV */
hv *= DIVIDER;
/* apply calibration */
hv = hv * user_data[channel].adc_gain + user_data[channel].adc_offset;
/* 0.01 resolution */
hv = floor(hv * 100) / 100.0;
led_mode(channel, !(hv > 40));
DISABLE_INTERRUPTS;
user_data[channel].u_meas = hv;
ENABLE_INTERRUPTS;
return 1;
}
// Subscriber Operation - led_state_sub
//# Start led_state_sub_operation Marker
void led_controller::led_state_sub_operation(const sequential_leds_app::led_state::ConstPtr& received_data)
{
#ifdef USE_ROSMOD
comp_queue.ROSMOD_LOGGER->log("DEBUG", "Entering led_controller::led_state_sub_operation");
#endif
// Business Logic for led_state_sub_operation
if ( received_data->led_num == led_num )
{
if (useGPIO)
led_mode(received_data->mode,
received_data->numLEDs,
received_data->delay);
if (publish)
{
sequential_leds_app::led_state nextLEDState;
nextLEDState.numLEDs = received_data->numLEDs;
nextLEDState.delay = received_data->delay;
nextLEDState.mode = received_data->mode;
if (!invert)
nextLEDState.led_num = led_num + 1;
else
nextLEDState.led_num = 0;
led_state_pub.publish(nextLEDState);
}
}
#ifdef USE_ROSMOD
comp_queue.ROSMOD_LOGGER->log("DEBUG", "Exiting led_controller::led_state_sub_operation");
#endif
}
Item *led(List *expression)
{
uint8_t led = eval_as_string(second(expression))[0] == 'R' ? 0 : 1;
Item *value = third(expression);
led_mode(led, value ? LEDMANUAL : LEDSTATE_OFF);
set_out(leds[led], eval_as_uint8(value));
return 0;
}
void setup(void)
{
unsigned char i;
watchdog_disable();
XBR0 = 0x01; // Enable RX/TX
XBR1 = 0x40; // Enable crossbar
P0MDOUT = 0x90; // P0.4: TX, P0.7: RS485 enable Push/Pull
P0SKIP = 0x0C; // Skip P0.2&3 for Xtal
P0MDIN = 0xF3; // P0.2&3 as analog input for Xtal
P2MDOUT = 0x02; // P2.1 for external watchdog
OSCXCN = 0;
OSCICN |= 0x03; // Configure internal oscillator for
// its maximum frequency
CLKMUL = 0x00; // Select internal oscillator as
// input to clock multiplier
CLKMUL |= 0x80; // Enable clock multiplier
for (i=0 ; i<100 ; i++); // Delay for >5us
CLKMUL |= 0xC0; // Initialize the clock multiplier
while(!(CLKMUL & 0x20)); // Wait for multiplier to lock
CLKSEL |= USB_4X_CLOCK; // Select USB clock
CLKSEL |= SYS_INT_OSC; // Select system clock
VDM0CN = 0x80; // VDD monitor enable
while ((VDM0CN & 0x40)==0); // wait for VDD monitor to stabilize
/* start system clock */
sysclock_init();
/* init memory */
RS485_ENABLE = 0;
/* initialize UART0 */
uart_init(0, BD_115200);
PS0 = 1; // serial interrupt high priority
/* Blink LEDs */
led_blink(0, 3, 150);
led_blink(1, 3, 150);
/* invert first LED */
led_mode(0, 1);
/* dummy to prevent linker error */
delay_us(1);
}
void user_init(unsigned char init)
{
unsigned char i;
unsigned short address;
/* all output open drain */
P1MDOUT = 0x00;
P2MDOUT = 0x00;
/* initial nonzero EEPROM values */
if (init) {
memset(user_data, 0, sizeof(user_data));
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].ramp_up = 300;
user_data[i].ramp_down = 300;
user_data[i].u_limit = MAX_VOLTAGE;
user_data[i].i_limit = MAX_CURRENT;
user_data[i].ri_limit = MAX_CURRENT;
user_data[i].trip_time = 10;
user_data[i].adc_gain = 1;
user_data[i].dac_gain = 1;
user_data[i].cur_gain = 1;
}
}
/* default control register */
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].control = CONTROL_REGULATION;
user_data[i].status = 0;
user_data[i].u_demand = 0;
user_data[i].trip_cnt = 0;
/* check maximum ratings */
if (user_data[i].u_limit > MAX_VOLTAGE)
user_data[i].u_limit = MAX_VOLTAGE;
if (user_data[i].i_limit > MAX_CURRENT && user_data[i].i_limit != 9999)
user_data[i].i_limit = MAX_CURRENT;
u_actual[i] = 0;
t_ramp[i] = time();
}
/* jumper and address bits as input */
JU1 = 1;
JU2 = 1;
SW1 = 1;
SW2 = 1;
GA_A0 = 1;
GA_A1 = 1;
GA_A2 = 1;
GA_A3 = 1;
GA_A4 = 1;
GA_A5 = 1;
/* read six address bits */
address = GA_A5;
address = (address << 1) | GA_A4;
address = (address << 1) | GA_A3;
address = (address << 1) | GA_A2;
address = (address << 1) | GA_A1;
address = (address << 1) | GA_A0;
/* each device has 5 channels */
address *= 5;
/* keep high byte of node address */
address |= (sys_info.node_addr & 0xFF00);
sys_info.node_addr = address;
/* set default group address */
if (sys_info.group_addr == 0xFFFF)
sys_info.group_addr = 500;
/* sample initial state of switch */
old_sw1 = SW1;
if (old_sw1)
for (i=0 ; i<N_HV_CHN ; i++)
user_data[i].status |= STATUS_DISABLED;
/* set-up DAC & ADC */
DAC_CLR = 1;
ADC_NRES = 1;
ADC_NRDY = 1; // input
ADC_DIN = 1; // input
delay_ms(300); // wait for the ADC to come up after power on
reset_adc();
#ifdef HARDWARE_TRIP
/* reset current trip FF's */
reset_hardware_trip();
#else
/* disable hardware trip FF's */
write_adc(REG_IOCONTROL, (1 << 4));
#endif
/* force update */
for (i=0 ; i<N_HV_CHN ; i++)
chn_bits[i] = DEMAND_CHANGED | CUR_LIMIT_CHANGED;
/* LED normally off (inverted) */
for (i=0 ; i<N_HV_CHN ; i++)
led_mode(i, 1);
/* initially, trips are enabled */
trip_reset = 1; // reset once
trip_disable = 0; // trip initially enabled
for (i=0 ; i<N_HV_CHN ; i++)
trip_time[i] = 0;
}
// Initialization Function
//# Start Init Marker
void led_controller::init_timer_operation(const NAMESPACE::TimerEvent& event)
{
#ifdef USE_ROSMOD
comp_queue.ROSMOD_LOGGER->log("DEBUG", "Entering led_controller::init_timer_operation");
#endif
// Initialize Here
led_num = 0;
useGPIO = true;
invert = false;
publish = false;
unsigned int numLEDs = 4; // if using USR LEDs, use 0-3, else use real pin values
std::string mode = "toggle";
float delayTime;
bool start = false;
for (int i = 0; i < node_argc; i++)
{
if (!strcmp(node_argv[i], "--numleds"))
{
numLEDs = atoi(node_argv[i+1]);
}
if (!strcmp(node_argv[i], "--led_num"))
{
led_num = atoi(node_argv[i+1]);
}
if (!strcmp(node_argv[i], "--end"))
{
invert = true;
}
if (!strcmp(node_argv[i], "--start"))
{
start = true;
}
if (!strcmp(node_argv[i], "--nogpio"))
{
useGPIO = false;
}
if (!strcmp(node_argv[i], "--delay"))
{
delayTime = atof(node_argv[i+1]);
}
if (!strcmp(node_argv[i], "--publish"))
{
publish = true;
}
if (!strcmp(node_argv[i], "--mode"))
{
mode = node_argv[i+1];
}
}
if (start)
{
if (useGPIO)
led_mode(mode, numLEDs, delayTime);
sequential_leds_app::led_state nextLEDState;
nextLEDState.numLEDs = numLEDs;
nextLEDState.led_num = led_num + 1;
nextLEDState.delay = delayTime;
nextLEDState.mode = mode;
led_state_pub.publish(nextLEDState);
}
if (useGPIO)
for (int i = 0; i < numLEDs; i++)
led_set_value(i, LOW);
// Stop Init Timer
init_timer.stop();
#ifdef USE_ROSMOD
comp_queue.ROSMOD_LOGGER->log("DEBUG", "Exiting led_controller::init_timer_operation");
#endif
}
void user_init(unsigned char init)
{
unsigned char i;
P2MDOUT = 0xF0; // P2.4-7: enable Push/Pull for LEDs
P3MDOUT = 0;
/* initial nonzero EEPROM values */
if (init) {
memset(user_data, 0, sizeof(user_data));
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].ramp_up = 300;
user_data[i].ramp_down = 300;
user_data[i].u_limit = MAX_VOLTAGE;
user_data[i].i_limit = MAX_CURRENT;
user_data[i].ri_limit = MAX_CURRENT;
user_data[i].trip_time = 10;
user_data[i].adc_gain = 1;
user_data[i].dac_gain = 1;
user_data[i].cur_gain = 1;
}
}
/* default control register */
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].control = CONTROL_REGULATION;
user_data[i].status = 0;
user_data[i].u_demand = 0;
user_data[i].trip_cnt = 0;
/* check maximum ratings */
if (user_data[i].u_limit > MAX_VOLTAGE)
user_data[i].u_limit = MAX_VOLTAGE;
if (user_data[i].i_limit > MAX_CURRENT && user_data[i].i_limit != 9999)
user_data[i].i_limit = MAX_CURRENT;
u_actual[i] = 0;
t_ramp[i] = time();
}
/* set default group address */
if (sys_info.group_addr == 0xFFFF)
sys_info.group_addr = 400;
/* jumper as input */
JU0 = 1;
JU1 = 1;
JU2 = 1;
/* read node configuration */
for (i=0 ; i<N_HV_CHN ; i++) {
if (JU0 == 0)
user_data[i].status |= STATUS_NEGATIVE;
else
user_data[i].status &= ~STATUS_NEGATIVE;
if (JU1 == 0)
user_data[i].status |= STATUS_LOWCUR;
else
user_data[i].status &= ~STATUS_LOWCUR;
}
/* set-up DAC & ADC */
DAC_CLR = 1;
ADC_NRES = 1;
ADC_NRDY = 1; // input
ADC_DIN = 1; // input
/* reset and wait for start-up of ADC */
ADC_NRES = 0;
delay_ms(100);
ADC_NRES = 1;
delay_ms(300);
write_adc(REG_FILTER, ADC_SF_VALUE);
/* force update */
for (i=0 ; i<N_HV_CHN ; i++)
chn_bits[i] = DEMAND_CHANGED | CUR_LIMIT_CHANGED;
/* LED normally off (inverted) */
for (i=0 ; i<N_HV_CHN ; i++)
led_mode(i, 1);
for (i=0 ; i<N_HV_CHN ; i++)
trip_time[i] = 0;
}
void user_init(unsigned char init)
{
unsigned char i;
unsigned short value;
/* configure crossbar */
SFRPAGE = CONFIG_PAGE;
XBR0 = 0x04; // Enable UART0
XBR1 = 0x14; // Enable INT0 and INT1
XBR2 = 0x40; // Enable crossbar
/* enable external interrupts */
SFRPAGE = TIMER01_PAGE;
PX0 = 1; // INT0 high priority
PX1 = 1; // INT1 high priority
IT0 = 1; // INT0 is edge sensitive
IT1 = 1; // INT1 is edge sensitive
IE0 = 0; // Clear pending INT0
IE1 = 0; // Clear pending INT1
EX0 = 0; // INTs will be enabled
EX1 = 0; // later in hv_on()
SFRPAGE = CONFIG_PAGE;
P0MDOUT = 0x11; // P0.0: TX = Push Pull, P0.4: WD
P1MDOUT = 0x00; // all open drain
P2MDOUT = 0x60; // P2.5/6: HV_POWER
P3MDOUT = 0x00;
/* initial nonzero EEPROM values */
if (init) {
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].u_demand = 0;
user_data[i].trip_cnt = 0;
user_data[i].ramp_up = 100;
user_data[i].ramp_down = 100;
user_data[i].u_limit = MAX_VOLTAGE;
user_data[i].i_limit = MAX_CURRENT;
user_data[i].ri_limit = MAX_CURRENT;
user_data[i].trip_max = 0;
user_data[i].trip_time = 10;
user_data[i].adc_gain = 1;
user_data[i].adc_offset = 0;
user_data[i].dac_gain = 1;
user_data[i].dac_offset = 0;
user_data[i].cur_vgain = 0;
user_data[i].cur_gain = 1;
user_data[i].cur_offset = 0;
}
}
/* default control register */
for (i=0 ; i<N_HV_CHN ; i++) {
user_data[i].control = CONTROL_REGULATION;
user_data[i].status = 0;
user_data[i].u_demand = 0;
user_data[i].trip_cnt = 0;
/* check maximum ratings */
if (user_data[i].u_limit > MAX_VOLTAGE)
user_data[i].u_limit = MAX_VOLTAGE;
if (user_data[i].i_limit > MAX_CURRENT && user_data[i].i_limit != 9999)
user_data[i].i_limit = MAX_CURRENT;
if (user_data[i].ri_limit > MAX_CURRENT)
user_data[i].ri_limit = MAX_CURRENT;
u_actual[i] = 0;
t_ramp[i] = time();
/* read pos/neg jumper */
JU1 = 1;
if (JU1 == 0)
user_data[i].status |= STATUS_NEGATIVE;
else
user_data[i].status &= ~STATUS_NEGATIVE;
user_data[i].status |= STATUS_LOWCUR;
}
/* switch off HVs */
hv_on(0, 0);
hv_on(1, 0);
/* HV power reset */
HV1_POWER = 0;
HV2_POWER = 0;
delay_ms(400);
HV1_POWER = 1;
HV2_POWER = 1;
/* set default group address */
if (sys_info.group_addr == 0xFFFF)
sys_info.group_addr = 200;
/* get address from crate backplane read through internal ADC */
SFRPAGE = LEGACY_PAGE;
REF0CN = 0x03; // use internal voltage reference
AMX0CF = 0x00; // select single ended analog inputs
ADC0CF = 0x98; // ADC Clk 2.5 MHz @ 98 MHz, gain 1
ADC0CN = 0x80; // enable ADC
SFRPAGE = ADC0_PAGE;
sys_info.node_addr = 0;
for (i=0 ; i<7 ; i++) {
AMX0SL = i; // set multiplexer
delay_ms(10); // wait for settling time
DISABLE_INTERRUPTS;
AD0INT = 0;
AD0BUSY = 1;
while (!AD0INT); // wait until conversion ready
ENABLE_INTERRUPTS;
value = ADC0L | (ADC0H << 8);
if (value > 1000)
sys_info.node_addr |= (1 << i);
}
/* each unit contains two addresses */
sys_info.node_addr <<= 1;
/* set-up DAC & ADC */
ADC_NRDY = 1; // input
ADC_DIN = 1; // input
ADC_NRES = 1; // remove reset
DAC_NCLR = 1; // remove clear
write_adc(REG_FILTER, ADC_SF_VALUE);
/* force update */
for (i=0 ; i<N_HV_CHN ; i++)
chn_bits[i] = DEMAND_CHANGED | CUR_LIMIT_CHANGED;
/* LED normally off (inverted) */
for (i=0 ; i<N_HV_CHN ; i++)
led_mode(i, 1);
/* initially, trips are enabled */
trip_enable(0, 1);
trip_enable(0, 2);
trip0 = trip1 = 0;
trip0_reset = trip1_reset = 0;
trip_change[0] = trip_change[1] = 0;
trip_time[0] = trip_time[1] = 0;
}
void setup(void)
{
unsigned char adr, flags, d;
unsigned short i;
unsigned char *p;
_flkey = 0;
/* first disable watchdog */
watchdog_disable();
/* avoid any blocking of RS485 bus */
RS485_ENABLE = RS485_ENABLE_OFF;
/* Port and oscillator configuration */
#if defined(CPU_C8051F120)
SFRPAGE = CONFIG_PAGE;
XBR0 = 0x04; // Enable XBar, UART0 & UART1
XBR1 = 0x00;
XBR2 = 0x44;
#ifdef CLK_25MHZ
/* Select internal quartz oscillator */
SFRPAGE = LEGACY_PAGE;
FLSCL = 0x00; // set flash read time for <25 MHz
SFRPAGE = CONFIG_PAGE;
OSCICN = 0x83; // divide by 1
CLKSEL = 0x00; // select internal oscillator
#else // 98 MHz
/* Select internal quartz oscillator */
SFRPAGE = LEGACY_PAGE;
FLSCL = 0xB0; // set flash read time for 100 MHz
SFRPAGE = CONFIG_PAGE;
OSCICN = 0x83; // divide by 1
CLKSEL = 0x00; // select internal oscillator
PLL0CN |= 0x01;
PLL0DIV = 0x01;
PLL0FLT = 0x01;
PLL0MUL = 0x04;
for (i = 0 ; i < 15; i++); // Wait 5us for initialization
PLL0CN |= 0x02;
for (i = 0 ; i<50000 && ((PLL0CN & 0x10) == 0) ; i++);
CLKSEL = 0x02; // select PLL as sysclk src
#endif
#elif defined(CPU_C8051F020)
XBR0 = 0x04; // Enable UART0 & UART1
XBR1 = 0x00;
XBR2 = 0x44;
/* Select external quartz oscillator */
OSCXCN = 0x67; // Crystal mode, Power Factor 22E6
OSCICN = 0x08; // CLKSL=1 (external)
#elif defined(CPU_C8051F310) || defined(CPU_C8051F320)
XBR0 = 0x01; // Enable RX/TX
XBR1 = 0x40; // Enable crossbar
/* Select internal quartz oscillator */
OSCICN = 0x83; // IOSCEN=1, SYSCLK=24.5 MHz
CLKSEL = 0x00; // derive SYSCLK from internal source
#else
XBR0 = 0x04; // Enable RX/TX
XBR1 = 0x00;
XBR2 = 0x40; // Enable crossbar
PRT0CF = 0x01; // P0.0: TX = Push Pull
PRT1CF = 0x00; // P1
PRT2CF = 0x00; // P2 Open drain for 5V LCD
PRT3CF = 0x20; // P3.5: RS485 enable = Push Pull
/* Select external quartz oscillator */
OSCXCN = 0x67; // Crystal mode, Power Factor 22E6
OSCICN = 0x08; // CLKSL=1 (external)
#endif
#ifdef CFG_HAVE_LCD
lcd_setup();
#endif
#ifdef CFG_HAVE_EMIF
/* initialize external memory interface */
d = emif_init();
/* do memory test on cold start */
SFRPAGE = LEGACY_PAGE;
if (d > 0 && (RSTSRC & 0x02) > 0)
emif_test(d);
#endif
/* start system clock */
sysclock_init();
/* enable watchdog with default timeout */
watchdog_enable(0);
/* enable missing clock detector */
RSTSRC |= 0x04;
/* default LED mode */
for (i=0 ; i<N_LED ; i++)
led_mode(i, 1);
/* initialize all memory */
CSR = 0;
addressed = 0;
flash_param = 0;
flash_program = 0;
flash_allowed = 0;
wrong_cpu = 0;
_flkey = 0;
#ifdef CFG_HAVE_RTC
rtc_set = 0;
#endif
i_in = i_out = n_out = 0;
_cur_sub_addr = 0;
for (i=0 ; i<sizeof(in_buf) ; i++)
in_buf[i] = 0;
for (i=0 ; i<sizeof(out_buf) ; i++)
out_buf[i] = 0;
/* check if we got reset by watchdog */
#if defined(CPU_C8051F120)
SFRPAGE = LEGACY_PAGE;
#endif
WD_RESET = ((RSTSRC & 0x02) == 0 && (RSTSRC & 0x08) > 0);
/* initialize UART(s) */
uart_init(0, BD_115200);
#ifdef CFG_UART1_MSCB
uart_init(1, BD_115200);
#endif
#ifdef CFG_DYN_VARIABLES
setup_variables();
#endif
/* count variables */
for (n_variables = _var_size = 0;; n_variables++) {
_var_size += variables[n_variables].width;
if (variables[n_variables].width == 0)
break;
}
/* check if variables are in xdata and xdata is present */
if (n_variables > 0) {
p = variables[0].ud;
d = *p;
*p = 0x55;
if (*p != 0x55)
wrong_cpu = 1;
*p = 0xAA;
if (*p != 0xAA)
wrong_cpu = 1;
*p = d;
}
/* retrieve EEPROM data */
#ifdef CPU_C8051F120
SFRPAGE = LEGACY_PAGE;
#endif
if ((RSTSRC & 0x02) > 0)
flags = eeprom_retrieve(1); // vars on cold start
else
flags = eeprom_retrieve(0);
if ((flags & (1 << 0)) == 0) {
configured_addr = 0;
/* set initial values */
sys_info.node_addr = 0xFFFF;
sys_info.group_addr = 0xFFFF;
memset(sys_info.node_name, 0, sizeof(sys_info.node_name));
strncpy(sys_info.node_name, node_name, sizeof(sys_info.node_name));
} else
configured_addr = 1;
/* store SVN revision */
sys_info.svn_revision = (svn_rev_main[6]-'0')*1000+
(svn_rev_main[7]-'0')*100+
(svn_rev_main[8]-'0')*10+
(svn_rev_main[9]-'0');
if ((flags & (1 << 1)) == 0) {
/* init variables */
for (i = 0; variables[i].width; i++)
if (!(variables[i].flags & MSCBF_DATALESS)) {
/* do it for each sub-address */
for (adr = 0 ; adr < _n_sub_addr ; adr++) {
memset((char*)variables[i].ud + _var_size*adr, 0, variables[i].width);
}
}
/* call user initialization routine with initialization */
user_init(1);
/* write current variables to flash later in main routine */
configured_vars = 0;
} else {
/* call user initialization routine without initialization */
user_init(0);
configured_vars = 1;
}
/* Blink LEDs */
for (i=0 ; i<N_LED ; i++)
led_blink(i, 3, 150);
}
void setup(void)
{
int i; // software timer
WDTCN = 0xDE; // Disable watchdog timer
WDTCN = 0xAD;
SFRPAGE = CONFIG_PAGE; // set SFR page
XBR0 = 0x04; // Enable UART0 & UART1
XBR1 = 0x00;
XBR2 = 0x44;
// all pins used by the external memory interface are in push-pull mode
P0MDOUT = 0xFF;
P1MDOUT = 0xFF;
P2MDOUT = 0xFF;
P3MDOUT = 0xFF;
P0 = 0xC0; // /WR, /RD, are high, RESET is low
P1 = 0x00;
P2 = 0x00; // P1, P2 contain the address lines
P3 = 0xFF; // P3 contains the data lines
OSCICN = 0x83; // set internal oscillator to run
// at its maximum frequency
CLKSEL = 0x00; // Select the internal osc. as
// the SYSCLK source
//Turn on the PLL and increase the system clock by a factor of M/N = 2
SFRPAGE = CONFIG_PAGE;
PLL0CN = 0x00; // Set internal osc. as PLL source
SFRPAGE = LEGACY_PAGE;
FLSCL = 0x10; // Set FLASH read time for 50MHz clk
// or less
SFRPAGE = CONFIG_PAGE;
PLL0CN |= 0x01; // Enable Power to PLL
PLL0DIV = 0x01; // Set Pre-divide value to N (N = 1)
PLL0FLT = 0x01; // Set the PLL filter register for
// a reference clock from 19 - 30 MHz
// and an output clock from 45 - 80 MHz
PLL0MUL = 0x02; // Multiply SYSCLK by M (M = 2)
for (i = 0; i < 256; i++); // Wait at least 5us
PLL0CN |= 0x02; // Enable the PLL
while (!(PLL0CN & 0x10)); // Wait until PLL frequency is locked
CLKSEL = 0x02; // Select PLL as SYSCLK source
SFRPAGE = LEGACY_PAGE;
EMI0CF = 0xD7; // Split-Mode, non-multiplexed
// on P0-P3 (use 0xF7 for P4 - P7)
EMI0TC = 0xB7; // This value may be modified
// according to SYSCLK to meet the
// timing requirements for the CS8900A
// For example, EMI0TC should be >= 0xB7
// for a 100 MHz SYSCLK.
SFRPAGE = ADC0_PAGE;
AMX0CF = 0x00; // select single ended analog inputs
ADC0CF = 0xE0; // 16 system clocks, gain 1
ADC0CN = 0x80; // enable ADC
REF0CN = 0x03; // enable internal reference
DAC0CN = 0x80; // enable DAC0
DAC1CN = 0x80; // enable DAC1
/* init memory */
RS485_ENABLE = 0;
/* start system clock */
sysclock_init();
CKCON = 0x00; // assumed by tcp_timer()
/* Blink LEDs */
led_blink(0, 5, 150);
led_blink(1, 5, 150);
/* invert first LED */
led_mode(0, 1);
}
