asmlinkage void __init init_arch(int argc, char **argv, char **envp,
int *prom_vec)
{
/* Determine which MIPS variant we are running on. */
cpu_probe();
prom_init(argc, argv, envp, prom_vec);
cpu_report();
/*
* Determine the mmu/cache attached to this machine, then flush the
* tlb and caches. On the r4xx0 variants this also sets CP0_WIRED to
* zero.
*/
load_mmu();
/*
* On IP27, I am seeing the TS bit set when the kernel is loaded.
* Maybe because the kernel is in ckseg0 and not xkphys? Clear it
* anyway ...
*/
clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
start_kernel();
}
asmlinkage void __init init_arch(int argc, char **argv, char **envp,
int *prom_vec)
{
/* Determine which MIPS variant we are running on. */
cpu_probe();
prom_init(argc, argv, envp, prom_vec);
cpu_report();
/*
* Determine the mmu/cache attached to this machine, then flush the
* tlb and caches. On the r4xx0 variants this also sets CP0_WIRED to
* zero.
*/
load_mmu();
start_kernel();
}
asmlinkage void __init
init_arch(int argc, char **argv, char **envp, int *prom_vec)
{
/* Determine which MIPS variant we are running on. */
unsigned int s;
#ifdef CONFIG_RTL865X
char chipVersion[16]={0};
int rev;
GetChipVersion(chipVersion,sizeof(chipVersion), &rev);
printk("************************************\n");
printk("Powered by Realtek RTL%s SoC, rev %d\n",chipVersion, rev);
printk("************************************\n");
#endif
#ifdef CONFIG_RTL8186
printk("************************************\n");
printk("Powered by Realtek RTL8186 SoC\n");
printk("************************************\n");
#endif
cpu_probe();
prom_init(argc, argv, envp, prom_vec);
cpu_report();
/*
* Determine the mmu/cache attached to this machine,
* then flush the tlb and caches. On the r4xx0
* variants this also sets CP0_WIRED to zero.
*/
#ifdef CONFIG_RTL865X
printk("Init MMU (16 entries)\n");
#endif
load_mmu();
/* Disable coprocessors and set FPU for 16/32 FPR register model */
clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
set_c0_status(ST0_CU0);
start_kernel();
}
asmlinkage void __init
init_arch(int argc, char **argv, char **envp, int *prom_vec)
{
/* Determine which MIPS variant we are running on. */
cpu_probe();
prom_init(argc, argv, envp, prom_vec);
cpu_report();
/*
* Determine the mmu/cache attached to this machine,
* then flush the tlb and caches. On the r4xx0
* variants this also sets CP0_WIRED to zero.
*/
load_mmu();
/* Disable coprocessors and set FPU for 16/32 FPR register model */
clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
set_c0_status(ST0_CU0);
start_kernel();
}
