void acia6850_device::device_reset()
{
int cts = m_in_cts_func();
int dcd = m_in_dcd_func();
m_status = (cts << 3) | (dcd << 2) | ACIA6850_STATUS_TDRE;
m_tdr = 0;
m_rdr = 0;
m_tx_shift = 0;
m_rx_shift = 0;
m_tx_counter = 0;
m_rx_counter = 0;
TXD(1);
m_overrun = 0;
m_status_read = 0;
m_brk = 0;
m_rx_state = START;
m_tx_state = START;
m_irq = 0;
m_out_irq_func(1);
if (m_first_reset)
{
m_first_reset = 0;
RTS(1);
}
else
{
RTS(m_rts);
}
}
void acia6850_device::tx_clock_in()
{
int _cts = m_in_cts_func();
if (_cts)
{
m_status |= ACIA6850_STATUS_CTS;
}
else
{
m_status &= ~ACIA6850_STATUS_CTS;
}
m_tx_counter ++;
if ( m_tx_counter > m_divide - 1)
{
tx_tick();
m_tx_counter = 0;
}
}
void acia6850_device::tx_tick()
{
switch (m_tx_state)
{
case START:
{
if (m_brk)
{
// transmit break
TXD(0);
}
else
{
int _cts = m_in_cts_func();
if (_cts)
{
m_status |= ACIA6850_STATUS_CTS;
}
else
{
m_status &= ~ACIA6850_STATUS_CTS;
}
check_interrupts();
if (m_status & ACIA6850_STATUS_TDRE)
{
// transmitter idle
TXD(1);
}
else
{
// transmit character
if (LOG) logerror("MC6850 '%s': TX DATA %x\n", tag(), m_tdr);
if (LOG) logerror("MC6850 '%s': TX START BIT\n", tag());
TXD(0);
m_tx_bits = m_bits;
m_tx_shift = m_tdr;
m_tx_parity = 0;
m_tx_state = DATA;
}
}
break;
}
case DATA:
{
int val = m_tx_shift & 1;
if (LOG) logerror("MC6850 '%s': TX DATA BIT %x\n", tag(), val);
TXD(val);
m_tx_parity ^= val;
m_tx_shift >>= 1;
if (--(m_tx_bits) == 0)
{
m_tx_state = (m_parity == NONE) ? STOP : PARITY;
}
break;
}
case PARITY:
{
int parity = 0;
if (m_parity == EVEN)
{
parity = (m_tx_parity & 1) ? 1 : 0;
}
else
{
parity = (m_tx_parity & 1) ? 0 : 1;
}
TXD(parity);
if (LOG) logerror("MC6850 '%s': TX PARITY BIT %x\n", tag(), parity);
m_tx_state = STOP;
break;
}
case STOP:
{
if (LOG) logerror("MC6850 '%s': TX STOP BIT\n", tag());
TXD(1);
if (m_stopbits == 1)
{
m_tx_state = START;
m_status |= ACIA6850_STATUS_TDRE;
}
else
{
m_tx_state = STOP2;
}
break;
}
case STOP2:
{
if (LOG) logerror("MC6850 '%s': TX STOP BIT\n", tag());
TXD(1);
m_tx_state = START;
m_status |= ACIA6850_STATUS_TDRE;
break;
}
}
}
