Ejemplo n.º 1
0
static irqreturn_t max77693_irq_thread(int irq, void *data)
{
	struct max77693_dev *max77693 = data;
	u8 irq_reg[MAX77693_IRQ_GROUP_NR] = {};
	u8 irq_src;
	int ret;
	int i, cur_irq;

	ret = max77693_read_reg(max77693->regmap, MAX77693_PMIC_REG_INTSRC,
				&irq_src);
	if (ret < 0) {
		dev_err(max77693->dev, "Failed to read interrupt source: %d\n",
				ret);
		return IRQ_NONE;
	}

	if (irq_src & MAX77693_IRQSRC_CHG)
		/* CHG_INT */
		ret = max77693_read_reg(max77693->regmap, MAX77693_CHG_REG_CHG_INT,
				&irq_reg[CHG_INT]);

	if (irq_src & MAX77693_IRQSRC_TOP)
		/* TOPSYS_INT */
		ret = max77693_read_reg(max77693->regmap,
			MAX77693_PMIC_REG_TOPSYS_INT, &irq_reg[TOPSYS_INT]);

	if (irq_src & MAX77693_IRQSRC_FLASH)
		/* LED_INT */
		ret = max77693_read_reg(max77693->regmap,
			MAX77693_LED_REG_FLASH_INT, &irq_reg[LED_INT]);

	if (irq_src & MAX77693_IRQSRC_MUIC)
		/* MUIC INT1 ~ INT3 */
		max77693_bulk_read(max77693->regmap_muic, MAX77693_MUIC_REG_INT1,
			MAX77693_NUM_IRQ_MUIC_REGS, &irq_reg[MUIC_INT1]);

	/* Apply masking */
	for (i = 0; i < MAX77693_IRQ_GROUP_NR; i++) {
		if (i >= MUIC_INT1 && i <= MUIC_INT3)
			irq_reg[i] &= max77693->irq_masks_cur[i];
		else
			irq_reg[i] &= ~max77693->irq_masks_cur[i];
	}

	/* Report */
	for (i = 0; i < MAX77693_IRQ_NR; i++) {
		if (irq_reg[max77693_irqs[i].group] & max77693_irqs[i].mask) {
			cur_irq = irq_find_mapping(max77693->irq_domain, i);
			if (cur_irq)
				handle_nested_irq(cur_irq);
		}
	}

	return IRQ_HANDLED;
}
static irqreturn_t max77693_irq_thread(int irq, void *data)
{
	struct max77693_dev *max77693 = data;
	u8 irq_reg[MAX77693_IRQ_GROUP_NR] = {};
#if defined(CONFIG_SEC_PRODUCT_8930)
	u8 tmp_irq_reg[MAX77693_IRQ_GROUP_NR] = {};
#endif
	u8 irq_src;
	int ret;
	int i;
	pr_debug("%s: irq gpio pre-state(0x%02x)\n", __func__,
		gpio_get_value(max77693->irq_gpio));

clear_retry:
	ret = max77693_read_reg(max77693->i2c,
		MAX77693_PMIC_REG_INTSRC, &irq_src);
	if (ret < 0) {
		dev_err(max77693->dev, "Failed to read interrupt source: %d\n",
				ret);
		return IRQ_NONE;
	}
	pr_info("%s: interrupt source(0x%02x)\n", __func__, irq_src);

	if (irq_src & MAX77693_IRQSRC_CHG) {
		/* CHG_INT */
		ret = max77693_read_reg(max77693->i2c, MAX77693_CHG_REG_CHG_INT,
				&irq_reg[CHG_INT]);
		pr_info("%s: charger interrupt(0x%02x)\n",
			__func__, irq_reg[CHG_INT]);

#if defined(CONFIG_CHARGER_MAX77803)
		/* mask chgin to prevent wcin infinite interrupt
		 * wcin is unmasked wcin isr
		 */
		if (irq_reg[CHG_INT] & max77693_irqs[MAX77693_CHG_IRQ_WCIN_I].mask) {
			u8 reg_data;
			max77693_read_reg(max77693->i2c,
				MAX77693_CHG_REG_CHG_INT_MASK, &reg_data);
			reg_data |= (1 << 5);
			max77693_write_reg(max77693->i2c,
				MAX77693_CHG_REG_CHG_INT_MASK, reg_data);
		}
#endif

	}

	if (irq_src & MAX77693_IRQSRC_TOP) {
		/* TOPSYS_INT */
		ret = max77693_read_reg(max77693->i2c,
				MAX77693_PMIC_REG_TOPSYS_INT,
				&irq_reg[TOPSYS_INT]);
		pr_info("%s: topsys interrupt(0x%02x)\n",
			__func__, irq_reg[TOPSYS_INT]);
	}

	if (irq_src & MAX77693_IRQSRC_FLASH) {
		/* LED_INT */
		ret = max77693_read_reg(max77693->i2c,
				MAX77693_LED_REG_FLASH_INT,
				&irq_reg[LED_INT]);
		pr_info("%s: led interrupt(0x%02x)\n",
			__func__, irq_reg[LED_INT]);
	}

	if (irq_src & MAX77693_IRQSRC_MUIC) {
		/* MUIC INT1 ~ INT3 */
		max77693_bulk_read(max77693->muic,
		MAX77693_MUIC_REG_INT1,
		MAX77693_NUM_IRQ_MUIC_REGS,
#if defined(CONFIG_SEC_PRODUCT_8930)
				&tmp_irq_reg[MUIC_INT1]);
#else
				&irq_reg[MUIC_INT1]);
#endif
#if defined(CONFIG_SEC_PRODUCT_8930)
		/* Or temp irq register to irq register for if it retries */
		for (i = MUIC_INT1; i < MAX77693_IRQ_GROUP_NR; i++)
			irq_reg[i] |= tmp_irq_reg[i];
#endif

		pr_info("%s: muic interrupt(0x%02x, 0x%02x, 0x%02x)\n",
			__func__, irq_reg[MUIC_INT1],
			irq_reg[MUIC_INT2], irq_reg[MUIC_INT3]);
	}
static irqreturn_t max77693_irq_thread(int irq, void *data)
{
	struct max77693_dev *max77693 = data;
	u8 irq_reg[MAX77693_IRQ_GROUP_NR] = {};
	u8 irq_src;
	int ret;
	int i;
	pr_debug("%s: irq gpio pre-state(0x%02x)\n", __func__,
		gpio_get_value(max77693->irq_gpio));

clear_retry:
	ret = max77693_read_reg(max77693->i2c,
		MAX77693_PMIC_REG_INTSRC, &irq_src);
	if (ret < 0) {
		dev_err(max77693->dev, "Failed to read interrupt source: %d\n",
				ret);
		return IRQ_NONE;
	}
	pr_info("%s: interrupt source(0x%02x)\n", __func__, irq_src);

	if (irq_src & MAX77693_IRQSRC_CHG) {
		/* CHG_INT */
		ret = max77693_read_reg(max77693->i2c, MAX77693_CHG_REG_CHG_INT,
				&irq_reg[CHG_INT]);
		pr_info("%s: charger interrupt(0x%02x)\n",
			__func__, irq_reg[CHG_INT]);
	}

	if (irq_src & MAX77693_IRQSRC_TOP) {
		/* TOPSYS_INT */
		ret = max77693_read_reg(max77693->i2c,
				MAX77693_PMIC_REG_TOPSYS_INT,
				&irq_reg[TOPSYS_INT]);
		pr_info("%s: topsys interrupt(0x%02x)\n",
			__func__, irq_reg[TOPSYS_INT]);
	}

	if (irq_src & MAX77693_IRQSRC_FLASH) {
		/* LED_INT */
		ret = max77693_read_reg(max77693->i2c,
				MAX77693_LED_REG_FLASH_INT,
				&irq_reg[LED_INT]);
		pr_info("%s: led interrupt(0x%02x)\n",
			__func__, irq_reg[LED_INT]);
	}

	if (irq_src & MAX77693_IRQSRC_MUIC) {
		/* MUIC INT1 ~ INT3 */
		max77693_bulk_read(max77693->muic,
		MAX77693_MUIC_REG_INT1,
		MAX77693_NUM_IRQ_MUIC_REGS,
				&irq_reg[MUIC_INT1]);
		pr_info("%s: muic interrupt(0x%02x, 0x%02x, 0x%02x)\n",
			__func__, irq_reg[MUIC_INT1],
			irq_reg[MUIC_INT2], irq_reg[MUIC_INT3]);
	}

	pr_debug("%s: irq gpio post-state(0x%02x)\n", __func__,
		gpio_get_value(max77693->irq_gpio));

	if (gpio_get_value(max77693->irq_gpio) == 0) {
		pr_warn("%s: irq_gpio is not High!\n", __func__);
		goto clear_retry;
	}

	/* Apply masking */
	for (i = 0; i < MAX77693_IRQ_GROUP_NR; i++) {
		if (i >= MUIC_INT1 && i <= MUIC_INT3)
			irq_reg[i] &= max77693->irq_masks_cur[i];
		else
			irq_reg[i] &= ~max77693->irq_masks_cur[i];
	}

	/* Report */
	for (i = 0; i < MAX77693_IRQ_NR; i++) {
		if (irq_reg[max77693_irqs[i].group] & max77693_irqs[i].mask)
			handle_nested_irq(max77693->irq_base + i);
	}

	return IRQ_HANDLED;
}