Ejemplo n.º 1
0
int mdss_edp_off(struct mdss_panel_data *pdata)
{
	struct mdss_edp_drv_pdata *edp_drv = NULL;
	int ret = 0;
	int i;

	edp_drv = container_of(pdata, struct mdss_edp_drv_pdata,
				panel_data);
	if (!edp_drv) {
		pr_err("%s: Invalid input data\n", __func__);
		return -EINVAL;
	}

	gpio_set_value(edp_drv->gpio_panel_en, 0);
	pwm_disable(edp_drv->bl_pwm);
	mdss_edp_enable(edp_drv->edp_base, 0);
	mdss_edp_unconfig_clk(edp_drv->edp_base, edp_drv->mmss_cc_base);
	mdss_edp_enable_mainlink(edp_drv->edp_base, 0);

	for (i = 0; i < edp_drv->dpcd.max_lane_count; ++i)
		mdss_edp_enable_lane_bist(edp_drv->edp_base, i, 0);

	mdss_edp_clk_disable(edp_drv);
	mdss_edp_hw_powerup(edp_drv->edp_base, 0);
	mdss_edp_unprepare_clocks(edp_drv);

	return ret;
}
Ejemplo n.º 2
0
int mdss_edp_off(struct mdss_panel_data *pdata)
{
	struct mdss_edp_drv_pdata *edp_drv = NULL;
	int ret = 0;

	edp_drv = container_of(pdata, struct mdss_edp_drv_pdata,
				panel_data);
	if (!edp_drv) {
		pr_err("%s: Invalid input data\n", __func__);
		return -EINVAL;
	}
	pr_debug("%s:+\n", __func__);

	mdss_edp_irq_disable(edp_drv);

	gpio_set_value(edp_drv->gpio_panel_en, 0);
	if (edp_drv->bl_pwm != NULL)
		pwm_disable(edp_drv->bl_pwm);
	mdss_edp_enable(edp_drv->base, 0);
	mdss_edp_unconfig_clk(edp_drv->base, edp_drv->mmss_cc_base);
	mdss_edp_enable_mainlink(edp_drv->base, 0);

	mdss_edp_lane_power_ctrl(edp_drv->base,
				edp_drv->dpcd.max_lane_count, 0);
	mdss_edp_clk_disable(edp_drv);
	mdss_edp_phy_powerup(edp_drv->base, 0);
	mdss_edp_unprepare_clocks(edp_drv);
	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);

	mdss_edp_aux_ctrl(edp_drv->base, 0);

	pr_debug("%s:-\n", __func__);
	return ret;
}
Ejemplo n.º 3
0
int mdss_edp_off(struct mdss_panel_data *pdata)
{
	struct mdss_edp_drv_pdata *edp_drv = NULL;
	int ret = 0;

	edp_drv = container_of(pdata, struct mdss_edp_drv_pdata,
				panel_data);
	if (!edp_drv) {
		pr_err("%s: Invalid input data\n", __func__);
		return -EINVAL;
	}
	pr_debug("%s:+, cont_splash=%d\n", __func__, edp_drv->cont_splash);

	/* wait until link training is completed */
	mutex_lock(&edp_drv->train_mutex);

	INIT_COMPLETION(edp_drv->idle_comp);
	mdss_edp_state_ctrl(edp_drv, ST_PUSH_IDLE);

	ret = wait_for_completion_timeout(&edp_drv->idle_comp,
						msecs_to_jiffies(100));
	if (ret == 0)
		pr_err("%s: idle pattern timedout\n", __func__);

	mdss_edp_state_ctrl(edp_drv, 0);

	mdss_edp_sink_power_state(edp_drv, SINK_POWER_OFF);

	mdss_edp_irq_disable(edp_drv);

	gpio_set_value(edp_drv->gpio_panel_en, 0);
	if (gpio_is_valid(edp_drv->gpio_lvl_en))
		gpio_set_value(edp_drv->gpio_lvl_en, 0);
	if (edp_drv->bl_pwm != NULL)
		pwm_disable(edp_drv->bl_pwm);
	edp_drv->is_pwm_enabled = 0;

	mdss_edp_mainlink_reset(edp_drv);
	mdss_edp_mainlink_ctrl(edp_drv, 0);

	mdss_edp_lane_power_ctrl(edp_drv, 0);
	mdss_edp_phy_power_ctrl(edp_drv, 0);

	mdss_edp_clk_disable(edp_drv);
	mdss_edp_unprepare_clocks(edp_drv);

	mdss_edp_aux_ctrl(edp_drv, 0);

	pr_debug("%s-: state_ctrl=%x\n", __func__,
				edp_read(edp_drv->base + 0x8));

	mutex_unlock(&edp_drv->train_mutex);
	return 0;
}