static int mdss_dsi_get_panel_cfg(char *panel_cfg)
{
int rc;
struct mdss_panel_cfg *pan_cfg = NULL;
if (!panel_cfg)
return MDSS_PANEL_INTF_INVALID;
pan_cfg = mdss_panel_intf_type(MDSS_PANEL_INTF_DSI);
if (IS_ERR(pan_cfg)) {
return PTR_ERR(pan_cfg);
} else if (!pan_cfg) {
panel_cfg[0] = 0;
return 0;
}
pr_debug("%s:%d: cfg:[%s]\n", __func__, __LINE__,
pan_cfg->arg_cfg);
rc = strlcpy(panel_cfg, pan_cfg->arg_cfg,
sizeof(pan_cfg->arg_cfg));
return rc;
}
static int mdss_edp_probe(struct platform_device *pdev)
{
int ret;
struct mdss_edp_drv_pdata *edp_drv;
struct mdss_panel_cfg *pan_cfg = NULL;
if (!mdss_is_ready()) {
pr_err("%s: MDP not probed yet!\n", __func__);
return -EPROBE_DEFER;
}
pan_cfg = mdss_panel_intf_type(MDSS_PANEL_INTF_EDP);
if (IS_ERR(pan_cfg)) {
return PTR_ERR(pan_cfg);
} else if (!pan_cfg) {
pr_debug("%s: not configured as prim\n", __func__);
return -ENODEV;
}
if (!pdev->dev.of_node) {
pr_err("%s: Failed\n", __func__);
return -EPERM;
}
edp_drv = devm_kzalloc(&pdev->dev, sizeof(*edp_drv), GFP_KERNEL);
if (edp_drv == NULL) {
pr_err("%s: Failed, could not allocate edp_drv", __func__);
return -ENOMEM;
}
edp_drv->mdss_util = mdss_get_util_intf();
if (edp_drv->mdss_util == NULL) {
pr_err("Failed to get mdss utility functions\n");
return -ENODEV;
}
edp_drv->panel_data.panel_info.is_prim_panel = true;
mdss_edp_hw.irq_info = mdss_intr_line();
if (mdss_edp_hw.irq_info == NULL) {
pr_err("Failed to get mdss irq information\n");
return -ENODEV;
}
edp_drv->pdev = pdev;
edp_drv->pdev->id = 1;
edp_drv->clk_on = 0;
edp_drv->aux_rate = 19200000;
edp_drv->mask1 = EDP_INTR_MASK1;
edp_drv->mask2 = EDP_INTR_MASK2;
mutex_init(&edp_drv->emutex);
spin_lock_init(&edp_drv->lock);
ret = mdss_edp_get_base_address(edp_drv);
if (ret)
goto probe_err;
ret = mdss_edp_get_mmss_cc_base_address(edp_drv);
if (ret)
goto edp_base_unmap;
ret = mdss_edp_regulator_init(edp_drv);
if (ret)
goto mmss_cc_base_unmap;
ret = mdss_edp_clk_init(edp_drv);
if (ret)
goto edp_clk_deinit;
ret = mdss_edp_gpio_panel_en(edp_drv);
if (ret)
goto edp_clk_deinit;
ret = mdss_edp_gpio_lvl_en(edp_drv);
if (ret)
pr_err("%s: No gpio_lvl_en detected\n", __func__);
ret = mdss_edp_pwm_config(edp_drv);
if (ret)
goto edp_free_gpio_panel_en;
mdss_edp_irq_setup(edp_drv);
mdss_edp_aux_init(edp_drv);
mdss_edp_event_setup(edp_drv);
edp_drv->cont_splash = of_property_read_bool(pdev->dev.of_node,
"qcom,cont-splash-enabled");
/* only need aux and ahb clock for aux channel */
mdss_edp_prepare_aux_clocks(edp_drv);
mdss_edp_aux_clk_enable(edp_drv);
if (!edp_drv->cont_splash) {
mdss_edp_phy_pll_reset(edp_drv);
mdss_edp_aux_reset(edp_drv);
mdss_edp_mainlink_reset(edp_drv);
mdss_edp_phy_power_ctrl(edp_drv, 1);
mdss_edp_aux_ctrl(edp_drv, 1);
}
mdss_edp_irq_enable(edp_drv);
mdss_edp_edid_read(edp_drv, 0);
mdss_edp_dpcd_cap_read(edp_drv);
mdss_edp_fill_link_cfg(edp_drv);
mdss_edp_irq_disable(edp_drv);
if (!edp_drv->cont_splash) {
mdss_edp_aux_ctrl(edp_drv, 0);
mdss_edp_phy_power_ctrl(edp_drv, 0);
}
mdss_edp_aux_clk_disable(edp_drv);
mdss_edp_unprepare_aux_clocks(edp_drv);
if (edp_drv->cont_splash) { /* vote for clocks */
mdss_edp_prepare_clocks(edp_drv);
mdss_edp_clk_enable(edp_drv);
}
mdss_edp_device_register(edp_drv);
edp_drv->inited = true;
pr_debug("%s: done\n", __func__);
return 0;
edp_free_gpio_panel_en:
gpio_free(edp_drv->gpio_panel_en);
if (gpio_is_valid(edp_drv->gpio_lvl_en))
gpio_free(edp_drv->gpio_lvl_en);
edp_clk_deinit:
mdss_edp_clk_deinit(edp_drv);
mdss_edp_regulator_off(edp_drv);
mmss_cc_base_unmap:
iounmap(edp_drv->mmss_cc_base);
edp_base_unmap:
iounmap(edp_drv->base);
probe_err:
return ret;
}
static int __devinit mdss_edp_probe(struct platform_device *pdev)
{
int ret;
struct mdss_edp_drv_pdata *edp_drv;
struct mdss_panel_cfg *pan_cfg = NULL;
if (!mdss_is_ready()) {
pr_err("%s: MDP not probed yet!\n", __func__);
return -EPROBE_DEFER;
}
pan_cfg = mdss_panel_intf_type(MDSS_PANEL_INTF_EDP);
if (IS_ERR(pan_cfg)) {
return PTR_ERR(pan_cfg);
} else if (!pan_cfg) {
pr_debug("%s: not configured as prim\n", __func__);
return -ENODEV;
}
if (!pdev->dev.of_node) {
pr_err("%s: Failed\n", __func__);
return -EPERM;
}
edp_drv = devm_kzalloc(&pdev->dev, sizeof(*edp_drv), GFP_KERNEL);
if (edp_drv == NULL) {
pr_err("%s: Failed, could not allocate edp_drv", __func__);
return -ENOMEM;
}
edp_drv->pdev = pdev;
edp_drv->pdev->id = 1;
edp_drv->clk_on = 0;
edp_drv->train_start = 0; /* no link train yet */
ret = mdss_edp_get_base_address(edp_drv);
if (ret)
goto probe_err;
ret = mdss_edp_get_mmss_cc_base_address(edp_drv);
if (ret)
goto edp_base_unmap;
ret = mdss_edp_regulator_init(edp_drv);
if (ret)
goto mmss_cc_base_unmap;
ret = mdss_edp_clk_init(edp_drv);
if (ret)
goto edp_clk_deinit;
ret = mdss_edp_gpio_panel_en(edp_drv);
if (ret)
goto edp_clk_deinit;
ret = mdss_edp_pwm_config(edp_drv);
if (ret)
goto edp_free_gpio_panel_en;
mdss_edp_irq_setup(edp_drv);
mdss_edp_aux_init(edp_drv);
mdss_edp_event_setup(edp_drv);
/* need mdss clock to receive irq */
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
/* only need aux and ahb clock for aux channel */
mdss_edp_prepare_aux_clocks(edp_drv);
mdss_edp_aux_clk_enable(edp_drv);
mdss_edp_phy_pll_reset(edp_drv->base);
mdss_edp_aux_reset(edp_drv->base);
mdss_edp_mainlink_reset(edp_drv->base);
mdss_edp_phy_powerup(edp_drv->base, 1);
mdss_edp_aux_ctrl(edp_drv->base, 1);
mdss_edp_irq_enable(edp_drv);
mdss_edp_edid_read(edp_drv, 0);
mdss_edp_dpcd_cap_read(edp_drv);
mdss_edp_irq_disable(edp_drv);
mdss_edp_aux_ctrl(edp_drv->base, 0);
mdss_edp_aux_clk_disable(edp_drv);
mdss_edp_phy_powerup(edp_drv->base, 0);
mdss_edp_unprepare_aux_clocks(edp_drv);
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
mdss_edp_device_register(edp_drv);
return 0;
edp_free_gpio_panel_en:
gpio_free(edp_drv->gpio_panel_en);
edp_clk_deinit:
mdss_edp_clk_deinit(edp_drv);
mdss_edp_regulator_off(edp_drv);
mmss_cc_base_unmap:
iounmap(edp_drv->mmss_cc_base);
edp_base_unmap:
iounmap(edp_drv->base);
probe_err:
return ret;
}
static int mdss_dsi_ctrl_probe(struct platform_device *pdev)
{
int rc = 0, i = 0;
u32 index;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct device_node *dsi_pan_node = NULL;
char panel_cfg[MDSS_MAX_PANEL_LEN];
const char *ctrl_name;
bool cmd_cfg_cont_splash = true;
struct mdss_panel_cfg *pan_cfg = NULL;
if (!mdss_is_ready()) {
pr_err("%s: MDP not probed yet!\n", __func__);
return -EPROBE_DEFER;
}
if (!pdev->dev.of_node) {
pr_err("DSI driver only supports device tree probe\n");
return -ENOTSUPP;
}
pan_cfg = mdss_panel_intf_type(MDSS_PANEL_INTF_HDMI);
if (IS_ERR(pan_cfg)) {
return PTR_ERR(pan_cfg);
} else if (pan_cfg) {
pr_debug("%s: HDMI is primary\n", __func__);
return -ENODEV;
}
ctrl_pdata = platform_get_drvdata(pdev);
if (!ctrl_pdata) {
ctrl_pdata = devm_kzalloc(&pdev->dev,
sizeof(struct mdss_dsi_ctrl_pdata),
GFP_KERNEL);
if (!ctrl_pdata) {
pr_err("%s: FAILED: cannot alloc dsi ctrl\n",
__func__);
rc = -ENOMEM;
goto error_no_mem;
}
platform_set_drvdata(pdev, ctrl_pdata);
}
ctrl_name = of_get_property(pdev->dev.of_node, "label", NULL);
if (!ctrl_name)
pr_info("%s:%d, DSI Ctrl name not specified\n",
__func__, __LINE__);
else
pr_info("%s: DSI Ctrl name = %s\n",
__func__, ctrl_name);
rc = of_property_read_u32(pdev->dev.of_node,
"cell-index", &index);
if (rc) {
dev_err(&pdev->dev,
"%s: Cell-index not specified, rc=%d\n",
__func__, rc);
goto error_no_mem;
}
if (index == 0)
pdev->id = 1;
else
pdev->id = 2;
rc = of_platform_populate(pdev->dev.of_node,
NULL, NULL, &pdev->dev);
if (rc) {
dev_err(&pdev->dev,
"%s: failed to add child nodes, rc=%d\n",
__func__, rc);
goto error_no_mem;
}
rc = mdss_dsi_pinctrl_init(pdev);
if (rc)
pr_warn("%s: failed to get pin resources\n", __func__);
/* Parse the regulator information */
for (i = 0; i < DSI_MAX_PM; i++) {
rc = mdss_dsi_get_dt_vreg_data(&pdev->dev,
&ctrl_pdata->power_data[i], i);
if (rc) {
DEV_ERR("%s: '%s' get_dt_vreg_data failed.rc=%d\n",
__func__, __mdss_dsi_pm_name(i), rc);
goto error_vreg;
}
}
/* DSI panels can be different between controllers */
rc = mdss_dsi_get_panel_cfg(panel_cfg);
if (!rc)
/* dsi panel cfg not present */
pr_warn("%s:%d:dsi specific cfg not present\n",
__func__, __LINE__);
/* find panel device node */
dsi_pan_node = mdss_dsi_find_panel_of_node(pdev, panel_cfg);
if (!dsi_pan_node) {
pr_err("%s: can't find panel node %s\n", __func__, panel_cfg);
goto error_pan_node;
}
cmd_cfg_cont_splash = mdss_panel_get_boot_cfg() ? true : false;
rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata, cmd_cfg_cont_splash);
if (rc) {
pr_err("%s: dsi panel init failed\n", __func__);
goto error_pan_node;
}
rc = dsi_panel_device_register(dsi_pan_node, ctrl_pdata);
if (rc) {
pr_err("%s: dsi panel dev reg failed\n", __func__);
goto error_pan_node;
}
#ifdef CONFIG_ZTEMT_LCD_ESD_TE_CHECK
/*esd check faild check,mayu add*/
//printk("lcd:%s disp_te_gpio=%d\n",__func__,ctrl_pdata->disp_te_gpio);
ctrl_pdata->lcd_te_irq = gpio_to_irq(ctrl_pdata->disp_te_gpio);
rc = request_irq(ctrl_pdata->lcd_te_irq, zte_lcd_te_irq_handler, \
IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING, "LCD_TE", ctrl_pdata);
if (rc < 0) {
printk("lcd:%s : request_irq failed\n", __func__);
}
#endif
pr_debug("%s: Dsi Ctrl->%d initialized\n", __func__, index);
return 0;
error_pan_node:
of_node_put(dsi_pan_node);
error_vreg:
for (; i >= 0; i--)
mdss_dsi_put_dt_vreg_data(&pdev->dev,
&ctrl_pdata->power_data[i]);
error_no_mem:
devm_kfree(&pdev->dev, ctrl_pdata);
return rc;
}
static int mdss_dsi_ctrl_probe(struct platform_device *pdev)
{
int rc = 0, i = 0;
u32 index;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct device_node *dsi_pan_node = NULL;
char panel_cfg[MDSS_MAX_PANEL_LEN];
const char *ctrl_name;
bool cmd_cfg_cont_splash = true;
struct mdss_panel_cfg *pan_cfg = NULL;
if (!mdss_is_ready()) {
pr_err("%s: MDP not probed yet!\n", __func__);
return -EPROBE_DEFER;
}
if (!pdev->dev.of_node) {
pr_err("DSI driver only supports device tree probe\n");
return -ENOTSUPP;
}
pan_cfg = mdss_panel_intf_type(MDSS_PANEL_INTF_HDMI);
if (IS_ERR(pan_cfg)) {
return PTR_ERR(pan_cfg);
} else if (pan_cfg) {
pr_debug("%s: HDMI is primary\n", __func__);
return -ENODEV;
}
ctrl_pdata = platform_get_drvdata(pdev);
if (!ctrl_pdata) {
ctrl_pdata = devm_kzalloc(&pdev->dev,
sizeof(struct mdss_dsi_ctrl_pdata),
GFP_KERNEL);
if (!ctrl_pdata) {
pr_err("%s: FAILED: cannot alloc dsi ctrl\n",
__func__);
rc = -ENOMEM;
goto error_no_mem;
}
platform_set_drvdata(pdev, ctrl_pdata);
}
ctrl_name = of_get_property(pdev->dev.of_node, "label", NULL);
if (!ctrl_name)
pr_info("%s:%d, DSI Ctrl name not specified\n",
__func__, __LINE__);
else
pr_info("%s: DSI Ctrl name = %s\n",
__func__, ctrl_name);
rc = of_property_read_u32(pdev->dev.of_node,
"cell-index", &index);
if (rc) {
dev_err(&pdev->dev,
"%s: Cell-index not specified, rc=%d\n",
__func__, rc);
goto error_no_mem;
}
if (index == 0)
pdev->id = 1;
else
pdev->id = 2;
rc = of_platform_populate(pdev->dev.of_node,
NULL, NULL, &pdev->dev);
if (rc) {
dev_err(&pdev->dev,
"%s: failed to add child nodes, rc=%d\n",
__func__, rc);
goto error_no_mem;
}
rc = mdss_dsi_pinctrl_init(pdev);
if (rc)
pr_warn("%s: failed to get pin resources\n", __func__);
for (i = 0; i < DSI_MAX_PM; i++) {
rc = mdss_dsi_get_dt_vreg_data(&pdev->dev,
&ctrl_pdata->power_data[i], i);
if (rc) {
DEV_ERR("%s: '%s' get_dt_vreg_data failed.rc=%d\n",
__func__, __mdss_dsi_pm_name(i), rc);
goto error_vreg;
}
}
rc = mdss_dsi_get_panel_cfg(panel_cfg);
if (!rc)
pr_warn("%s:%d:dsi specific cfg not present\n",
__func__, __LINE__);
dsi_pan_node = mdss_dsi_find_panel_of_node(pdev, panel_cfg);
if (!dsi_pan_node) {
pr_err("%s: can't find panel node %s\n", __func__, panel_cfg);
goto error_pan_node;
}
cmd_cfg_cont_splash = mdss_panel_get_boot_cfg() ? true : false;
rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata, cmd_cfg_cont_splash);
if (rc) {
pr_err("%s: dsi panel init failed\n", __func__);
goto error_pan_node;
}
rc = dsi_panel_device_register(dsi_pan_node, ctrl_pdata);
if (rc) {
pr_err("%s: dsi panel dev reg failed\n", __func__);
goto error_pan_node;
}
pr_debug("%s: Dsi Ctrl->%d initialized\n", __func__, index);
return 0;
error_pan_node:
of_node_put(dsi_pan_node);
error_vreg:
for (; i >= 0; i--)
mdss_dsi_put_dt_vreg_data(&pdev->dev,
&ctrl_pdata->power_data[i]);
error_no_mem:
devm_kfree(&pdev->dev, ctrl_pdata);
return rc;
}
