/* --------------------------------------------------------------------------*/
int player_start(play_control_t *ctrl_p, unsigned long priv)
{
int ret;
int pid = -1;
play_para_t *p_para;
//char stb_source[32];
update_loglevel_setting();
print_version_info();
log_print("[player_start:enter]p=%p black=%d\n", ctrl_p, get_black_policy());
if (ctrl_p == NULL) {
return PLAYER_EMPTY_P;
}
/*keep last frame displaying --default*/
set_black_policy(0);
/* if not set keep last frame, or change file playback, clear display last frame */
if (!ctrl_p->displast_frame) {
set_black_policy(1);
} else if (!check_file_same(ctrl_p->file_name)) {
set_black_policy(1);
}
pid = player_request_pid();
if (pid < 0) {
return PLAYER_NOT_VALID_PID;
}
p_para = MALLOC(sizeof(play_para_t));
if (p_para == NULL) {
return PLAYER_NOMEM;
}
MEMSET(p_para, 0, sizeof(play_para_t));
/* init time_point to a invalid value */
p_para->playctrl_info.time_point = -1;
player_init_pid_data(pid, p_para);
message_pool_init(p_para);
p_para->start_param = ctrl_p;
p_para->player_id = pid;
p_para->extern_priv = priv;
log_debug1("[player_start]player_para=%p,start_param=%p pid=%d\n", p_para, p_para->start_param, pid);
ret = player_thread_create(p_para) ;
if (ret != PLAYER_SUCCESS) {
FREE(p_para);
player_release_pid(pid);
return PLAYER_CAN_NOT_CREAT_THREADS;
}
log_print("[player_start:exit]pid = %d \n", pid);
return pid;
}
/**
* Starts the initialization, the tasks and then the scheduler.
*/
int main(void)
{
/* disable ETM at very first */
PINSEL10 &= ~((unsigned int)(1 << 3));
/* Initialize BMC hardware */
global_data.bmc_resetcause = 0x00;
/* IPMI message sequence counter */
global_data.seq_counter = 0x00;
/* site number used for entity instance */
global_data.bmc_siteno = 0x00;
/* reset sdr list */
sdr_list.sdr_count = 0;
/* init PLL */
init_clock();
/* init interrupts */
init_irq();
/* get reset cause */
init_resetcause();
/* init port pins */
init_portpins();
/* CUSTOM BOARD INIT CODE LOCATION 1 */
custom_init_1();
/* get HW and IPMB address */
custom_get_hw_ipmb_address();
uptime_init();
/* init RTC */
rtc_init();
/* create the FreeRTOS queues */
create_queues();
uart_init(UART_DEBUG_CONNECTOR, 115200);
uart_printf("Firmware started...\n");
/* init SPI/SSP controllers */
spi_init();
/* init SPI FLASH */
spi_flash_init_devices();
spi_flash_init(&spi_flash);
#ifdef CFG_MMC_I2C_MASTER
/* init BMC master I2C bus */
master_i2c_init(MASTER_BUS_I2C);
#endif
/* init EEPROM file system */
//spi_eeprom_init(&spi_eeprom);
#ifdef CFG_FS
if (fs_init(&efs, &spi_eeprom) != 0)
{
uart_printf("\nEEPROM not accesable!\n");
/* reboot bmc */
lpc_watchdog_start(CFG_BL_WATCHDOG_TIMEOUT, WD_RESET_MODE);
while (1);
}
#endif
/* init leds */
//led_init();
#ifndef CFG_ONCHIP_FLASH_GLOBAL_CONF
/* check EEPROM areas */
//eeprom_integrity_check_areas();
#endif
/* init CLI (and debug console) */
cli_uart_init(115200);
/* handle reset type warm/cold? */
//fru_handle_reset_type();
#ifdef CFG_CM
cm_fru_get_last_known_state();
#endif
#ifdef CFG_EXT_INT
/* init external interrupts */
external_interrupt_init();
#endif
#ifdef CFG_HELPER
/* init the helper task */
helper_init();
#endif
#ifdef CFG_BIOS_FLASH
/* init BIOS FLASH */
spi_flash_init(&bios_flash);
/* init FPGA BIOS flash selection */
bios_restore_active_flash_from_eeprom();
#endif
/* CUSTOM BOARD INIT CODE LOCATION 2 */
//custom_init_2();
/* get global configuration from EEPROM */
global_config();
/* CUSTOM BOARD INIT CODE LOCATION 3 */
//custom_init_3();
/* parse FRU */
fru_init(0);
#if defined (CFG_CM) || defined (CFG_MMC) || defined (CFG_IRTM) || defined(CFG_MCMC)
/* init the IPMB-L interface(s) */
ipmbl_init();
#endif
#ifdef CFG_LAN
/* read and set ncsi mac address from fru */
custom_set_ncsi_mac();
#endif
/* create message pool for IPMI messages */
message_pool_init();
/* init board task */
board_init();
/* init the BMC task */
bmc_init();
#ifdef CFG_PI_SERIAL_BASIC
/* init the payload interface */
pi_uart_b_init(CFG_PI_PORT_RATE);
#endif /* CFG_PI_SERIAL_BASIC */
#ifdef CFG_PI_SERIAL_TERMINAL
/* init the payload interface */
pi_uart_t_init(CFG_PI_PORT_RATE);
#endif /* CFG_PI_SERIAL_TERMINAL */
#ifdef CFG_PI_KCS
/* initialise kcs interface */
kcs_init();
#endif /* CFG_PI_KCS */
#ifdef CFG_ATCA
if (global_conf.operation_mode == OPERATION_MODE_STANDALONE)
{
/* configure IPMB-A and IPMB-B as master only in stanalone mode */
master_i2c_init(IPMB0A_I2C);
master_i2c_init(IPMB0B_I2C);
/* enable IPMB-0 pull ups and buffer */
ipmb0_bus_ctrl(IPMB0_A, IPMB_ENABLE);
ipmb0_bus_ctrl(IPMB0_B, IPMB_ENABLE);
}
else
{
/* init the IPMB-0 interface */
ipmb0_init();
}
#endif
#ifdef CFG_LAN_PLUS
sol_init();
#endif
#ifdef CFG_LAN
/* init ethernet hardware and Task */
eth_start();
#endif
/* init the SDR task */
/* PORT_NOTE: Needs to be started AFTER BMC task because of Semaphore dependency */
sdr_init();
/* parse all PICMG Records in FRU data and store relevant information */
//fru_parse_picmg();
/* init the IPMI message hub */
msg_hub_init();
/* init the event task */
event_init();
#ifdef CFG_CM
/* init the CM task */
init_cm();
#endif
#ifdef CFG_COOLING_MANAGER
cool_init();
#endif
/* do all post tests */
//post_test();
/* needs to be done after sdr initialization */
//hpm_check_bl_flags();
#ifdef CFG_BIOS_FLASH
/* collect BIOS/NVRAM version info (if payload power is off) */
if (!(signal_read(&sig_payload_power_enable)))
{
bios_redundancy_get_versions();
}
#endif
#ifdef CFG_WATCHDOG
/* start the FW watchdog */
lpc_watchdog_start(CFG_FW_WATCHDOG_TIMEOUT, WD_RESET_MODE);
#endif
/* set desired debug output mode before starting scheduler */
global_debug_uart_enabled = CFG_GLOBAL_DEBUG_UART;
/* all tasks have been initialized, start the scheduler */
vTaskStartScheduler();
/* Should never reach here! */
while (1);
}
