void mipi_dsi_te_ctrl(struct msm_fb_data_type *mfd, bool flag)
{
int ret =0;
if (flag){ //normal mode
ret = gpio_tlmm_config(
GPIO_CFG(
vsync_gpio, 1,
GPIO_CFG_INPUT,
GPIO_CFG_PULL_DOWN,
GPIO_CFG_2MA),
GPIO_CFG_ENABLE);
if (ret) {
printk("[DISPLAY]%s: faile to config vsync_gpio = %d\n", __func__, vsync_gpio);
}
gpio_direction_input(vsync_gpio);
mipi_dsi_set_tear_on(mfd);
}else{ //idle mode
mipi_dsi_set_tear_off(mfd); //must turn off panel TE before disable platform TD func
gpio_tlmm_config(
GPIO_CFG(
vsync_gpio, 0,
GPIO_CFG_OUTPUT,
GPIO_CFG_PULL_DOWN,
GPIO_CFG_2MA),
GPIO_CFG_DISABLE);
gpio_direction_output(vsync_gpio, 0);
}
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
#ifdef CONFIG_HUAWEI_KERNEL
struct mipi_panel_info *mipi;
unsigned int datamask = 0;
#endif
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_HUAWEI_KERNEL
mipi = &mfd->panel_info.mipi;
if (mipi->data_lane3)
datamask |= 1<<3;
if (mipi->data_lane2)
datamask |= 1<<2;
if (mipi->data_lane1)
datamask |= 1<<1;
if (mipi->data_lane0)
datamask |= 1<<0;
MIPI_OUTP(MIPI_DSI_BASE + 0xA8, datamask );
mdelay(1);
MIPI_OUTP(MIPI_DSI_BASE + 0xA8, datamask|(1<<4));
mdelay(1);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
local_bh_disable();
mipi_dsi_ahb_ctrl(0);
local_bh_enable();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#if defined(CONFIG_FB_MSM_MIPI_S6E8AA0_HD720_PANEL) || \
defined(CONFIG_FB_MSM_MIPI_S6E8AA0_WXGA_Q1_PANEL)
MIPI_OUTP(MIPI_DSI_BASE + 0xA8, 0x00000000); // for LCD-on when wakeup
#endif
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
printk(KERN_INFO"%s is started.. \n", __func__);
if (mdp_rev >= MDP_REV_41 && mfd->panel_info.type == MIPI_CMD_PANEL)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
#if defined(CONFIG_FB_MSM_MIPI_LGIT_VIDEO_WXGA_PT) \
|| defined(CONFIG_FB_MSM_MIPI_HITACHI_VIDEO_HD_PT) \
|| defined(CONFIG_FB_MSM_MIPI_DSI_LGIT_FHD)
//for power sequence of lgit panel
#else
mipi_dsi_op_mode_config(DSI_CMD_MODE);
#endif
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
#if defined(CONFIG_FB_MSM_MIPI_LGIT_VIDEO_WXGA_PT) \
|| defined(CONFIG_FB_MSM_MIPI_HITACHI_VIDEO_HD_PT) \
|| defined(CONFIG_FB_MSM_MIPI_DSI_LGIT_FHD)
//for power sequence of lgit panel.
#else
ret = panel_next_off(pdev);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41 && mfd->panel_info.type == MIPI_CMD_PANEL)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("End of %s ....:\n", __func__);
printk(KERN_INFO"%s is ended.. \n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
mipi_dsi_cmd_mdp_busy();
}
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
if (!mfd->panel_info.lcdc.no_set_tear)
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static void mipi_dsi_shutdown(struct platform_device *pdev)
{
if(bmipi_off == 0) {
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("Start of %s....:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#if defined(CONFIG_MDP_RUNTIME_BANDWIDTH)
#else
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
#endif
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("End of %s ....:\n", __func__);
bmipi_off = 1;
}
}
/*LGE_CHANGE_E LCD Reset After Data Pulled Down*/
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
//LGE_CHANGE_S [Kiran] Change LCD sleep sequence
/*LCD Reset After data pulled Down*/
#if 0
if(lglogo_firstboot)
{
mipi_dsi_op_mode_config(DSI_CMD_MODE);
}
#endif
/*LGE_CHANGE_E LCD Reset After Data Pulled Down*/
//LGE_CHANGE_E [Kiran] Change LCD sleep sequence
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
/*In case of ESD no delays required in power off*/
//LGE_CHANGE_S [Kiran] Change LCD sleep sequence
#ifdef CONFIG_LGE_LCD_ESD_DETECTION
if (true == is_esd_occured)
{
printk("ESD.Paneloff ASAP\n");
}
else
#endif
msleep(300);
//LGE_CHANGE_E [Kiran] Change LCD sleep sequence
#ifdef CONFIG_FB_MSM_MIPI_DSI_LG4573B_BOOT_LOGO
if(lglogo_firstboot)
{
printk(KERN_INFO "[DISPLAY]::%s\n",__func__);
local_bh_disable();
lglogo_mipi_dsi_clk_disable();
local_bh_enable();
}
else
#endif
{
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
}
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
#ifdef CONFIG_FB_MSM_MIPI_DSI_LG4573B_BOOT_LOGO
if(!lglogo_firstboot)
#endif
{
local_bh_disable();
mipi_dsi_ahb_ctrl(0);
local_bh_enable();
}
//LGE_CHANGE_S [Kiran] Change LCD sleep sequence
#if 1
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE, 0);
/* MDP cmd block disable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
/*Turning off DMA_P block*/
mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
#endif
//LGE_CHANGE_E [Kiran] Change LCD sleep sequence
/*LCD Reset After data pulled Down*/
mipi_ldp_lcd_panel_poweroff();
/*LGE_CHANGE_E LCD Reset After Data Pulled Down*/
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
#ifdef CONFIG_FB_MSM_MIPI_DSI_LG4573B_BOOT_LOGO
lglogo_firstboot = FALSE;
#endif
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
//#if defined(CONFIG_MACH_MSM8960_CHEETAH) || defined(CONFIG_MACH_MSM8960_VEGAPVW) || defined(CONFIG_MACH_MSM8960_SIRIUSLTE)|| defined(CONFIG_MACH_MSM8960_EF44S) || defined(CONFIG_MACH_MSM8960_MAGNUS)
#if defined(CONFIG_MACH_MSM8960_CHEETAH) || defined(CONFIG_MACH_MSM8960_SIRIUSLTE)|| defined(CONFIG_MACH_MSM8960_EF44S) || defined(CONFIG_MACH_MSM8960_MAGNUS)
struct mipi_panel_info *mipi;
#endif
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
//#if defined(CONFIG_MACH_MSM8960_CHEETAH) || defined(CONFIG_MACH_MSM8960_VEGAPVW) || defined(CONFIG_MACH_MSM8960_SIRIUSLTE)|| defined(CONFIG_MACH_MSM8960_EF44S) || defined(CONFIG_MACH_MSM8960_MAGNUS)
#if defined(CONFIG_MACH_MSM8960_CHEETAH) || defined(CONFIG_MACH_MSM8960_SIRIUSLTE)|| defined(CONFIG_MACH_MSM8960_EF44S) || defined(CONFIG_MACH_MSM8960_MAGNUS)
mipi = &mfd->panel_info.mipi;
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP(MIPI_DSI_BASE + 0xA8);
tmp &= ~(1<<28);
MIPI_OUTP(MIPI_DSI_BASE + 0xA8, tmp);
wmb();
printk("[MIPI: shinbrad Low speed Clk Set(Off Sequence) .................................................]\n");
}
#endif
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
} else {
/* video mode, wait until fifo cleaned */
#if !defined(CONFIG_MACH_MSM8960_MAGNUS)
mipi_dsi_controller_cfg(0);
#endif
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
#if defined (CONFIG_MACH_MSM8960_MAGNUS)
ret = panel_next_off(pdev);
mipi_dsi_controller_cfg(0);
#else
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
local_bh_disable();
mipi_dsi_ahb_ctrl(0);
local_bh_enable();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
mipi_dsi_mdp_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
} else {
/* video mode, wait until fifo cleaned */
mipi_dsi_controller_cfg(0);
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
#if defined(CONFIG_FB_MSM_MIPI_S6E8AA0_HD720_PANEL) || \
defined(CONFIG_FB_MSM_MIPI_S6E8AA0_WXGA_Q1_PANEL)
MIPI_OUTP(MIPI_DSI_BASE + 0xA8, 0x00000000); // for LCD-on when wakeup
#endif
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
local_bh_disable();
mipi_dsi_ahb_ctrl(0);
local_bh_enable();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
PR_DISP_DEBUG(" %s\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
htc_mdp_sem_down(current, &mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
/*
* Description: dsi clock is need to perform shutdown.
* mdp4_dsi_cmd_dma_busy_wait() will enable dsi clock if disabled.
* also, wait until dma (overlay and dmap) finish.
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (mdp_rev >= MDP_REV_41) {
mdp4_dsi_cmd_dma_busy_wait(mfd);
mdp4_dsi_blt_dmap_busy_wait(mfd);
} else {
mdp3_dsi_cmd_dma_busy_wait(mfd);
}
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio > 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
local_bh_disable();
mipi_dsi_clk_disable();
local_bh_enable();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
htc_mdp_sem_up(&mfd->dma->mutex);
return ret;
}
int mipi_dsi_off(struct platform_device *pdev)
#endif
/* OPPO 2013-02-04 zhengzk Modify end */
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
/*OPPO 2013-10-11 zhzhyon Add for reason*/
#ifdef PANEL_SRE
if(get_pcb_version() >= PCB_VERSION_EVT_N1)
{
mutex_lock(&sre_mutex);
}
#endif
/*OPPO 2013-10-11 zhzhyon Add end*/
mipi_dsi_prepare_ahb_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/*OPPO 2013-10-11 zhzhyon Add for reason*/
#ifdef PANEL_SRE
if(get_pcb_version() >= PCB_VERSION_EVT_N1)
{
mutex_unlock(&sre_mutex);
}
#endif
/*OPPO 2013-10-11 zhzhyon Add end*/
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
mipi_dsi_unprepare_ahb_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
uint32 dsi_ctrl;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
* mipi_dsi_op_mode_config(DSI_CMD_MODE);
*/
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
ret = panel_next_off(pdev);
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
/* disbale dsi engine */
dsi_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0000);
dsi_ctrl &= ~0x01;
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, dsi_ctrl);
MIPI_OUTP(MIPI_DSI_BASE + 0x010c, 0); /* DSI_INTL_CTRL */
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
usleep(5000);
if (mipi_dsi_pdata && mipi_dsi_pdata->active_reset)
mipi_dsi_pdata->active_reset(0); /* low */
usleep(2000); /*1ms delay(minimum) required between reset low and AVDD off*/
if (mipi_dsi_pdata && mipi_dsi_pdata->panel_power_save)
mipi_dsi_pdata->panel_power_save(0);
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
htc_mdp_sem_down(current, &mfd->dma->mutex);
mdp4_overlay_dsi_state_set(ST_DSI_SUSPEND);
mipi_dsi_clk_cfg(1);
mipi_dsi_cmd_mdp_busy();
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
if (panel_type != PANEL_ID_PROTOU_LG && panel_type != PANEL_ID_PROTODCG_LG)
ret = panel_next_off(pdev);
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
spin_lock_bh(&dsi_clk_lock);
mipi_dsi_clk_disable();
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
spin_unlock_bh(&dsi_clk_lock);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
htc_mdp_sem_up(&mfd->dma->mutex);
pr_debug("%s-:\n", __func__);
return ret;
}
static int mipi_dsi_off(struct platform_device *pdev)
{
int ret = 0;
struct msm_fb_data_type *mfd;
struct msm_panel_info *pinfo;
pr_debug("%s+:\n", __func__);
mfd = platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (mdp_rev >= MDP_REV_41)
mutex_lock(&mfd->dma->ov_mutex);
else
down(&mfd->dma->mutex);
#if defined(FEATURE_SKYDISP_DISPLAY_FLICKER_SHARP_IPS)
//printk(KERN_ERR "[SKY_LCD] %s : %d\n", __FUNCTION__, __LINE__);
ret = panel_next_off(pdev);
#endif
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
mipi_dsi_prepare_clocks();
mipi_dsi_ahb_ctrl(1);
mipi_dsi_clk_enable();
/* make sure dsi_cmd_mdp is idle */
mipi_dsi_cmd_mdp_busy();
}
/*
* Desctiption: change to DSI_CMD_MODE since it needed to
* tx DCS dsiplay off comamnd to panel
*/
mipi_dsi_op_mode_config(DSI_CMD_MODE);
if (mfd->panel_info.type == MIPI_CMD_PANEL) {
if (pinfo->lcd.vsync_enable) {
if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
if (MDP_REV_303 != mdp_rev)
gpio_free(vsync_gpio);
}
mipi_dsi_set_tear_off(mfd);
}
}
#if defined(FEATURE_SKYDISP_DISPLAY_FLICKER_SHARP_IPS)
/* panel_next_off changed : set before mipi_clock/mode_config etc... */
#else
ret = panel_next_off(pdev);
#endif
#ifdef CONFIG_MSM_BUS_SCALING
mdp_bus_scale_update_request(0);
#endif
mipi_dsi_clk_disable();
/* disbale dsi engine */
MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
mipi_dsi_phy_ctrl(0);
mipi_dsi_ahb_ctrl(0);
mipi_dsi_unprepare_clocks();
if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
mipi_dsi_pdata->dsi_power_save(0);
if (mdp_rev >= MDP_REV_41)
mutex_unlock(&mfd->dma->ov_mutex);
else
up(&mfd->dma->mutex);
pr_debug("End of %s ....:\n", __func__);
return ret;
}
