static Aintr*
mkiointr(PCMPintr* p)
{
Bus *bus;
Aintr *aintr;
/*
* According to the MultiProcessor Specification, a destination
* I/O APIC of 0xFF means the signal is routed to all I/O APICs.
* It's unclear how that can possibly be correct so treat it as
* an error for now.
*/
if(p->apicno == 0xFF)
return 0;
if((bus = mpgetbus(p->busno)) == 0)
return 0;
aintr = xalloc(sizeof(Aintr));
aintr->intr = p;
aintr->apic = &mpapic[p->apicno];
aintr->next = bus->aintr;
bus->aintr = aintr;
return aintr;
}
static Aintr*
mkiointr(PCMPintr* p)
{
Bus *bus;
Aintr *aintr;
PCMPintr* pcmpintr;
/*
* According to the MultiProcessor Specification, a destination
* I/O APIC of 0xFF means the signal is routed to all I/O APICs.
* It's unclear how that can possibly be correct so treat it as
* an error for now.
*/
if(p->apicno == 0xFF)
return 0;
if((bus = mpgetbus(p->busno)) == 0)
return 0;
aintr = xalloc(sizeof(Aintr));
aintr->intr = p;
if(0)
dprint("mkiointr: type %d intr type %d flags %#o "
"bus %d irq %d apicno %d intin %d\n",
p->type, p->intr, p->flags,
p->busno, p->irq, p->apicno, p->intin);
/*
* Hack for Intel SR1520ML motherboard, which BIOS describes
* the i82575 dual ethernet controllers incorrectly.
*/
if(mppcmp && memcmp(mppcmp->product, "INTEL X38MLST ", 20) == 0){
if(p->busno == 1 && p->intin == 16 && p->irq == 1){
pcmpintr = malloc(sizeof(PCMPintr));
if(pcmpintr == nil)
panic("mkiointr: no memory");
memmove(pcmpintr, p, sizeof(PCMPintr));
print("mkiointr: %20.20s bus %d intin %d irq %d\n",
(char*)mppcmp->product,
pcmpintr->busno, pcmpintr->intin,
pcmpintr->irq);
pcmpintr->intin = 17;
aintr->intr = pcmpintr;
}
}
if ((unsigned)p->apicno >= nelem(mpapic))
panic("mkiointr: apic %d out of range", p->apicno);
aintr->apic = &ioapic[p->apicno];
aintr->next = bus->aintr;
bus->aintr = aintr;
return aintr;
}
static int
mklintr(PCMPintr* p)
{
Apic *apic;
Bus *bus;
int intin, v;
/*
* The offsets of vectors for LINT[01] are known to be
* 0 and 1 from the local APIC vector space at VectorLAPIC.
*/
if((bus = mpgetbus(p->busno)) == 0)
return 0;
intin = p->intin;
/*
* Pentium Pros have problems if LINT[01] are set to ExtINT
* so just bag it, SMP mode shouldn't need ExtINT anyway.
*/
if(p->intr == PcmpExtINT || p->intr == PcmpNMI)
v = ApicIMASK;
else
v = mpintrinit(bus, p, VectorLAPIC+intin, p->irq);
if(p->apicno == 0xFF){
for(apic = mpapic; apic <= &mpapic[MaxAPICNO]; apic++){
if((apic->flags & PcmpEN)
&& apic->type == PcmpPROCESSOR)
apic->lintr[intin] = v;
}
}
else{
if ((unsigned)p->apicno >= nelem(mpapic))
panic("mklintr: ioapic %d out of range", p->apicno);
apic = &mpapic[p->apicno];
if((apic->flags & PcmpEN) && apic->type == PcmpPROCESSOR)
apic->lintr[intin] = v;
}
return v;
}
static int
mklintr(PCMPintr* p)
{
Apic *apic;
Bus *bus;
int i, intin, v;
/*
* The offsets of vectors for LINT[01] are known to be
* 0 and 1 from the local APIC vector space at VectorLAPIC.
*/
if((bus = mpgetbus(p->busno)) == 0)
return 0;
intin = p->intin;
/*
* Pentium Pros have problems if LINT[01] are set to ExtINT
* so just bag it, SMP mode shouldn't need ExtINT anyway.
*/
if(p->intr == PcmpExtINT || p->intr == PcmpNMI)
v = ApicIMASK;
else
v = mpintrinit(bus, p, VectorLAPIC+intin, p->irq);
if(p->apicno == 0xFF){
for(i=0; i<=MaxAPICNO; i++){
if((apic = mpapic[i]) == nil)
continue;
if(apic->flags & PcmpEN)
apic->lintr[intin] = v;
}
}
else{
if(apic = mpapic[p->apicno])
if(apic->flags & PcmpEN)
apic->lintr[intin] = v;
}
return v;
}
