static void __init
smp_85xx_setup_cpu(int cpu_nr)
{
mpic_setup_this_cpu();
if (cpu_has_feature(CPU_FTR_DBELL))
doorbell_setup_this_cpu();
}
static void __cpuinit smp_85xx_setup_cpu(int cpu_nr)
{
if (smp_85xx_ops.probe == smp_mpic_probe)
mpic_setup_this_cpu();
if (cpu_has_feature(CPU_FTR_DBELL))
doorbell_setup_this_cpu();
}
static void __init
smp_85xx_setup_cpu(int cpu_nr)
{
mpic_setup_this_cpu();
/* Clear any pending timer interrupts */
mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
/* Enable decrementer interrupt */
mtspr(SPRN_TCR, TCR_DIE);
}
static void __init smp_core99_setup_cpu(int cpu_nr)
{
/* Setup MPIC */
mpic_setup_this_cpu();
if (cpu_nr == 0) {
extern void g5_phy_disable_cpu1(void);
/* If we didn't start the second CPU, we must take
* it off the bus
*/
if (num_online_cpus() < 2)
g5_phy_disable_cpu1();
if (ppc_md.progress) ppc_md.progress("smp_core99_setup_cpu 0 done", 0x349);
}
}
/* This is the first C code that secondary processors invoke. */
void secondary_cpu_init(int cpuid, unsigned long r4)
{
struct vcpu *vcpu;
cpu_initialize(cpuid);
smp_generic_take_timebase();
/* If we are online, we must be able to ACK IPIs. */
mpic_setup_this_cpu();
cpu_set(cpuid, cpu_online_map);
vcpu = alloc_vcpu(idle_domain, cpuid, cpuid);
BUG_ON(vcpu == NULL);
set_current(idle_domain->vcpu[cpuid]);
idle_vcpu[cpuid] = current;
startup_cpu_idle_loop();
panic("should never get here\n");
}
static void __init
smp_85xx_setup_cpu(int cpu_nr)
{
mpic_setup_this_cpu();
}
static void smp_chrp_setup_cpu(int cpu_nr)
{
mpic_setup_this_cpu();
}
static void __init __start_xen(void)
{
memcpy(0, exception_vectors, exception_vectors_end - exception_vectors);
synchronize_caches(0, exception_vectors_end - exception_vectors);
ticks_per_usec = timebase_freq / 1000000ULL;
/* Parse the command-line options. */
cmdline_parse(xen_cmdline);
/* we need to be able to identify this CPU early on */
init_boot_cpu();
/* We initialise the serial devices very early so we can get debugging. */
ns16550.io_base = 0x3f8;
ns16550_init(0, &ns16550);
ns16550.io_base = 0x2f8;
ns16550_init(1, &ns16550);
serial_init_preirq();
init_console();
console_start_sync(); /* Stay synchronous for early debugging. */
rtas_init((void *)oftree);
memory_init();
printk("xen_cmdline: %016lx\n", (ulong)xen_cmdline);
printk("dom0_cmdline: %016lx\n", (ulong)dom0_cmdline);
printk("dom0_addr: %016lx\n", (ulong)dom0_addr);
printk("dom0_len: %016lx\n", (ulong)dom0_len);
printk("initrd_start: %016lx\n", (ulong)initrd_start);
printk("initrd_len: %016lx\n", (ulong)initrd_len);
printk("dom0: %016llx\n", *(unsigned long long *)dom0_addr);
#ifdef OF_DEBUG
key_ofdump(0);
#endif
percpu_init_areas();
init_parea(0);
cpu_initialize(0);
#ifdef CONFIG_GDB
initialise_gdb();
if (opt_earlygdb)
debugger_trap_immediate();
#endif
start_of_day();
acm_init(NULL, 0);
mpic_setup_this_cpu();
/* Deal with secondary processors. */
if (opt_nosmp || ofd_boot_cpu == -1) {
printk("nosmp: leaving secondary processors spinning forever\n");
} else {
printk("spinning up at most %d total processors ...\n", max_cpus);
kick_secondary_cpus(max_cpus);
}
/* This cannot be called before secondary cpus are marked online. */
percpu_free_unused_areas();
/* Create initial domain 0. */
dom0 = domain_create(0, 0, DOM0_SSIDREF);
if (dom0 == NULL)
panic("Error creating domain 0\n");
/* The Interrupt Controller will route everything to CPU 0 so we
* need to make sure Dom0's vVCPU 0 is pinned to the CPU */
dom0->vcpu[0]->cpu_affinity = cpumask_of_cpu(0);
dom0->is_privileged = 1;
/* scrub_heap_pages() requires IRQs enabled, and we're post IRQ setup... */
local_irq_enable();
/* Scrub RAM that is still free and so may go to an unprivileged domain. */
scrub_heap_pages();
if ((dom0_addr == 0) || (dom0_len == 0))
panic("No domain 0 found.\n");
if (construct_dom0(dom0, dom0_addr, dom0_len,
initrd_start, initrd_len,
dom0_cmdline) != 0) {
panic("Could not set up DOM0 guest OS\n");
}
init_xenheap_pages(ALIGN_UP(dom0_addr, PAGE_SIZE),
ALIGN_DOWN(dom0_addr + dom0_len, PAGE_SIZE));
if (initrd_start)
init_xenheap_pages(ALIGN_UP(initrd_start, PAGE_SIZE),
ALIGN_DOWN(initrd_start + initrd_len, PAGE_SIZE));
init_trace_bufs();
console_endboot();
/* Hide UART from DOM0 if we're using it */
serial_endboot();
console_end_sync();
domain_unpause_by_systemcontroller(dom0);
#ifdef DEBUG_IPI
ipi_torture_test();
#endif
startup_cpu_idle_loop();
}
static void __devinit smp_chrp_setup_cpu(int cpu_nr)
{
mpic_setup_this_cpu();
}
void __devinit smp_mpic_setup_cpu(int cpu)
{
mpic_setup_this_cpu();
}
