int mt8193_power_on(void)
{
MT8193_DRV_FUNC();
#if defined(CONFIG_HAS_EARLYSUSPEND)
if(mt8193_hdmiearlysuspend==0) return 0;
#endif
mt8193_hotinit = 0;
mt_set_gpio_mode(GPIO_HDMI_POWER_CONTROL, GPIO_MODE_00);
mt_set_gpio_dir(GPIO_HDMI_POWER_CONTROL, GPIO_DIR_OUT);
mt_set_gpio_out(GPIO_HDMI_POWER_CONTROL, GPIO_OUT_ONE);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_power_turnon, hdmi_power_turnon);
vWriteHdmiSYSMsk(HDMI_SYS_PWR_RST_B, hdmi_pwr_sys_sw_unreset, hdmi_pwr_sys_sw_unreset);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_iso_dis, hdmi_iso_en);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_clock_on, hdmi_clock_off);
vWriteHdmiSYSMsk(HDMI_SYS_CFG1C, ANLG_ON|HDMI_ON, ANLG_ON|HDMI_ON);
mt8193_i2c_write(0x1500, 0x20);
vHotPlugPinInit();
vInitHdcpKeyGetMethod(NON_HOST_ACCESS_FROM_EEPROM);
vWriteHdmiIntMask(0xFF);
return 0;
}
void mt8193_write(unsigned short u2Reg, unsigned int u4Data)
{
if (u2Reg & 0x8000) {
/* if ((u2Reg & 0xf000) == 0x8000) */
/* u2Reg -= 0x8000; */
/* *(unsigned int *)(0xf4000000 + u2Reg) = u4Data; */
} else {
hdmi_print("Reg write= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(u2Reg, u4Data);
}
}
void mt8193_write(u16 u2Reg, u32 u4Data)
{
if(u2Reg&0x8000)
{
if((u2Reg&0xf000)==0x8000) u2Reg -= 0x8000;
*(unsigned int*)(0xf4000000+u2Reg) = u4Data;
}
else
{
printk("Reg write= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(u2Reg, u4Data);
}
}
int mt8193_power_on(void)
{
struct device_node *dn;
int bus_switch_pin;
HDMI_DEF_LOG("[hdmi]mt8193_power_on_\n");
if (hdmi_powerenable == 1) {
HDMI_DEF_LOG("[hdmi]already power on, return\n");
return 0;
}
hdmi_powerenable = 1;
#if defined(CONFIG_HAS_EARLYSUSPEND)
if (mt8193_hdmiearlysuspend == 0)
return 0;
#endif
mt8193_hotinit = 0;
mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
is_hdmi_plug_out_flag = 0;
#ifdef GPIO_HDMI_POWER_CONTROL
mt_set_gpio_mode(GPIO_HDMI_POWER_CONTROL, GPIO_MODE_00);
mt_set_gpio_dir(GPIO_HDMI_POWER_CONTROL, GPIO_DIR_OUT);
mt_set_gpio_out(GPIO_HDMI_POWER_CONTROL, GPIO_OUT_ONE);
HDMI_DEF_LOG("[hdmi]hdmi_5v_on\n");
#endif
dn = of_find_compatible_node(NULL, NULL, "mediatek,mt8193-hdmi");
bus_switch_pin = of_get_named_gpio(dn, "hdmi_power_gpios", 0);
gpio_direction_output(bus_switch_pin, 1);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_power_turnon, hdmi_power_turnon);
vWriteHdmiSYSMsk(HDMI_SYS_PWR_RST_B, hdmi_pwr_sys_sw_unreset, hdmi_pwr_sys_sw_unreset);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_iso_dis, hdmi_iso_en);
vWriteHdmiSYSMsk(HDMI_PWR_CTRL, hdmi_clock_on, hdmi_clock_off);
vWriteHdmiSYSMsk(HDMI_SYS_CFG1C, ANLG_ON | HDMI_ON, ANLG_ON | HDMI_ON);
mt8193_i2c_write(0x1500, 0x20);
vHotPlugPinInit();
vInitHdcpKeyGetMethod(NON_HOST_ACCESS_FROM_EEPROM);
vWriteHdmiIntMask(0xFF);
mod_timer(&r_hdmi_timer, jiffies + gHDMI_CHK_INTERVAL / (1000 / HZ));
mod_timer(&r_cec_timer, jiffies + gCEC_CHK_INTERVAL / (1000 / HZ));
return 0;
}
void mt8193_nlh_impl(void)
{
u32 u4Data;
u8 bData, bData1;
u8 bMask;
//read register and then assert which interrupt occured
mt8193_i2c_read(0x1508, &u4Data);
mt8193_i2c_write(0x1504, 0xffffffff);
MT8193_DRV_LOG("0x1508 = 0x%08x\n", u4Data);
if(u4Data&0x20)
{
MT8193_CEC_LOG("cec interrupt\n");
if(mt8193_cec_on==1)
{
if(mt8193_cec_isrprocess(mt8193_rxcecmode))
{
vNotifyAppHdmiState(HDMI_PLUG_IN_CEC);
}
}
}
if(u4Data&0x4)
{
bCheckHDCPStatus(0xfb);
bData=bReadGRLInt();
if(bData&INT_HDCP)
{
MT8193_HDCP_LOG("hdcp interrupt\n");
bClearGRLInt(INT_HDCP);
}
else if(bData&INT_MDI)
{
MT8193_PLUG_LOG("hdmi interrupt\n");
bClearGRLInt(INT_MDI);
bMask = bReadHdmiIntMask();
//vWriteHdmiIntMask((0xfd));//INT mask MDI
}
}
mt65xx_eint_unmask(CUST_EINT_EINT_HDMI_HPD_NUM);
}
void mt8193_pad_write(u16 u2Reg, u32 u4Data)
{
mt8193_i2c_write(HDMIPAD_BASE + u2Reg, u4Data);
}
void mt8193_hdmidgi_write(u16 u2Reg, u32 u4Data)
{
MT8193_DGI_LOG("[W]addr= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(HDMIDGI_BASE + u2Reg, u4Data);
}
void mt8193_hdmisys_write(u16 u2Reg, u32 u4Data)
{
MT8193_PLL_LOG("[W]addr= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(HDMISYS_BASE + u2Reg, u4Data);
}
void hdmi_timer_impl(void)
{
if (mt8193_hdmiinit == 0) {
mt8193_hdmiinit = 1;
/* mt8193_power_off(); */
vInitAvInfoVar();
return;
}
if (mt8193_hotinit != 1)
mt8193_hdmiinit++;
#if defined(CONFIG_HAS_EARLYSUSPEND)
if (mt8193_hdmiearlysuspend == 1) {
#else
{
#endif
if (((mt8193_hdmiinit > 5) || (mt8193_hotinit == 0)) && (mt8193_hotinit != 1)) {
if (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == FALSE) {
if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUGIN_AND_POWER_ON)
&& (mt8193_hotinit == 2)) {
vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
vPlugDetectService(HDMI_STATE_HOT_PLUG_OUT);
MT8193_PLUG_LOG
("[detectcable1] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
mt8193_hotinit, mt8193_hdmiinit);
}
#if 1
if ((mt8193_hotinit == 0)
&& (bCheckPordHotPlug(HOTPLUG_MODE) == TRUE)) {
vSetSharedInfo(SI_HDMI_RECEIVER_STATUS,
HDMI_PLUG_IN_AND_SINK_POWER_ON);
mt8193_hotinit = 2;
mt8193_hotplugstate = HDMI_STATE_HOT_PLUGIN_AND_POWER_ON;
vPlugDetectService(HDMI_STATE_HOT_PLUGIN_AND_POWER_ON);
vWriteHdmiIntMask(0xff); /* INT mask MDI */
MT8193_PLUG_LOG
("[detectcable2] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
mt8193_hotinit, mt8193_hdmiinit);
}
#endif
if ((mt8193_hotinit == 0)
&& (bCheckPordHotPlug(HOTPLUG_MODE) == FALSE)) {
vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
mt8193_hotinit = 2;
vSetSharedInfo(SI_HDMI_RECEIVER_STATUS, HDMI_PLUG_OUT);
mt8193_hotplugstate = HDMI_STATE_HOT_PLUG_OUT;
vPlugDetectService(HDMI_STATE_HOT_PLUG_OUT);
MT8193_PLUG_LOG
("[detectcable1] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
mt8193_hotinit, mt8193_hdmiinit);
}
} else if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUG_OUT)
&& (bCheckPordHotPlug(PORD_MODE | HOTPLUG_MODE) == TRUE)) {
vSetSharedInfo(SI_HDMI_RECEIVER_STATUS,
HDMI_PLUG_IN_AND_SINK_POWER_ON);
mt8193_hotplugstate = HDMI_STATE_HOT_PLUGIN_AND_POWER_ON;
mt8193_hotinit = 2;
vPlugDetectService(HDMI_STATE_HOT_PLUGIN_AND_POWER_ON);
vWriteHdmiIntMask(0xff); /* INT mask MDI */
MT8193_PLUG_LOG
("[detectcable3] mt8193_hotinit = %d,mt8193_hdmiinit=%d\n",
mt8193_hotinit, mt8193_hdmiinit);
} else if ((mt8193_hotplugstate == HDMI_STATE_HOT_PLUGIN_AND_POWER_ON)
&& ((e_hdcp_ctrl_state == HDCP_WAIT_RI)
|| (e_hdcp_ctrl_state == HDCP_CHECK_LINK_INTEGRITY))) {
if (bCheckHDCPStatus(HDCP_STA_RI_RDY)) {
vSetHDCPState(HDCP_CHECK_LINK_INTEGRITY);
vSendHdmiCmd(HDMI_HDCP_PROTOCAL_CMD);
}
}
mt8193_hdmiinit = 1;
}
}
if (mt8193_hdmiCmd == HDMI_PLUG_DETECT_CMD) {
vClearHdmiCmd();
/* vcheckhdmiplugstate(); */
/* vPlugDetectService(e_hdmi_ctrl_state); */
} else if (mt8193_hdmiCmd == HDMI_HDCP_PROTOCAL_CMD) {
vClearHdmiCmd();
HdcpService(e_hdcp_ctrl_state);
}
}
void cec_timer_impl(void)
{
if (mt8193_cecinit == 0) {
mt8193_cecinit = 1;
mt8193_cec_init();
return;
}
if (mt8193_cec_on == 1)
mt8193_cec_mainloop(mt8193_rxcecmode);
}
void mt8193_nlh_impl(void)
{
unsigned int u4Data;
unsigned char bData;
unsigned char bMask;
/*read register and then assert which interrupt occurred*/
mt8193_i2c_read(0x1508, &u4Data);
mt8193_i2c_write(0x1504, 0xffffffff);
MT8193_DRV_LOG("0x1508 = 0x%08x\n", u4Data);
if (u4Data & 0x20) {
MT8193_CEC_LOG("cec interrupt\n");
if (mt8193_cec_on == 1) {
if (mt8193_cec_isrprocess(mt8193_rxcecmode))
vNotifyAppHdmiState(HDMI_PLUG_IN_CEC);
}
}
if (u4Data & 0x4) {
bCheckHDCPStatus(0xfb);
bData = bReadGRLInt();
if (bData & INT_HDCP) {
MT8193_HDCP_LOG("hdcp interrupt\n");
bClearGRLInt(INT_HDCP);
} else if (bData & INT_MDI) {
MT8193_PLUG_LOG("hdmi interrupt\n");
bClearGRLInt(INT_MDI);
bMask = bReadHdmiIntMask();
/* vWriteHdmiIntMask((0xfd));//INT mask MDI */
}
}
#ifdef CUST_EINT_EINT_HDMI_HPD_NUM
mt65xx_eint_unmask(CUST_EINT_EINT_HDMI_HPD_NUM);
#endif
}
void mt8193_cec_write(u16 u2Reg, u32 u4Data)
{
MT8193_CEC_LOG("[W]cec= 0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(HDMICEC_BASE+u2Reg, u4Data);
}
void mt8193_ddc_write(u16 u2Reg, u32 u4Data)
{
MT8193_DDC_LOG("[W]0x%04x, data = 0x%08x\n", u2Reg, u4Data);
mt8193_i2c_write(HDMIDDC_BASE+u2Reg, u4Data);
}
void mt8193_hdmi_on_test(void)
{
int i = 0;
u32 u4Crc = 0;
mt8193_i2c_write(0x1254, 0x00000323);
msleep(100);
mt8193_i2c_write(0x101c, 0x00000004);
msleep(100);
mt8193_i2c_write(0x1328, 0x00009999);
msleep(100);
mt8193_i2c_write(0x1334, 0x0020008f);
msleep(100);
mt8193_i2c_write(0x1338, 0xd4a88f00);
msleep(100);
mt8193_i2c_write(0x1344, 0x00008012);
msleep(100);
mt8193_i2c_write(0x1348, 0x11ff0000);
msleep(100);
mt8193_i2c_write(0x1334, 0x0030008f);
msleep(100);
mt8193_i2c_write(0x02d4, 0x02);
msleep(100);
mt8193_i2c_write(0x02d8, 0x80);
msleep(100);
mt8193_i2c_write(0x0448, 0x00000);
msleep(100);
mt8193_i2c_write(0x0450, 0x2);
msleep(100);
mt8193_i2c_write(0x0608, 0x80000005);
msleep(100);
mt8193_i2c_write(0x065c, 0x0000000f);
msleep(100);
mt8193_i2c_write(0x0604, 0x00000040);
msleep(100);
mt8193_i2c_write(0x061c, 0x00104000);
msleep(100);
mt8193_i2c_write(0x0624, 0x02ee07bc);
msleep(100);
mt8193_i2c_write(0x0628, 0x00030005);
msleep(100);
mt8193_i2c_write(0x0630, 0x0080057f);
msleep(100);
mt8193_i2c_write(0x0634, 0x001002df);
msleep(100);
mt8193_i2c_write(0x0638, 0x001002df);
msleep(100);
mt8193_i2c_write(0x0620, 0x000207ba);
msleep(100);
mt8193_i2c_write(0x0600, 0x00000001);
msleep(100);
mt8193_i2c_write(0x060c, 0x00000002);
msleep(100);
mt8193_i2c_write(0x0700, 0x02ee07bc);
msleep(100);
mt8193_i2c_write(0x0704, 0x00030005);
msleep(100);
mt8193_i2c_write(0x0708, 0x01000080);
msleep(100);
mt8193_i2c_write(0x070c, 0x02d00500);
msleep(100);
mt8193_i2c_write(0x0710, 0x00000203);
msleep(100);
mt8193_i2c_write(0x0714, 0x00ff8844);
msleep(100);
mt8193_i2c_write(0x0718, 0x000000ff);
msleep(100);
for (; i<100; i++)
{
u32 u4Crc_2 = 0;
mt8193_i2c_write(0x071c, 2);
msleep(50);
mt8193_i2c_write(0x071c, 1);
msleep(50);
mt8193_i2c_read(0x0720, &u4Crc_2);
msleep(50);
if (i > 1 && u4Crc_2 != u4Crc)
{
printk("[HDMI] CHECK CRC ERROR! 0x%x, 0x%x, %d\n", u4Crc, u4Crc_2, i);
break;
}
else
{
printk("[HDMI] CHECK CRC OK %d\n", i);
}
u4Crc = u4Crc_2;
}
}
