static void spm_trigger_wfi_for_sleep(struct pwr_ctrl *pwrctrl)
{
// sync_hw_gating_value(); /* for Vcore DVFS */
if (is_cpu_pdn(pwrctrl->pcm_flags)) {
spm_dormant_sta = mt_cpu_dormant(CPU_SHUTDOWN_MODE/* | DORMANT_SKIP_WFI*/);
switch (spm_dormant_sta)
{
case MT_CPU_DORMANT_RESET:
break;
case MT_CPU_DORMANT_ABORT:
break;
case MT_CPU_DORMANT_BREAK:
break;
case MT_CPU_DORMANT_BYPASS:
break;
}
} else {
spm_dormant_sta = -1;
spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) | 0x10);
wfi_with_sync();
spm_write(CA7_BUS_CONFIG, spm_read(CA7_BUS_CONFIG) & ~0x10);
}
if (is_infra_pdn(pwrctrl->pcm_flags))
mtk_uart_restore();
}
static void spm_trigger_wfi_for_sleep(bool cpu_pdn, bool infra_pdn)
{
//disable_peri_dcm(); /* workaround for WHQA_00013158 */
/* if (infra_pdn)
disable_infra_dcm(); EMI needs clock to sync register back */
if (cpu_pdn) {
if (!cpu_power_down(SHUTDOWN_MODE)) {
/* do not add code here */
wfi_with_sync();
}
cpu_check_dormant_abort();
} else {
//mci_snoop_sleep();
wfi_with_sync();
//mci_snoop_restore();
}
if (infra_pdn) {
//restore_infra_dcm();
if(console_suspend_enabled==0)
mtk_uart_restore();
}
//restore_peri_dcm();
}
static void spm_trigger_wfi_for_sleep(struct pwr_ctrl *pwrctrl)
{
//FIXME: for K2 fpga early porting
#if 0
sync_hw_gating_value(); /* for Vcore DVFS */
#endif
if (is_cpu_pdn(pwrctrl->pcm_flags)) {
spm_dormant_sta = mt_cpu_dormant(CPU_SHUTDOWN_MODE/* | DORMANT_SKIP_WFI*/);
switch (spm_dormant_sta)
{
case MT_CPU_DORMANT_RESET:
break;
case MT_CPU_DORMANT_ABORT:
break;
case MT_CPU_DORMANT_BREAK:
break;
case MT_CPU_DORMANT_BYPASS:
break;
}
} else {
spm_dormant_sta = -1;
//spm_write(MP0_AXI_CONFIG, spm_read(MP0_AXI_CONFIG) | ACINACTM);
wfi_with_sync();
// spm_write(MP0_AXI_CONFIG, spm_read(MP0_AXI_CONFIG) & ~ACINACTM);
}
if (is_infra_pdn(pwrctrl->pcm_flags))
mtk_uart_restore();
}
static void spm_trigger_wfi_for_sleep(bool cpu_pdn, bool infra_pdn)
{
#if SPM_CTRL_33VRF18
u32 pdn0;
pdn0 = spm_read(PERI_PDN0_STA) & (1U << 22);
spm_write(PERI_PDN0_CLR, pdn0); /* power on I2C1 */
spm_write(0xF1008010, 0); /* init I2C1_CONTROL */
spm_write(0xF1008018, 0x1); /* init I2C1_TRANSAC_LEN */
spm_write(0xF1008028, 0x1800); /* init I2C1_EXT_CONF */
spm_write(0xF1008040, 0x3); /* init I2C1_IO_CONFIG */
spm_write(0xF1008048, 0x102); /* init I2C1_HS */
#endif
if (cpu_pdn) {
if (!cpu_power_down(SHUTDOWN_MODE)) {
switch_to_amp();
wfi_with_sync();
}
switch_to_smp();
cpu_check_dormant_abort();
} else {
wfi_with_sync();
}
#if SPM_CTRL_33VRF18
spm_write(PERI_PDN0_SET, pdn0); /* restore I2C1 power */
#endif
if (infra_pdn)
mtk_uart_restore();
}
